This driver is compliant with the candev interface. It has been tested
with STM32F0 and STM32F2 and STM32F413 ONLY at this time but should be
compliant with other STM32Fx devices
xSemaphoreTakeRecursive() returned before the fix: pdFALSE(equal to pdFAIL) when the call was successful in obtaining the semaphore
and pdTRUE(equal to pdPASS) when the call did not successfully obtain the semaphore.
According to freertos documentation:
"pdPASS Returned only if the call to xSemaphoreTakeRecursive() was successful in obtaining the semaphore"
"pdFAIL Returned if the call to xSemaphoreTakeRecursive() did not successfully obtain the semaphore."
Fixed it to return the correct value.
xSemaphoreTake() returned before the fix: pdFALSE(equal to pdFAIL) when the call was successful in obtaining the semaphore
and pdTRUE(equal to pdPASS) when the call did not successfully obtain the semaphore.
According to freertos documentation:
"pdPASS Returned only if the call to xSemaphoreTake() was successful in obtaining the semaphore"
"pdFAIL Returned if the call to xSemaphoreTake() did not successfully obtain the semaphore."
Fixed it to return the correct value.
The GPIO for RX has to be initialized as input before the GPIO for TX can be initialized as output. Otherwise it could lead to creash if RX GPIO was used as output before.
Function uart_set_baudrate which is only used internally was made static and renamed to _uart_set_baudrate to indicate that it is an internal function. Furthermore, an additional waiting for flushed TX FIFO added. The reconfiguration is now handled as critical section.
An additional _ for static symbols has been added by mistake and should be removed. This will make future merging with the reimplementation of ESP8266 easier.
There is an error when the start byte NACKs
The nack sets the stop bit twice which keeps the stop bit high the next time
When the stop bit is high it creates a timeout when trying to use
This commit fixes so when a NACK occures on the address it doesn't stop twice
It must be evaluated in `cortexm_common` without a shell context.
The `K` is correctly handled by both the linker and `cortexm_common`.
Co-authored-by: Gaëtan Harter <gaetan.harter@fu-berlin.de>
`void cpu_switch_context_exit(void)` assigns `sched_active_thread` just before
calling `sched_run()`. This is unneeded, as `sched_run()` will updated that
anyway. Also generally speaking, changing internal scheduler data from outside
the scheduler is a risky thing to do.
The build system contains several instances of
INCLUDES += -I$(RIOTBASE)/sys/posix/include
This is bypassing the module management system, by directly accesing
headers without depending on a module. The module is the posix module.
That line is also added when one of the posix_* modules is requested.
According to the docs, the posix module provides headers only, but in
reality there is also inet.c.
This patch:
- Moves `inet.c` into `posix_inet`, leaving `posix` as a headers-only
module.
- Rename `posix` as `posix_headers` to make it clear the module only
includes headers.
- Makes `posix_*` modules depend on `posix_headers`, thus removing the
explicit `INCLUDES+=...` in `sys/Makefile.include`.
- Ocurrences of `INCLUDES+=...` are replaced by an explicit dependency
on `posix_headers`.
USART_CR1_M combines both USART_CR1_M0 and USART_CR1_M1 macros
affecting bits 12 and 28 on 7 data bits capable UARTs. Whereas
for other UARTs USART_CR1_M macro affects only bit 12.
This patch fixes wrong data bits usage on 7 data bits capable
UARTs with using USART_CR1_M0 macro for modes 8-E-x and 8-O-x.
It also simplifies bits unsetting as USART_CR1_M macro clears
all data bits related bits for both UART types.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
The timer_clear function doesn't clear the hardware timer counter, but
is designed to clear the allocation of the channel. The consequence is
that the IFS timer here is not set to zero in the callback, but only
stopped at the current value. When the timer is started again, it has to
count the full timer range until it matches the timeout value again.
This commit fixes this issue by using timer_set instead of
timer_set_absolute. This way the current timer value (when the timer is
stopped) is read and the IFS timeout value is added to the current timer
value.
ieee802.15.4 specifies 40 symbols as LIFS value and 12 symbols as SIFS
value. Furthermore, the 2.4Ghz DSSS mode has a symbol rate of
62.5Ksymbols/s. To have the LIFS and SIFS in the code match the timings
from the specification, the TIMER_FREQ must match the symbol rate of
62.5Ksymbol/s such that one tick of the timer equals one symbol in time.
If the GPIO is in an output state, gpio_init() can return 0 without bad
consequences.
-1 was return until now.
Signed-off-by: Gilles DOFFE <g.doffe@gmail.com>
Calling the initialization function ensures that the dummy lwIP library is used instead of the real lwIP, even if the esp_wifi module for esp8266 is not used.
The documentation had to be changed due to the relation of module `esp_now` to `esp_wifi` module. In addition, a number of corrections have been made. In the case of documentation, it is impossible to do this in various commits.
Usually, all .rodata sections are placed in RAM by the Espressif SDK since IROM (flash) access requires 32-bit word aligned reads. thanks to the LoadStoreError exception handler from esp-open-rtos which is used now in RIOT-OS, it is also possible to place .rodata sections in IROM (flash) to save RAM resources.
Usually, the access to the IROM (flash) memory requires 32-bit word aligned reads. Attempts to access data in the IROM (flash) memory less than 32 bits in size triggers a LoadStoreError exception. With the exception handler from esp-open-rtos it becomes possible to access data in IROM (flash) with a size of less than 32 bits and thus to place .rodata sections in the IROM (flash).
The default macros GPIO_PIN and GPIO_UNDEF do not have to be overridden. The GPIO_PIN macro definition was even wrong for 40 GPIOs without splitting into ports, even if that did not lead to erroneous behavior.
Add support for specifying data bits, stop bits and parity at
runtime.
Introduce feature periph_uart_modecfg for uart_mode() till all
other CPUs implement it.
STM32 L1, F1, F2, F4 supports following modes:
* 7E1, 7E2
* 7O1, 7O2
* 8N1, 8N2
* 8E1, 8E2
* 8O1, 8O2
STM32 L0, L4, F0, F3, F7 supports following modes:
* 6E1, 6E2
* 6O1, 6O2
* 7E1, 7E2
* 7O1, 7O2
* 7N1, 7N2
* 8N1, 8N2
* 8E1, 8E2
* 8O1, 8O2
Use USART_CR1_M1 macro to detect 7-bit support because
even inside one family there could be devices that don't
support 7-bit mode. So just using a family macro is not
enough.
As stated in the datasheets for L0, L4, F0, F3, F7 devices,
data bits can only be changed when UART is disabled (UE=0).
Introduce uart_stop() routine to satisfy this requirement.
STM32 UART adds parity to the MSB of a byte to send. The same
also applies to the received bytes. As a result this bit must
be masked in order to get the pure data.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Checking by the send function that at least two maximum size Ethernet frames fit in the remaining heap before the LwIP packet buffer is allocated seems to increase stability. This can be caused by the fact that WLAN hardware interrupts allocate additional memory when receiving a frame during the send attempt.
Error case:
1. thread_yield_higher() stores the thread's ucontext
2. creates an "isr ucontext" for isr_thread_yield, switches to it
Case 1: no signals are pending, continues in isr_thread_yield()
3a. sched_run is called
4a. return to sched_active_thread ucontext
Case 2: signals pending (the crashing scenario), continues in native_irq_handler()
3b. handles signals
4b. if sched_context_switch_request is set, call sched_run
5b. return to sched_active_thread ucontext
4b misses the call to sched_run(), leading to a possible return into a
non-ready thread.
The situation where the firmware `lwIP` packet buffer is exhausted is an important indication that the traffic sent to and sent from the esp8266 is more than the esp8266 is able to handle. Therefore, it should be an error message.
It is not necessary to realize timeout handling in send function or to disconnect from AP if lwIP packet buffer is exhausted. Waiting that the frame allocated in lwIP packet buffer is freed by MAC layer led to the complete blockage of send function on heavy network load. Disconnecting from AP is counterproductive since reconnecting usually fails on heavy network load.
Disconnecting from the AP in the send function if the lwIP packet buffer is exhausted is counterproductive since reconnecting usually fails on heavy network load. A better strategy is to slow down the sending of MAC frames from netif a bit to wait for flushing the buffer in the MAC layer.
Defines a number of lwIP functions that are required as symbols by Espressif's SDK libraries. These functions are only dummies without real functionality. Using these functions instead of real lwIP functions provided with the SDK saves arround 4 kBytes of RAM.
Since _esp_wifi_recv_cb is not executed in interrupt context but in the context of the `ets` thread, it is not necessary to pass the`NETDEV_EVENT_ISR` event first. Instead, the receive function can be called directly which result in much faster handling, a less frame lost rate and more robustness.
Since _esp_wifi_recv_cb is not executed in interrupt context but in the context of the `ets` thread, the receive function can be called directly. There is no need for a mutex anymore to synchronize the access to the receive buffer between _esp_wifi_recv_cb and _recv function.
When the size of a received frame is checked, always the total length should be used instead of the length of the first lwIP pbuf in the pbuf chain. Otherwise, the check that the length does not exceed ETHERNET_MAX_LEN will always be true since the maximum size of one lwIP pbuf in a pbuf chain is 512 bytes.
Although only the station interface is needed, the WiFi interface has to be used in SoftAP + Station mode. Otherwise the send function blocks sporadically. Since the SoftAP interface is not used, it is configured with a hidden SSID and a long beacon interval. Connections from other stations are not allowed.
Some SDK interrupt service routines obviously use malloc/free in the interrupt context. Because the rmutex-based lock/unlock approach of the malloc/free function suite of the newlib does not work in the interrupt context, the SDK memory management functions MUST therefore be used. To use the same memory management functions in RIOT as in the SDK, the malloc/free function suite has to be replaced by wrapper functions.
Fixes sporadic blocking of the wifi thread in esp_wifi_recv_cb function under heavy network load conditions when frames are coming in faster than they can be processed. Since esp_wifi_recv_cb function is not executed in interrupt context, the msg_send function used for ISR event can block when the message queue is full. With this change esp_wifi can be flooded with icmpv6 packets of maximum size without any problems over hours.
This prevent evaluating `LINKFLAGS` when not needed and when building
in docker so does not produce errors if `avr-ld` is not installed.
```
BUILD_IN_DOCKER=1 BOARD=arduino-mega2560 make --no-print-directory -C examples/hello-world/ clean
/srv/ilab-builds/workspace/git/riot_master/makefiles/toolchain/gnu.inc.mk:18: objcopy not found. Hex file will not be created.
/bin/sh: 1: avr-ld: not found
```
It removes the `/bin/sh: 1: avr-ld: not found`
During flash write access, the IROM cache cannot be used and is disabled therefore. During that time, ets_post crashes if a functions is called which is not in IRAM. Therefore thread_flags_set must not be called if IROM cache is disabled.
Changes of ETS task handling require the context switch by software interrupt. The context switch based on interrupt is therefore enabled by default. Furthermore, the number of priority levels are increased due to the new additional thread.
Fixes sporadic blocking of the wifi thread in esp_wifi_recv_cb function under heavy network load conditions when frames are coming in faster than they can be processed. Since esp_wifi_recv_cb function is not executed in interrupt context, the msg_send function used for ISR event can block when the message queue is full. With this change esp_wifi can be flooded with icmpv6 packets of maximum size without any problems over hours.
RX callback function should be register when WiFi has been connected to AP successfully and should be unregistered when WiFi disconnects from AP. Therefore, esp_wifi_internal_reg_rxcb is called now in event handler on event SYSTEM_EVENT_STA_CONNECTED. It is reset now on event SYSTEM_EVENT_STA_DISCONNECTED.
Before function wifi_connect is executed, starting the WiFi driver should have been finished. This is indicated by the WiFi driver by sending event SYSTEM_EVENT_STA_START. Function wifi_connect is moved therefore to the event handler for SYSTEM_EVENT_STA_START.
The size of received and transmitted frames was stored in an uint8_t, which did not allow to process frames larger than 255 octets. However, WiFi has an MTU of 1500 octets.
Adds a memset function `system_secure_memset` which cannot be optimized out by the compiler. It uses the libsodium approach of weak symbols. Function system_secure_memset calls the standard memset. Calling an empty function declared with weak attribute after the memset call, prevents the compiler to optimize it out. The overhead is only one function call.
The driver is claiming it is needed for IPv6 / 6LoWPAN support, which
is not true (the long address is never used for NRFMIN in fact) and
this assumption actually leads to an assertion when compiled as with
the `gnrc_border_router` example.
Although ESP32 has four SPI controllers, only two of them can be effectively used (HSP and VSPI). The third one (FSPI) is used for external memory such as flash and PSRAM and can not be used for peripherals. FSPI is therefore removed from the API. In addition, the SPI0_DEV and SPI1_DEV configuration parameters are renamed SPI0_CTRL and SPI1_CTRL to better describe what they define and to avoid confusion with SPI_DEV (0) and SPI_DEV (1).
Although ESP32 has four SPI controllers, only two of them can be effectively used (HSP and VSPI). The third one (FSPI) is used for external memory such as flash and PSRAM and can not be used for peripherals. FSPI is therefore removed from the API. In addition, the SPI0_DEV and SPI1_DEV configuration parameters are renamed SPI0_CTRL and SPI1_CTRL to better describe what they define and to avoid confusion with SPI_DEV (0) and SPI_DEV (1).
Timer restart was moved from esp_now_scan_peers_done to esp_now_scan_peers_start to avoid that the scan for peers isn't triggered anymore if the esp_now_scan_peers_done callback isn't called because of errors.
The brr calculation on the datasheet is different than what is implmented.
This is intentional since it provides better rounding due to truncation.
There was no comment explaining that so this comment should prevent confusion.
Since it is not possible to reenter the function `esp_now_recv_cb`, and the functions netif::_ recv and esp_now_netdev::_ recv are called directly in the same thread context we can read directly from the `buf` and don't need a receive buffer anymmore.
Since it is not possible to reenter the function `esp_now_recv_cb`, and the functions netif::_ recv and esp_now_netdev::_ recv are called directly in the same thread context we only need a buffer which contains one frame and its source mac address.
Since it is not possible to reenter the function `esp_now_recv_cb`, and the functions netif::_ recv and esp_now_netdev::_ recv are called directly in the same thread context, neither a mutual exclusion has to be realized nor have the interrupts to be deactivated.
Since the esp_now_recv_cb function is not called directly as an ISR through interrupts, it is not executed in the interrupt context. _recv can therefore be called directly. The treatment of the recv_event is no longer necessary.
Although it should not be possible to reenter the function esp_now_recv_cb, this is avoided by an additional boolean variable. It can not be realized by mutex because it would reenter from same thread context. If macro NDEBUG is not defined, an assertion is used.
A second slot is defined with a calculated size, from the
remaining flash after the bootloader and the first slot.
Both slots are defined as equal size, but it can be overriden.
Avoids parsing IPv6 packets to determine destination address.
Allows using 6Lo over ESP-NOW, which is required due to the low MTU of
ESP-NOW.
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Refactors i2c_2 to match the structure of i2c_1 better.
Corrects functionality issues.
Allows the common implementation of read_regs and write_regs.
Documents constraints of hardware.
Matches error messages with API.
RIOTBOOT_SLOT_LEN is calculated as an hexadecimal value and
handles ROM_LEN defined as kilobytes like '512K'
This enables support for all the cortex-m0+/3/4/7 arch,
so most boards embedding these are potentially supported.
One needs just to ensure that the CPU can be initialised
at least twice.
Co-authored-by: Gaëtan Harter <gaetan.harter@fu-berlin.de>
This new function allows to jump to another execution
environment (VTOR) located at a certain (aligned) address.
It's used to boot firmwares at another location than
`CPU_FLASH_BASE`.
The user needs to ensure that the CPU using this feature
is able to be initialised at least twice while jumping
to the RIOT `reset_handler_default` function, since it
initialises the CPU again (calls cpu_init()).
Co-authored-by: Kaspar Schleiser <kaspar@schleiser.de>
Due to the stdio getting called after periph_init the uart may send before initialized.
This adds a simple check so the uart does not get into a locked-up state.
Spinning for the correct time has the side effect that it may cause
infinite recursion if the callback function calls timer_set.
timer_set->callback->...->timer_set->callback->...->timer_set-> infinity
In theory, the drawback is that the callback for very short timeouts
(<2 lptmr ticks) may be delayed up to 2 lptmr ticks (61 µs)
In practice however, tests performed using tests/bench_timers shows that
this change only affects the accuracy of the timer target when timer_set
is called with a timeout of 0, which results in a delay of 30 µs.
This commit fixes configuration problems when trying to use i2c pins that need to be remapped.
All B8 and B9 pins for STM32F1 need to be remapped, so a check is done if the remappable pins are selected.
cpu/esp32/include/periph_cpu.h overrides the default definition of adc_res_t from periph/adc with a definition which contains only four resolution, two new resolutions and two resolutions defined by the default definition of adc_res_t. This gives compilation errors if an application uses other resolutions. According to the documentation, adc_sample should return -1 if the resolution is not supported. All other CPUs override adc_res_t either to add new resolutions or to mark resolutions as unsupported. But they all allow to use them at the interface. Therefore, esp32 overrides now the definition of adc_res_t with all resolutions that are defined by the default definition of adc_res_t and new platform specific resolutions. It returns -1 if a resolution is used in adc_sample that is not supported.
cpu/esp8266/include/periph_cpu.h overrides the default definition of adc_res_t from periph/adc with a definition which contains only one resolution. This gives compilation errorss if an application uses other resolutions. According to the documentation, adc_sample should return -1 if the resolution is not supported. All other CPUs override adc_res_t either to add new resolutions or to mark resolutions as unsupported. But they all allow to use them at the interface. Therefore, esp8266 uses now the default definition of adc_res_t and returns -1 if a solution is used in adc_sample that is not supported.
By not forcing a fixed oversampling rate we can achieve better baud rate
accuracy than otherwise possible.
For example, when requesting 115200 with a module clock of 4 MHz,
picking an oversampling rate of 17 (instead of hardware
default 16) yields 117647 baud instead of 125000 baud as the best
matching rate. Better matching baud rate between receiver and
transmitter results in a lower probability of transmission errors.
- correct number of timers for atmega328p from 2 to 1
- correct number of timer channels for atmega328p from 3 to 2
- adapt atmega periph timer implementation accordingly
This commit adds the ESP32 vendor libraries for WLAN to the BASELIBS variable. This avoids having to define an additional archive group in the LINKGFLAGS variable which contains these vendor libraries and again RIOT module archive files with the symbols that are refered by these vendor libraries.
Measurements show that the time from pin edge until return from
interrupt is reduced from 22 us to 6.1 us for KW41Z running at
41.94 MHz. The measurements used a no-op GPIO callback for testing and
were measured using an external logic analyzer.
cpu.c and startup.c were redundant in most platforms, except for
atmega256rfr2. The common code is now in cpu/atmega_common/cpu.c
and cpu/atmega_common/startup.c. cpu_conf.h is also removed as
it's now in cpu/atmega_common/include thus shared by all atmega
based platforms.
Removes duplicated code for atmega platforms. They were all
basically the same, only with the exception of atmegarfr2,
for which there is an #if statement to use the code in the
same file.
Some ESP32 boards (like my SparkFun ESP32 Thing) have a main clock
crystal that runs at 26MHz, not 40MHz. RIOT appears to assume 40MHz.
The mismatch causes the UART to not sync properly, resulting in
garbage written to the terminal instead of log output.
I’ve added:
* A new board configuration constant ESP32_XTAL_FREQ that defaults
to 40, but can be overridden by a board def or at build time to
force a specific value (i.e. 26).
* Some code spliced into system_clk_init() to check this constant and
call rtc_clk_init() to set the correct frequency.
* A copy of the rtf_clk_init() function from the ESP-IDF sources.
Fixes#10272
Errors flags could not clear making the i2c unusable after error.
This fix removes the error check in start so the error flags can clear and does proper checking for status bits before _bus_check.
The problem seemed to be a pipelining problem of write and read instructions when swapping the context. An isync instruction when returning from a context switch solves the potential pipelining problem.
Reason for the problem was that tast_exit function in thread_arch.c tried to release the thread a second time although it was already released in sched_task_exit. A simple check whether the thread is already released (sched_active_thread == NULL) solved the problem.
Xtensa newlib version requires pthread_setcancelstate as symbol. Therefore, the module pthread was always used, which in turn requires the module xtimer. The xtimer module, however, uses TIMER_DEV(0). Therefore, tests/timers failed for TIMER_DEV(0).
The `periph_flash_common` feature was only defined here to trigger
inclusion of a source file with common functions.
It even only defines private symbols `_lock` and `_unlock` so no reason
to expose it to the build system.
And in practice, all stm cpus providing `periph_flashpage` or
`periph_eeprom` were required to provide `periph_flash_common` to allow
including it.
The previous implementation was only parsing in the modules were in
`FEATURES_REQUIRED` wich did not take cases of `FEATURES_OPTIONAL` into
account.
And also, in the same time, as the dependencies was declared in
`Makefile.include` it was processed before `Makefile.dep` so never handled
cases where a module could depend on `periph_flashpage` or
`periph_eeprom` feature.
It is replaced by selecting the common source file when module using it
are included.
The now useless feature `periph_flash_common` is removed from
`FEATURES_PROVIDED`.
`cpu/stm32_common/Makefile.dep` was never included by the global
`Makefile.dep`, so declaring this `USEMODULE +=` here was never shown to
the build system and never exported as `MODULE_PERIPH_I2C_X` variables.
In fact, `USEMODULE` was only used to trigger the `periph.mk`/`SUBMODULES`
mechanism to add matching source files names to `SRC` and so select
the implementation for each CPU type.
It is replaced by just explicitly selecting the right source file.
The commit
- improves the timing of the SDA and SCL signals that fixes communication problems with some slaves (#10115),
- introduces the internal function _i2c_clear which clears the bus when SDA line is locked at LOW, and
- renames internal _i2c_*_sda and _i2c_*_scl functions to function names that are more clear, e.g., _i2c_clear_sda to _i2c_sda_low.
