1
0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00

boards/cpu/esp32*: doc fix of built-in ROM size

This commit is contained in:
Gunar Schorcht 2019-03-25 14:00:28 +01:00
parent 6bbd3a5c27
commit 01d17793eb
6 changed files with 6 additions and 6 deletions

View File

@ -69,7 +69,7 @@ Vendor | Espressif | |
Cores | 1 or 2 x Tensilica Xtensa LX6 | 1 core
FPU | yes (ULP - Ultra low power co-processor) | no
RAM | 520 kByte SRAM <br> 16 kByte RTC SRAM | yes
ROM | 520 kByte | yes
ROM | 448 kByte | yes
Flash | 512 kByte ... 16 MByte | yes
Frequency | 240 MHz, 160 MHz, 80 MHz | yes
Power Consumption | 68 mA @ 240 MHz <br> 44 mA @ 160 MHz <br> 31 mA @ 80 MHz <br> 5 uA in deep sleep mode | yes <br> yes <br> yes <br> no

View File

@ -62,7 +62,7 @@ Vendor | Espressif | |
Cores | 1 or 2 x Tensilica Xtensa LX6 | 1 core
FPU | yes (ULP - Ultra low power co-processor) | no
RAM | 520 kByte SRAM <br> 16 kByte RTC SRAM | yes
ROM | 520 kByte | yes
ROM | 448 kByte | yes
Flash | 512 kByte ... 16 MByte | yes
Frequency | 240 MHz, 160 MHz, 80 MHz | yes
Power Consumption | 68 mA @ 240 MHz <br> 44 mA @ 160 MHz <br> 31 mA @ 80 MHz <br> 5 uA in deep sleep mode | yes <br> yes <br> yes <br> no

View File

@ -55,7 +55,7 @@ Vendor | Espressif | |
Cores | 1 or 2 x Tensilica Xtensa LX6 | 1 core
FPU | yes (ULP - Ultra low power co-processor) | no
RAM | 520 kByte SRAM <br> 16 kByte RTC SRAM | yes
ROM | 520 kByte | yes
ROM | 448 kByte | yes
Flash | 512 kByte ... 16 MByte | yes
Frequency | 240 MHz, 160 MHz, 80 MHz | yes
Power Consumption | 68 mA @ 240 MHz <br> 44 mA @ 160 MHz <br> 31 mA @ 80 MHz <br> 5 uA in deep sleep mode | yes <br> yes <br> yes <br> no

View File

@ -49,7 +49,7 @@ Vendor | Espressif | |
Cores | 1 or 2 x Tensilica Xtensa LX6 | 1 core
FPU | yes (ULP - Ultra low power co-processor) | no
RAM | 520 kByte SRAM <br> 16 kByte RTC SRAM | yes
ROM | 520 kByte | yes
ROM | 448 kByte | yes
Flash | 512 kByte ... 16 MByte | yes
Frequency | 240 MHz, 160 MHz, 80 MHz | yes
Power Consumption | 68 mA @ 240 MHz <br> 44 mA @ 160 MHz <br> 31 mA @ 80 MHz <br> 5 uA in deep sleep mode | yes <br> yes <br> yes <br> no

View File

@ -57,7 +57,7 @@ Vendor | Espressif | |
Cores | 1 or 2 x Tensilica Xtensa LX6 | 1 core
FPU | yes (ULP - Ultra low power co-processor) | no
RAM | 520 kByte SRAM <br> 16 kByte RTC SRAM | yes
ROM | 520 kByte | yes
ROM | 448 kByte | yes
Flash | 512 kByte ... 16 MByte | yes
Frequency | 240 MHz, 160 MHz, 80 MHz | yes
Power Consumption | 68 mA @ 240 MHz <br> 44 mA @ 160 MHz <br> 31 mA @ 80 MHz <br> 5 uA in deep sleep mode | yes <br> yes <br> yes <br> no

View File

@ -139,7 +139,7 @@ Vendor | Espressif | |
Cores | 1 or 2 x Tensilica Xtensa LX6 | 1 core
FPU | yes (ULP - Ultra low power co-processor) | no
RAM | 520 kByte SRAM <br> 16 kByte RTC SRAM | yes
ROM | 520 kByte | yes
ROM | 448 kByte | yes
Flash | 512 kByte ... 16 MByte | yes
Frequency | 240 MHz, 160 MHz, 80 MHz | yes
Power Consumption | 68 mA @ 240 MHz <br> 44 mA @ 160 MHz <br> 31 mA @ 80 MHz <br> 5 uA in deep sleep mode | yes <br> yes <br> yes <br> no