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Commit Graph

42546 Commits

Author SHA1 Message Date
Marian Buschsieweke
c78c0056ea
boards/common/cc26xx_cc13xx: Fix flashing with upstream OpenOCD
This adds a work around that allows flashing with upstream OpenOCD,
most of the time.
2023-01-10 22:39:35 +01:00
Gunar Schorcht
9eff2958ee cpu/esp32: fix TOC in doc.txt regarding toolchain settings 2023-01-10 22:29:02 +01:00
Gunar Schorcht
14bfabd6e9 dist/tools/esptools/export.sh: fix IDF_TOOL_PATH default setting 2023-01-10 22:12:56 +01:00
Marian Buschsieweke
3e1dcf31cb
tools/openocd: Allow specifying a custom halt command
Typically, OpenOCD is already performing a reset on connect. A
`reset halt` to bring the target to a `halt` state for flashing will
result in the device going through a second reset cycle. This can be
problematic with some device, such as the CC26xx MCUs. For these
devices, an `OPENOCD_CMD_RESET_HALT := -c 'halt'` will avoid the second
reset that is causing the issues.
2023-01-10 21:59:56 +01:00
Marian Buschsieweke
5c163180ad
boards/cc{13xx,26xx}: add JLink support
Add the required variables to support flashing with `PROGRAMMERS=jlink`.
2023-01-10 21:58:19 +01:00
Marian Buschsieweke
c4ff80b6b9
boards/cc{13xx,26xx}: clean up OpenOCD config
Place common OpenOCD configs for the different cc13xx and cc26xx
families in boards/common/cc26xx_cc13xx/dist and automatically select
the correct one based on the (prefix of the) value of `$(CPU_MODEL)`, if
`OPENOCD_CONFIG` was not specified and no custom `openocd.cfg` is
located in the board's `dist` folder.

The `cc2650-launchpad` and `cc2650stk` have been adapted to use the
common config instead.
2023-01-10 21:58:19 +01:00
Marian Buschsieweke
7bb5232792
makefiles/tools/openocd-adapters: add XDS110 support
This adds the configuration to allow choosing the XDS110 used in
cc13xx-launchpad and cc26xx-launchpad boards via the
`OPENOCD_DEBUG_ADAPTER` variable.
2023-01-10 21:58:19 +01:00
bors[bot]
9dff974dc7
Merge #19123
19123: pkg/esp8266_sdk: fix version string generation r=kaspar030 a=gschorcht

### Contribution description

This PR (hopefully) fixes the problem of different binary hashes for the same application in subsequent compilations.

Patching a package creates a new HEAD of the package repository. Using `git describe --tag` to generate a version string used for the ESP8266 bootloader therefore generates a different version string for each new compilation, which in turn results in different hash values of the binaries for the same application in subsequent compilations in CI. To use the commit in `git describe --tag` for commit used by the package, the commit has to specified in the command.

### Testing procedure

Green CI

### Issues/PRs references

Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2023-01-10 20:31:13 +00:00
Gunar Schorcht
cc2a36581d pkg/esp8266_sdk: fix version string generation
Patching a package creates a new HEAD of the package repository. Using `git describe --tag` to generate a version string used for the ESP8266 bootloader therefore generates a different version string for each new compilation, which in turn results in different hash values of the binaries for the same application in subsequent compilations in CI. To use the commit in `git describe --tag` for commit used by the package, the commit has to specified in the command.
2023-01-10 20:22:40 +01:00
Benjamin Valentin
913d72cb99 socket_zep: don't discard frames if not in RX mode 2023-01-10 17:36:30 +01:00
Benjamin Valentin
3dedfb7a17 socket_zep: only report size of single datagram 2023-01-10 17:36:30 +01:00
bors[bot]
385569c7bf
Merge #17810 #18348 #19120
17810: drivers/slipdev: implement sleep states r=benpicco a=benpicco



18348: sys/net/gnrc/pktbuf_static: make use of alignas() r=maribu a=maribu

### Contribution description

Since we are now using C11, we can make use of `alignas()` provided by `<stdalign.h>` to make the alignment code easier to read.

### Testing procedure

I didn't expect this to change binaries, but is safes 4 bytes. `elf_diff` shows that the compiler (at least GCC 11.3.0) was not able to detect that `gnrc_pktbuf_static_buf` was just an alias for `_pktbuf_buf`. That makes sense since it would be hard without LTO to rule out external writes to `gnrc_pktbuf_static_buf`, unless one would have added a `const` (to the pointer, not to the data the pointer points to).

The [output of `elf_diff`](https://mari-bu.de/pr_18348_gnrc_pktbuf_static_elf_diff.html) looks otherwise quite unscary.

Also:

```
$ make BOARD=nucleo-f767zi -C tests/unittests/ tests-pktbuf flash test
make: Entering directory '/home/maribu/Repos/software/RIOT/tests/unittests'
Building application "tests_unittests" for "nucleo-f767zi" with MCU "stm32".
[...]
Welcome to pyterm!
Type '/exit' to exit.
READY
s
START
.............................................
OK (45 tests)

make: Leaving directory '/home/maribu/Repos/software/RIOT/tests/unittests'
```

### Issues/PRs references

None

19120: CI: seperate check-labels and check-commits workflows r=maribu a=kaspar030



Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Co-authored-by: Kaspar Schleiser <kaspar@schleiser.de>
2023-01-10 15:44:57 +00:00
Marian Buschsieweke
5fbc5e0705
boards/qn9080dk: Improve doc and add J-Link support
- document that the QN9080DK has an alternative firmware for the
  debugger/programmer that supports J-Link
- allow selecting the debugger firmware via parameter / environment
  variable
- add `JLINK_DEVICE` parameter to allow flashing via J-Link
2023-01-10 16:10:50 +01:00
Benjamin Valentin
8a80e70e5e cpu/native: syscalls: provide real_recv() 2023-01-10 14:24:16 +01:00
1e29dd3267 CI: seperate check-labels and check-commits workflows 2023-01-10 12:48:21 +01:00
bors[bot]
53176f7b9e
Merge #18134 #18738 #18939 #19118
18134: nanocoap_link_format: add helper function to parse Link Format r=kaspar030 a=benpicco



18738: nanocoap_sock: implement nanocoap_sock_delete() r=maribu a=benpicco



18939: gnrc_ipv6_nib: clean up _resolve_addr() r=maribu a=benpicco



19118: sys/ztimer: ztimer_mock: guard ztimer_ondemand static functions r=kaspar030 a=kaspar030



Co-authored-by: Benjamin Valentin <benpicco@beuth-hochschule.de>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Co-authored-by: Benjamin Valentin <benjamin.valentin@bht-berlin.de>
Co-authored-by: Kaspar Schleiser <kaspar@schleiser.de>
2023-01-10 11:25:32 +00:00
Benjamin Valentin
bb084612f5 drivers/slipdev: implement sleep states 2023-01-10 12:24:30 +01:00
ccc3c936c4 sys/ztimer: ztimer_mock: guard ztimer_ondemand static functions 2023-01-10 09:11:17 +01:00
bors[bot]
de0bd9770f
Merge #19115 #19116
19115: boards/hip-badge: fix doc rendering r=benpicco a=benpicco



19116: makefiles/cargo-targets.inc.mk: Fix RISC-V target r=kaspar030 a=maribu

### Contribution description

Update the list of target triples to match
`makefiles/arch/riscv.inc.mk`. This fixes compilation with toolchains other than the obsolete toolchain that uses the incorrect `riscv-none-embed` triple.

### Testing procedure

```
make BOARD=hifive1b -C examples/rust-gcoap
```

Fails on `master` with a recent RISC-V toolchain, but hopefully compiles with this PR.

### Issues/PRs references

None

Co-authored-by: Benjamin Valentin <benjamin.valentin@bht-berlin.de>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-01-09 23:49:42 +00:00
bors[bot]
bb708e2f9c
Merge #19109
19109: cpu/gd32v: fix and extend Kconfig clock settings r=benpicco a=gschorcht

### Contribution description

This PR fixes the following issus of the clock configuration which led to highly deviating peripheral clocks so that the UART interface was not usable in my case:

1. Setting the `RCU_CTL` register just to the IRC8M bit also removes the IRC8M calibration and trim adjust value in this register. Therefore IRC8M calibration and trim adjust value have to be preserved and the IRC8M has to be set.
2. `CLOCK_HXTAL` is a value and not a flag, so that shifting to the left changes anything in the register but does not set the PLLSEL bit. `RCU_CFG0_PLLSEL_Msk` has to be used instead to set the PLLSEL bit.
3. `CONFIG_BOARD_HAS_HXTAL` is used to indicate that the board has an HXTAL connected. If the HXTAL is present, it is used as PLL clock source. But if the HXTAL is not present, the half IRC8M clock should be used as PLL clock source and must not be disabled at the end of clock settings. Using IRC8M clock as PLL clock source also requires another PLL multiplication factor.

Issues 1 and 2 led to the problem that IRC8M was used without calibration instead of HXTAL. With the fixes, the GD32V is working with as well as without HXTAL correctly.

Furthermore, the Kconfig configuration has been extended. It is now possible to configure the HXTAL frequency as well, since the GD32VF103 allows HXTAL clocks from 3 MHz to 25 MHz. This has currently been added directly to the board's Kconfig, as it is currently the only GD32VF103 board. It should be moved to a common Kconfig later when more GD32V boards are added.

### Testing procedure

`BOARD=seeedstudio-gd32 make -C tests/shell flash term` should still work.

### Issues/PRs references


Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2023-01-09 21:06:17 +00:00
Gunar Schorcht
72d11d84b8 boards/seeedstudio-gd32: extend Kconfig by clock configuration
The configuration whether a HXTAL is present and what its clock frequency is will be added to Kconfig. Since it is the only GD32V board at the moment, the configuration is added to the Kconfig of the board, but should be moved to a common Kconfig later when more GD32V boards are added.
2023-01-09 21:51:54 +01:00
Marian Buschsieweke
4a00835415
makefiles/cargo-targets.inc.mk: Fix RISC-V target
Update the list of target triples to match
`makefiles/arch/riscv.inc.mk`. This fixes compilation with toolchains
other than the obsolete toolchain that uses the incorrect
`riscv-none-embed` triple.
2023-01-09 20:36:52 +01:00
Benjamin Valentin
e62a415fd2 boards/hip-badge: fix doc rendering 2023-01-09 20:07:05 +01:00
bors[bot]
58d5847d11
Merge #19113
19113: boards/native: Drop backward compatibility code for glibc <= 2.17 r=maribu a=maribu

### Contribution description

Even Debian [oldstable is now at glibc 2.28](https://packages.debian.org/source/buster/glibc), so it is safe to assume that nobody needs this anymore.

This also fixes garbage on the terminal on musl systems, where `ldd --version` is not supported (and output on `stderr` was not redirected to `/dev/null`).

### Testing procedure

The CI will check if this breaks the `native` board.

### Issues/PRs references

None

Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-01-09 16:25:25 +00:00
bors[bot]
e2538a898a
Merge #19076
19076: boards/hip-badge: add HiP Badge board definition r=maribu a=benpicco



Co-authored-by: Benjamin Valentin <benpicco@beuth-hochschule.de>
2023-01-09 13:33:40 +00:00
Marian Buschsieweke
4acc9d9c89
boards/native: Drop backward compatibility code for glibc <= 2.17
Even Debian oldstable is now at glibc 2.28, so it is safe to assume that
nobody needs this anymore.

This also fixes garbage on the terminal on musl systems, where
`ldd --version` is not supported (and output on `stderr` was not
redirected to `/dev/null`).
2023-01-09 14:13:59 +01:00
Benjamin Valentin
82d7368415 boards/hip-badge: add HiP Badge board definition 2023-01-09 14:08:22 +01:00
Benjamin Valentin
64a2fbcebd gnrc_ipv6_nib: clean up _resolve_addr() 2023-01-09 14:04:47 +01:00
bors[bot]
ecf0ad31b6
Merge #19112
19112: cpu/riscv_common/periph_timer: Fix timer_clear() r=benpicco a=maribu

### Contribution description

Previously, timer_clear() was a no-op, resulting in spurious IRQs from already canceled timeouts. This fixes the issue.

### Testing procedure

```
$ make BOARD=hifive1b flash test -C tests/periph_timer
[...]
Welcome to pyterm!
Bench Clock Reset Complete

ATE0-->ATE0
OK
AT+BLEINIT=0-->OK
AT+CWMODE=0-->OK

Help: Press s to start test, r to print it is ready
READY
s
START
main(): This is RIOT! (Version: 2023.01-devel-773-g441b69)

Test for peripheral TIMERs

Available timers: 1

Testing TIMER_0:
TIMER_0: initialization successful
TIMER_0: stopped
TIMER_0: set channel 0 to 5000
TIMER_0: starting
TIMER_0: channel 0 fired at SW count  3164199 - init:  3164199

TEST SUCCEEDED
```

(In `master`, the test fails with a spurious IRQ.)

### Issues/PRs references

https://github.com/RIOT-OS/RIOT/issues/18976

Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-01-09 06:52:34 +00:00
Benjamin Valentin
55b5c47bc8 cpu/esp32: add stdio_usb_serial_jtag 2023-01-09 00:51:27 +01:00
Marian Buschsieweke
525751c33b
cpu/riscv_common/periph_timer: Fix timer_clear()
Previously, timer_clear() was a no-op, resulting in spurious IRQs from
already canceled timeouts. This fixes the issue.
2023-01-09 00:08:59 +01:00
bors[bot]
79837e2dd4
Merge #19090 #19111
19090: boards/hamilton: Add minimal doc r=benpicco a=maribu

### Contribution description

The doc of the board is still suboptimal, but at least an image to identify what board this is and a link to further information is a starting point.

### Testing procedure

The static tests will do.

### Issues/PRs references

None.

19111: boards/common/nrf52: Fix detection of JLinkExe r=kaspar030 a=maribu

### Contribution description

For nRF52 J-Link was intended to be preferred as programmer over OpenOCD when both are available, but falling back to OpenOCD when JLinkExe is not found in `$PATH`. However, there was call the shell missing to actually detect `JLinkExe`.

### Testing procedure

E.g. `make BOARD=nrf52840dk -C examples/default flash` should use J-Link again as default when both are installed.

### Issues/PRs references

None

Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-01-08 22:55:06 +00:00
Benjamin Valentin
59f067171f core/init: call vfs_bind_stdio() in early_init() 2023-01-08 22:26:13 +01:00
Benjamin Valentin
124b849503 cpu: call early_init() 2023-01-08 22:26:12 +01:00
Benjamin Valentin
092b235845 core/init: add early_init()
Add a function to initialize LEDs and UART in early boot.
2023-01-08 22:25:10 +01:00
bors[bot]
a36e1c180e
Merge #19110
19110: boards/hifive1b: minor improvements r=kaspar030 a=maribu

### Contribution description

- Cleaning up flash config
    - Only defaulting to J-Link as flasher when actually installed
- Add TTY_BOARD_FILTER to more reliably select the TTY of the HiFive1b board

### Testing procedure

- Flashing should still work
- Flashing should prefer J-Link over OpenOCD when both are available
- Flashing should prefer OpenOCD over J-Link when J-Link is not found

### Issues/PRs references

None

Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-01-08 20:07:41 +00:00
Marian Buschsieweke
6551b03640
boards/common/nrf52: Fix detection of JLinkExe
For nRF52 J-Link was intended to be preferred as programmer over OpenOCD
when both are available, but falling back to OpenOCD when JLinkExe is
not found in `$PATH`. However, there was call the shell missing to
actually detect `JLinkExe`.
2023-01-08 20:16:27 +01:00
Marian Buschsieweke
90abf7c9a1
boards/hifive1b: Add TTY_BOARD_FILTER
This allows to reliably select the TTY of a connected HiFive board even
when multiple boards are connected, provided `MOST_RECENT_PORT=1` is
set.
2023-01-08 20:13:13 +01:00
Marian Buschsieweke
1814bcd211
boards/hifive1b: Clean up flashing parameters
- OpenOCD and J-Link flash configuration can be provided
  unconditionally, as those variables do not conflict with any others
- Only use J-Link as default flasher if actually installed
2023-01-08 20:13:13 +01:00
Gunar Schorcht
f4d6b2d642 cpu/gd32v: fix clock setting
`CONFIG_BOARD_HAS_HXTAL` is used to indicate that the board has an HXTAL connected. If the HXTAL is present, it is used as PLL clock source. But if the HXTAL is not present, the half IRC8M clock should be used as PLL clock source and must not be disabled at the end of clock settings. Using IRC8M clock as PLL clock source also requires another PLL multiplication factor.
2023-01-08 11:32:28 +01:00
Gunar Schorcht
e4010f7445 cpu/gd32v: fix clock setting
`CLOCK_HXTAL` is a value and not a flag, so that shifting to the left changes anything in the register but does not set the PLLSEL bit. `RCU_CFG0_PLLSEL_Msk` has to be used instead to set the PLLSEL bit.
2023-01-08 10:42:01 +01:00
Gunar Schorcht
dd0593a3c8 cpu/gd32v: fix clock setting
Setting the `RCU_CTL` register just to the IRC8M bit also removes the IRC8M calibration and trim adjust value in this register. Therefore IRC8M calibration and trim adjust value have to be preserved and the IRC8M has to be set.
2023-01-08 10:42:01 +01:00
bors[bot]
441b69964c
Merge #19106
19106: core/lib: Add macros/utils.h header r=aabadie a=maribu

### Contribution description

The macros CONCAT(), MIN(), and MAX() are defined over and over again in RIOT's code base. This de-duplicates the code by moving the macros to a common place.

### Testing procedure

Generated binaries don't change, as this only a de-duplication of macros that doesn't change their definition.

### Issues/PRs references

None

Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-01-07 21:16:51 +00:00
bors[bot]
07031d0239
Merge #19099
19099: dist/tools/usb-serial: Clean up legacy scripts r=aabadie a=maribu

### Contribution description

Refactor the old bash scripts to use `ttys.py` instead and update the documentation.

### Testing procedure

The pi fleet should still work without modification.

### Issues/PRs references

Fixes https://github.com/RIOT-OS/RIOT/issues/15814

Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-01-07 16:24:51 +00:00
Gunar Schorcht
c21eb6b8a8 tests/periph_flashpage: use od_hex_dump for memdump
Replaces the custom `memdump` implementation with `od_hex_dump`, which provides a more common and especially more compact print format.
2023-01-07 14:49:36 +01:00
Gunar Schorcht
32168da8d6 cpu/esp32: add flashpage support
f
2023-01-07 14:49:36 +01:00
bors[bot]
d193988db2
Merge #19105
19105: Documentation: Document PWM and other Peripherals for Weact STM32F4x1Cx boards r=maribu a=jhaand

### Contribution description
The  Weact boards with STM32F4x1Cx MCU's have their PWM outputs enabled. But these currently do not show in the the documentation. This PR updates the documentation for these 3 boards.  

### Testing procedure
I rebuild the documentation with `make doc` and checked the resulting 3 html files. 

### Issues/PRs references
Fixes this issue: https://github.com/jhaand/RIOT/issues/1
Also referred to in this issue: https://github.com/RIOT-OS/RIOT/issues/19103

### Context
Discussed `@maribu` and `@benpicco` on matrix [link](https://matrix.to/#/!pqHdpanAvkJvlCwUDE:matrix.org/$lEMfOAG5rGGrkEjfJcsg0nC1Ebj4vlitvH9zm8uP-NM?via=matrix.org&via=rubdos.be&via=schleiser.de)


Co-authored-by: Jelle Haandrikman <jhaand@freedom.nl>
2023-01-07 10:28:49 +00:00
Gunar Schorcht
80833a74e8 cpu/esp32: add flashpage support to linker scripts 2023-01-07 10:38:52 +01:00
Gunar Schorcht
6f9c64c6cb cpu/esp32: add flashpage support to Kconfig 2023-01-07 10:38:52 +01:00
Gunar Schorcht
f4c0d7da71 cpu/esp32: add flashpage definitions in CPU config 2023-01-07 10:38:52 +01:00