boards/cc{13xx,26xx}: clean up OpenOCD config

Place common OpenOCD configs for the different cc13xx and cc26xx
families in boards/common/cc26xx_cc13xx/dist and automatically select
the correct one based on the (prefix of the) value of `$(CPU_MODEL)`, if
`OPENOCD_CONFIG` was not specified and no custom `openocd.cfg` is
located in the board's `dist` folder.

The `cc2650-launchpad` and `cc2650stk` have been adapted to use the
common config instead.

boards/cc2650-launchpad/Makefile.include

@@ -1,6 +1,4 @@
 XDEBUGGER = XDS110
 
-OPENOCD_CONFIG ?= $(BOARDDIR)/dist/openocd.cfg
-
 # configure the flash tool
 include $(RIOTBOARD)/common/cc26xx_cc13xx/Makefile.include

boards/cc2650-launchpad/dist/openocd.cfg

@@ -1,43 +0,0 @@
-# Config for Texas Instruments low power SoC CC26xx family
-
-adapter_khz 100
-
-source [find target/icepick.cfg]
-source [find target/ti-cjtag.cfg]
-
-if { [info exists CHIPNAME] } {
-   set _CHIPNAME $CHIPNAME
-} else {
-   set _CHIPNAME cc26xx
-}
-
-#
-# Main DAP
-#
-if { [info exists DAP_TAPID] } {
-   set _DAP_TAPID $DAP_TAPID
-} else {
-   set _DAP_TAPID 0x4BA00477
-}
-jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
-jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
-
-#
-# ICEpick-C (JTAG route controller)
-#
-if { [info exists JRC_TAPID] } {
-   set _JRC_TAPID $JRC_TAPID
-} else {
-   set _JRC_TAPID 0x1B99A02F
-}
-jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
-# A start sequence is needed to change from cJTAG (Compact JTAG) to
-# 4-pin JTAG before talking via JTAG commands
-jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
-jtag configure $_CHIPNAME.jrc -event post-reset "ti_cjtag_to_4pin_jtag $_CHIPNAME.jrc"
-
-#
-# Cortex M3 target
-#
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.dap

boards/cc2650stk/Makefile.include

@@ -1,6 +1,4 @@
 XDEBUGGER = XDS110
 
-OPENOCD_CONFIG ?= $(BOARDDIR)/dist/openocd.cfg
-
 # configure the flash tool
 include $(RIOTBOARD)/common/cc26xx_cc13xx/Makefile.include

boards/cc2650stk/dist/openocd.cfg

@@ -1,43 +0,0 @@
-# Config for Texas Instruments low power SoC CC26xx family
-
-adapter_khz 100
-
-source [find target/icepick.cfg]
-source [find target/ti-cjtag.cfg]
-
-if { [info exists CHIPNAME] } {
-   set _CHIPNAME $CHIPNAME
-} else {
-   set _CHIPNAME cc26xx
-}
-
-#
-# Main DAP
-#
-if { [info exists DAP_TAPID] } {
-   set _DAP_TAPID $DAP_TAPID
-} else {
-   set _DAP_TAPID 0x4BA00477
-}
-jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
-jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
-
-#
-# ICEpick-C (JTAG route controller)
-#
-if { [info exists JRC_TAPID] } {
-   set _JRC_TAPID $JRC_TAPID
-} else {
-   set _JRC_TAPID 0x1B99A02F
-}
-jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
-# A start sequence is needed to change from cJTAG (Compact JTAG) to
-# 4-pin JTAG before talking via JTAG commands
-jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
-jtag configure $_CHIPNAME.jrc -event post-reset "ti_cjtag_to_4pin_jtag $_CHIPNAME.jrc"
-
-#
-# Cortex M3 target
-#
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.dap

boards/common/cc26xx_cc13xx/Makefile.include

@@ -13,5 +13,30 @@ PROGRAMMERS_SUPPORTED += openocd uniflash
 # embedded debugger of these launchpad boards.
 TTY_BOARD_FILTER := --model XDS110 --iface-num 0
 
-OPENOCD_CONFIG ?= $(RIOTBOARD)/common/cc26xx_cc13xx/dist/openocd.cfg
 UNIFLASH_CONFIG ?= $(RIOTBOARD)/common/cc26xx_cc13xx/dist
+
+OPENOCD_DEBUG_ADAPTER ?= xds110
+
+ifneq (,$(filter cc13x0%,$(CPU_MODEL)))
+  DEFAULT_OPENOCD_CONFIG := $(RIOTBASE)/boards/common/cc26xx_cc13xx/dist/openocd_cc13x0.cfg
+endif
+ifneq (,$(filter cc13x2%,$(CPU_MODEL)))
+  DEFAULT_OPENOCD_CONFIG := $(RIOTBASE)/boards/common/cc26xx_cc13xx/dist/openocd_cc13x2.cfg
+endif
+ifneq (,$(filter cc26x0%,$(CPU_MODEL)))
+  DEFAULT_OPENOCD_CONFIG := $(RIOTBASE)/boards/common/cc26xx_cc13xx/dist/openocd_cc26x0.cfg
+endif
+ifneq (,$(filter cc26x2%,$(CPU_MODEL)))
+  DEFAULT_OPENOCD_CONFIG := $(RIOTBASE)/boards/common/cc26xx_cc13xx/dist/openocd_cc26x2.cfg
+endif
+
+# if no openocd specific configuration file, check for default locations:
+# 1. Using the default dist/openocd.cfg (automatically set by openocd.sh)
+# 2. Using the common cpu specific config file
+ifeq (,$(OPENOCD_CONFIG))
+  # if no openocd default configuration is provided by the board,
+  # use the default cc26xx / cc13xx config
+  ifeq (0,$(words $(wildcard $(BOARDDIR)/dist/openocd.cfg)))
+    OPENOCD_CONFIG := $(DEFAULT_OPENOCD_CONFIG)
+  endif
+endif

boards/common/cc26xx_cc13xx/dist/openocd.cfg

@@ -1,11 +0,0 @@
-source [find interface/xds110.cfg]
-
-transport select jtag
-gdb_memory_map enable
-gdb_flash_program enable
-
-source [find target/ti_cc26x2.cfg]
-
-adapter_nsrst_assert_width 250
-adapter_nsrst_delay 400
-adapter_khz 1000

boards/common/cc26xx_cc13xx/dist/openocd_cc13x0.cfg

@@ -0,0 +1 @@
+source [find target/ti_cc13x0.cfg]

boards/common/cc26xx_cc13xx/dist/openocd_cc13x2.cfg

@@ -0,0 +1 @@
+source [find target/ti_cc13x2.cfg]

boards/common/cc26xx_cc13xx/dist/openocd_cc26x0.cfg

@@ -0,0 +1 @@
+source [find target/ti_cc26x0.cfg]

boards/common/cc26xx_cc13xx/dist/openocd_cc26x2.cfg

@@ -0,0 +1 @@
+source [find target/ti_cc26x2.cfg]