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cpu/gd32v: fix clock setting

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Setting the `RCU_CTL` register just to the IRC8M bit also removes the IRC8M calibration and trim adjust value in this register. Therefore IRC8M calibration and trim adjust value have to be preserved and the IRC8M has to be set.
This commit is contained in:
Gunar Schorcht 2023-01-08 10:38:36 +01:00
parent 441b69964c
commit dd0593a3c8
2 changed files with 3 additions and 2 deletions
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2
boards/seeedstudio-gd32/include/periph_conf.h
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@ -32,7 +32,7 @@ extern "C" {
#endif
#define CLOCK_HXTAL MHZ(8) /**< HXTAL frequency */
#define CLOCK_CORECLOCK MHZ(104) /**< CPU clock frequency in Hz */
#define CLOCK_CORECLOCK MHZ(108) /**< CPU clock frequency in Hz */
/**
* @name Timer configuration

3
cpu/gd32v/clock.c
View File

@ -119,7 +119,8 @@ void gd32vf103_clock_init(void)
(RCU_CFG0_SCS_IRC8 << RCU_CFG0_SCSS_Pos)) {}
/* disable all active clocks except IRC8 -> resets the clk configuration */
RCU->CTL = (RCU_CTL_IRC8MEN_Msk);
RCU->CTL &= (RCU_CTL_IRC8MCALIB_Msk | RCU_CTL_IRC8MADJ_Msk);
RCU->CTL |= RCU_CTL_IRC8MEN_Msk;
if (IS_ACTIVE(CONFIG_BOARD_HAS_HXTAL)) {
cpu_reg_enable_bits(&RCU->CTL, RCU_CTL_HXTALEN_Msk);