tools/openocd: Allow specifying a custom halt command

Typically, OpenOCD is already performing a reset on connect. A
`reset halt` to bring the target to a `halt` state for flashing will
result in the device going through a second reset cycle. This can be
problematic with some device, such as the CC26xx MCUs. For these
devices, an `OPENOCD_CMD_RESET_HALT := -c 'halt'` will avoid the second
reset that is causing the issues.

dist/tools/openocd/openocd.sh

@@ -113,6 +113,8 @@
 : ${OPENOCD_DBG_EXTRA_CMD:=}
 # command used to reset the board
 : ${OPENOCD_CMD_RESET_RUN:="-c 'reset run'"}
+# command used to halt the board
+: ${OPENOCD_CMD_RESET_HALT:="-c 'reset halt'"}
 # Select core on multi-core processors.
 : ${OPENOCD_CORE:=}
 # Set to any value to skip verifying after flashing.
@@ -241,7 +243,7 @@ _flash_list_raw() {
             ${OPENOCD_EXTRA_RESET_INIT} \
             -c 'init' \
             -c 'targets' \
-            -c 'reset halt' \
+            ${OPENOCD_CMD_RESET_HALT} \
             -c 'flash probe 0' \
             -c 'flash list' \
             -c 'shutdown'" 2>&1 && return
@@ -366,7 +368,7 @@ do_flash() {
             -c 'gdb_port 0' \
             -c 'init' \
             -c 'targets' \
-            -c 'reset halt' \
+            ${OPENOCD_CMD_RESET_HALT} \
             ${OPENOCD_PRE_FLASH_CMDS} \
             -c 'flash write_image erase \"${IMAGE_FILE}\" ${IMAGE_OFFSET} ${IMAGE_TYPE}' \
             ${OPENOCD_PRE_VERIFY_CMDS} \

makefiles/tools/openocd.inc.mk

@@ -38,6 +38,11 @@ ifneq (,$(OPENOCD_CMD_RESET_RUN))
   $(call target-export-variables,reset,OPENOCD_CMD_RESET_RUN)
 endif
 
+ifneq (,$(OPENOCD_CMD_RESET_HALT))
+  # Export OPENOCD_CMD_RESET_HALT only to the flash targets
+  $(call target-export-variables,flash%,OPENOCD_CMD_RESET_HALT)
+endif
+
 OPENOCD_DEBUG_TARGETS = debug debugr debug-server
 
 ifneq (,$(OPENOCD_DBG_EXTRA_CMD))