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Commit Graph

170 Commits

Author SHA1 Message Date
Marian Buschsieweke
72d0b2b180
cpu/sam0_common/periph_gpio_ll: fix gpio_get_port()
It turns out that the legacy GPIO API and GPIO LL may disagree on what
the GPIO base address is: GPIO LL will use the IOBUS as base address
no matter what, the legacy GPIO API will use the APB as base address
unless `periph_gpio_fast_read` is used.

If the APIs disagree, we need to do impedance matching.
2024-11-18 12:50:25 +01:00
Dylan Laduranty
a9cb19dcc5 cpu/samr30: create compatibility headers for vendor files migration
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2024-11-07 21:25:03 +01:00
Dylan Laduranty
7d83c7a9d2 cpu/samr34: create compatibility headers for vendor files migration
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2024-11-07 21:22:23 +01:00
Dylan Laduranty
fb8473a2ea cpu/saml21: create compatibility headers for vendor files migration
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2024-09-04 11:38:07 +02:00
Marian Buschsieweke
36e8526046
drivers/periph_gpio_ll: change API to access GPIO ports
The API was based on the assumption that GPIO ports are mapped in memory
sanely, so that a `GPIO_PORT(num)` macro would work allow for constant
folding when `num` is known and still be efficient when it is not.

Some MCUs, however, will need a look up tables to efficiently translate
GPIO port numbers to the port's base address. This will prevent the use
of such a `GPIO_PORT(num)` macro in constant initializers.

As a result, we rather provide `GPIO_PORT_0`, `GPIO_PORT_1`, etc. macros
for each GPIO port present (regardless of MCU naming scheme), as well as
`GPIO_PORT_A`, `GPIO_PORT_B`, etc. macros if (and only if) the MCU port
naming scheme uses letters rather than numbers.

These can be defined as macros to the peripheral base address even when
those are randomly mapped into the address space. In addition, a C
function `gpio_port()` replaces the role of the `GPIO_PORT()` and
`gpio_port_num()` the `GPIO_PORT_NUM()` macro. Those functions will
still be implemented as efficient as possible and will allow constant
folding where it was formerly possible. Hence, there is no downside for
MCUs with sane peripheral memory mapping, but it is highly beneficial
for the crazy ones.

There are also two benefits for the non-crazy MCUs:
1. We can now test for valid port numbers with `#ifdef GPIO_PORT_<NUM>`
    - This directly benefits the test in `tests/periph/gpio_ll`, which
      can now provide a valid GPIO port for each and every board
    - Writing to invalid memory mapped I/O addresses was treated as
      triggering undefined behavior by the compiler and used as a
      optimization opportunity
2. We can now detect at compile time if the naming scheme of the MCU
   uses letters or numbers, and produce more user friendly output.
    - This is directly applied in the test app
2024-08-02 09:55:24 +02:00
Dylan Laduranty
04e4770379 cpu/sam0: remove bitfield usage in headers
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2024-06-25 16:13:17 +02:00
Benjamin Valentin
d6d7d90a2a cpu/sam0_common: eth: reduce TX buffer count 2024-05-23 17:19:32 +02:00
Teufelchen1
1cb2d7caed cpu/sam0: Remove deprecated muxpos 2024-04-03 11:59:48 +02:00
Marian Buschsieweke
06a05370a2
cpu/sam0_common: Implement gpio_ll_switch_dir 2024-02-05 10:56:16 +01:00
Marian Buschsieweke
b42b1998ec
cpu/sam0_common: fix vendor header files
Ran the `fix_headers.sh` to fix the vendor header files and removed
the no longer needed work around for them.
2024-01-31 14:46:23 +01:00
Marian Buschsieweke
1425dc0652
cpu/sam0_common: Update script to fix vendor headers
The script to fix the vendor header files has been renamed to
`fix_headers.sh` and now does two things:

1. Strip bogus type qualifiers in front of padding (as before)
2. Strip bogus `LITTLE_ENDIAN` defines.
2024-01-31 14:46:23 +01:00
Marian Buschsieweke
807fcd7614
cpu/sam0_common/periph_gpio_ll: fix doc
Fix some copy-paste bugs in the doc.
2024-01-23 15:51:36 +01:00
Marian Buschsieweke
1484d305bf
cpu/sam0_common: implement periph_gpio_ll_irq
Co-authored-by: benpicco <benpicco@googlemail.com>
2024-01-22 16:28:30 +01:00
Marian Buschsieweke
855756524f
cpu/sam0_common: Implement periph_gpio_ll
Co-authored-by: benpicco <benpicco@googlemail.com>
2024-01-22 16:28:16 +01:00
benpicco
208790a5f1
Merge pull request #20108 from benpicco/drivers/dose-uart_ondemand_tx
drivers/periph/uart: add periph_uart_tx_ondemand feature
2023-12-14 20:42:55 +00:00
Benjamin Valentin
60f8468191 cpu/sam0_common: implement uart_tx_ondemand 2023-12-14 18:30:38 +01:00
Gunar Schorcht
d089c122c1 cpu/sam0_common: improve doc consistency for MTDs 2023-12-14 17:26:29 +01:00
Urs Gompper
f352609c5e cpu/sam0_common: added peripheral FREQM configuration declaration 2023-11-23 21:00:16 +01:00
Gunar Schorcht
6ab9277234 cpu/sam0_common: add SDMMC support 2023-09-23 19:26:30 +02:00
bors[bot]
2a4496b32a
Merge #19539 #19815 #19860 #19886
19539: drivers/periph_sdmmc: define a High-level SDIO/SD/MMC API and low-level SDMMC periperal driver interface r=benpicco a=gschorcht

### Contribution description

This PR provides a SDIO/SD/MMC Device API (SDMMC). It implements a SD host controller driver that provides a high-level functions using a low-level SDIO/SD/MMC peripheral driver for accessing

- MultiMediaCards (MMC) and Embedded MultiMediaCards (eMMC)
- SD Memory Cards (SD Cards) with Standard Capacity (SDSC), High Capacity (SDHC) or Extended Capacity (SDXC).

It supports:

- 1-bit, 4-bit and 8-bit data bus width
- Default Speed and High Speed
- Auto-CLK

The SDIO/SD/MMC device API (SDMMC) is divided into two parts:

1. The high-level API that implements the SD Host Controller driver and allows
   - to inititialize and identify different types of cards,
   - to access them either blockwise or bytewise,
   - to get information about the used card, and
   - to send single commands or application specific commands to the card.

2. The low-level SDIO/SD/MMC peripheral driver implements the low-level functions required by the high-level device API. It has to be implemented for each MCU.

### Limitations:

- Only one card per SDIO/SD/MMC device is supported.
- eMMCs specific features are not supported.
- UHS-I, UHS-II and UHS-III are not supported.

### Testing procedure

PR #19540, PR #19760 or PR #19786 is needed to test this PR.

### Issues/PRs references

Prerequisite for PR #19540
Prerequisite for PR #19760
Prerequisite for PR #19786

19815: cpu/sam0_common/periph/sdhc: busy waiting and clock fixes r=benpicco a=benpicco



19860: drivers/ft5x06: fix vendor ID for FT6xx6 and FTxxxx register addresses r=benpicco a=gschorcht

### Contribution description

This PR provides a fix of the vendor ID for FT6xx6 touch panel driver ICs and a fix of register addresses for FTxxxx.

According to the [Application Note for FT6x06 CTPM](https://cdn-shop.adafruit.com/datasheets/FT6x06_AN_public_ver0.1.3.pdf), the vendor ID of FT6x06 touch panel driver ICs is `0x11` instead of `0xcd`. Although there are no information found in the Web about the FT6x36, the FT6336U touch panel of a ESP32-S3 WT32 SC01 Plus is also working with `0x11` as vendor ID so that it seems that FT6x36 is also using `0x11` as vendor ID.

Figured out with a `stm32f723e-disco` board (revision D03). Without this PR, `tests/drivers/ft5x06` gives:
```
+------------Initializing------------+
[ft5x06] init: invalid vendor ID: '0x11' (expected: 0xcd)
[Error] Initialization failed
```
With this PR it works as expected.
```
+------------Initializing------------+
Initialization successful
main(): This is RIOT! (Version: 2023.10-devel-96-gbb9011-drivers/ft5x06_fix_vendor_id)
FT5x06 test application

+------------Initializing------------+
[ft5x06] init: configuring touchscreen interrupt
Initialization successful
1 touch detected
[ft5x06] read gesture_id '0x00'
Touch 1 - X: 151, Y:138
[ft5x06] read gesture_id '0x00'
```

Some background information found in the Web:

- According to the [STM32CubeF7](c20e6dd15b/Drivers/BSP/STM32F723E-Discovery/stm32f723e_discovery_ts.c (L24-L27)) the FRIDA LCD panel mounted on the `stm32f723e-disco` board either uses FT6x36 (prior revision D) or FT3x67 (revision D). However, the FT5x06 driver type for the card is defined as FT6x06, which does not seem correct: bb9011c3fb/boards/stm32f723e-disco/include/board.h (L59)
- According to the [STM32CubeF7](c20e6dd15b/Drivers/BSP/Components/ft6x06/ft6x06.h (L269-L270)), the vendor ID for FT6x36 should be `0xcd`. However, the FT6336U on ESP32-S3 WT32 SC01 Plus works with vendor ID `0x11`.
- The [Adafruit FT6206 library](95118cd983/Adafruit_FT6206.h (L28)) uses `0x11` as vendor id.
- The `stm32l496g-disco` board uses a FT6236 which has vendor ID `0xcd`.

So the information available on the web is confusing. Maybe, a better solution would be to accept `0x11` as well as `0xcd` as vendor ID for FT6xxx touch panels. Unfortunately, there are no documents available on the registers directly from FocalTech 😟 so it seems to be more speculation than knowledge.

### Testing procedure


### Issues/PRs references



19886: cpu/efm32: fix DAC configuration r=benpicco a=gschorcht

### Contribution description

The EFM32 MCU allows the reference voltage to be configured per DAC device, not per DAC channel. Also, the DAC reference voltage was defined in the configuration but not used anywhere.

At the moment we have only defined one board (`stwstk6220a`) that uses the DAC, so changing the configuration interface shouldn't be critical.

### Testing procedure

`tests/periph/dac` should still work for the `stwstk6220a`
```
BOARD=slwstk6220a make -j8 -C tests/periph/dac flash
```
I don't have a `stwstk6220a` board (EFM32 Series 0) so that I can't test it. I could only test it for the `sltb009a` board (EFM32 Series 1) with the change for VDAC in PR #19887.

### Issues/PRs references


Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2023-08-23 16:55:09 +00:00
Marian Buschsieweke
a4bf63e483
cpu/sam0_common: fix vendor header files
Drop type qualifiers in front of anonymous bit fields (padding for
reserved bits) for compatibility with `clang++`. A four line bash
script was added to ease fixing new vendor header files.
2023-07-18 12:24:07 +02:00
Benjamin Valentin
84ceea33d0 cpu/sam0_common/periph/sdhc: always use 25 MHz 2023-07-11 12:46:36 +02:00
bors[bot]
0dfc05c77c
Merge #19165 #19303
19165: cpu/sam0_common: adc: implement 16 bit mode by oversampling r=dylad a=benpicco



19303: dist/tools/insufficient_memory: Minor improvements r=benpicco a=maribu

### Contribution description

`create_makefile.sh`:
- address all shellcheck warnings
- make script POSIX shell compatible
- use nproc to set the number of parallel jobs to increase throughput
- print error messages when building fails
- run `make info-boards-supported` with `EXTERNAL_BOARD_DIRS=""` to avoid adding out-of-tree boards to `Makefile.ci`.
- classify output as "not supported" also when used features are blacklisted, not only when required features are missing

`add_insufficient_memory_board.sh`:
- classify output as "not supported" also when used features are blacklisted, not only when required features are missing

### Testing procedure

Run the script; it should still work.

### Issues/PRs references

None

Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-02-23 23:58:02 +00:00
Benjamin Valentin
470bee59a7 cpu/sam0_common: implement 16 bit mode by oversampling 2023-02-23 22:17:48 +01:00
Hendrik van Essen
9b0cf96ecd cpu/sam0_common: add PERIPH_I2C_MAX_BYTES_PER_FRAME due to I2C limitations 2023-02-15 11:56:21 +01:00
Benjamin Valentin
bfe2391148 cpu/sam0_common: fix static checks in periph_cpu_common.h 2023-01-18 01:54:34 +01:00
Benjamin Valentin
9dcb3991d2 cpu/sam0_common: move adc_res_t to common code 2023-01-17 17:18:07 +01:00
Benjamin Valentin
5843ff4127 cpu/sam0_common: ADC keep muxpos as legacy define 2022-10-04 15:45:25 +02:00
Benjamin Valentin
a7c0bf5341 cpu/sam0_common: adc: drop pin from adc_conf_chan_t 2022-09-27 19:36:10 +02:00
benpicco
baf1687951
Merge pull request #18146 from benpicco/cpu/sam0_common/adc-diffmode
cpu/sam0_common: adc: add support for differential mode
2022-09-27 17:34:07 +02:00
Benjamin Valentin
66153a47cf treewide: fix typos 2022-09-15 23:31:40 +02:00
benpicco
4b6da5c8e4
Merge pull request #17863 from benpicco/sam0_sdhc
cpu/samd5x: add SD Host Controller implementation
2022-05-31 15:33:24 +02:00
Benjamin Valentin
babee877ce cpu/sam0_common: add SD Host Controller implementation 2022-05-31 11:07:20 +02:00
Benjamin Valentin
8075b69275 cpu/sam0_common: adc: handle differential mode
- store result in int16_t to ensure proper sign extension
 - double differential result to account for bit lost for sign
2022-05-30 20:41:18 +02:00
Benjamin Valentin
35588d46bd cpu/sam0_common: adc: Automatically configure extref pin 2022-05-02 16:23:49 +02:00
9feb1ffa68
cpu/sam0_common: allow for setting the ADC device for each line 2022-03-17 11:44:40 +01:00
Benjamin Valentin
e0f28f81d0 cpu/sam0_common: add missing MUX definitions
This adds the missing PINMUX modes to the enum.
2022-01-07 13:03:11 +01:00
a6b6f43ce2
sam0_common/usbdev: Adapt to xmit API 2021-11-16 20:17:04 +01:00
Jan Romann
4384795cb9
treewide: Remove excessive newlines 2021-08-13 19:50:38 +02:00
Benjamin Valentin
5f002ced1f Revert "cpu/sam0_common: UART: implement inverted RX & TX"
This reverts commit 585dc15f99.

I did misunderstand this feature: This only inverts the data
bits (instead of `c` uart will transmit `~c`), not the whole
line level.

This is not very useful on it's own, so revert it.
2021-05-21 12:47:03 +02:00
benpicco
bd6114ae9d
Merge pull request #16187 from benpicco/cpu/sam0_common/get_tamper
cpu/sam0_common: add rtc_get_tamper_event()
2021-04-13 14:11:46 +02:00
Benjamin Valentin
13fbb7c1a0 cpu/sam0_common: add rtc_tamper_pin_mask() 2021-04-13 10:45:16 +02:00
Benjamin Valentin
73dbda99ac cpu/sam0_common: add rtc_get_tamper()
Add a function to query which tamper event woke the CPU from hibernation.
2021-04-13 10:45:16 +02:00
dylad
99764b82ab cpu/sam0: correct periph_cpu_common.h documentation 2021-03-31 22:17:01 +02:00
Benjamin Valentin
31b8dad147 cpu/samd21: add support for SAMD20 2021-01-12 15:48:39 +01:00
Benjamin Valentin
7b65398ae1 cpu/sam0_common: add samd20 vendor files
Files from Atmel.SAMD20_DFP.1.3.165.atpack
2021-01-12 15:48:39 +01:00
dylad
e98459f414 cpu/saml11: fix GPIO/IOBUS management 2020-12-15 17:00:54 +01:00
dylad
a1f5b6182d cpu/sam0: add initial Ethernet support 2020-12-13 22:01:50 +01:00
Benjamin Valentin
8f72212eb0 cpu/sam0_common: SPI: add support for QSPI in SPI mode
We can use the QSPI peripheral as an additional (non-Quad) SPI peripheral.
2020-12-11 22:33:08 +01:00
Benjamin Valentin
531fca952b cpu/sam0_common: add samd10 vendor files
Files from Atmel.SAMD10_DFP.1.1.77.atpack
2020-12-11 18:25:36 +01:00