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cpu/sam0_common/periph_gpio_ll: fix gpio_get_port()
It turns out that the legacy GPIO API and GPIO LL may disagree on what the GPIO base address is: GPIO LL will use the IOBUS as base address no matter what, the legacy GPIO API will use the APB as base address unless `periph_gpio_fast_read` is used. If the APIs disagree, we need to do impedance matching.
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@ -159,7 +159,15 @@ static inline void gpio_ll_switch_dir_input(gpio_port_t port, uword_t inputs)
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static inline gpio_port_t gpio_get_port(gpio_t pin)
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{
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return (gpio_port_t)(pin & ~(0x1f));
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/* GPIO LL and legacy GPIO API may disagree on what is the GPIO base
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* address if one is using the IOBUS and the other is using the APB for
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* access. In this case, we need to do impedance matching by adding the
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* offset. */
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const uintptr_t gpio_ll_base = GPIO_PORT_0;
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const uintptr_t gpio_legacy_base = GPIO_PIN(0, 0) & ~(0x1f);
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uintptr_t addr = (pin & ~(0x1f));
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return addr + (gpio_ll_base - gpio_legacy_base);
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}
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static inline uint8_t gpio_get_pin_num(gpio_t pin)
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