From 72d0b2b180ede7a2e483f9221d3efae7e7c264a9 Mon Sep 17 00:00:00 2001 From: Marian Buschsieweke Date: Mon, 18 Nov 2024 12:50:25 +0100 Subject: [PATCH] cpu/sam0_common/periph_gpio_ll: fix gpio_get_port() It turns out that the legacy GPIO API and GPIO LL may disagree on what the GPIO base address is: GPIO LL will use the IOBUS as base address no matter what, the legacy GPIO API will use the APB as base address unless `periph_gpio_fast_read` is used. If the APIs disagree, we need to do impedance matching. --- cpu/sam0_common/include/gpio_ll_arch.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/cpu/sam0_common/include/gpio_ll_arch.h b/cpu/sam0_common/include/gpio_ll_arch.h index c2fdb811b3..0ec02b321d 100644 --- a/cpu/sam0_common/include/gpio_ll_arch.h +++ b/cpu/sam0_common/include/gpio_ll_arch.h @@ -159,7 +159,15 @@ static inline void gpio_ll_switch_dir_input(gpio_port_t port, uword_t inputs) static inline gpio_port_t gpio_get_port(gpio_t pin) { - return (gpio_port_t)(pin & ~(0x1f)); + /* GPIO LL and legacy GPIO API may disagree on what is the GPIO base + * address if one is using the IOBUS and the other is using the APB for + * access. In this case, we need to do impedance matching by adding the + * offset. */ + const uintptr_t gpio_ll_base = GPIO_PORT_0; + const uintptr_t gpio_legacy_base = GPIO_PIN(0, 0) & ~(0x1f); + uintptr_t addr = (pin & ~(0x1f)); + + return addr + (gpio_ll_base - gpio_legacy_base); } static inline uint8_t gpio_get_pin_num(gpio_t pin)