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mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00

cpu/sam0_common: move adc_res_t to common code

This commit is contained in:
Benjamin Valentin 2023-01-17 15:42:29 +01:00
parent d6f44f6206
commit 9dcb3991d2
6 changed files with 20 additions and 52 deletions

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@ -807,6 +807,24 @@ typedef struct {
#define ADC_REFSEL_AREFC_PIN GPIO_PIN(PA, 6)
#endif
#ifndef DOXYGEN
#define HAVE_ADC_RES_T
typedef enum {
ADC_RES_6BIT = 0xff, /**< not supported */
#if defined(ADC_CTRLB_RESSEL)
ADC_RES_8BIT = ADC_CTRLB_RESSEL_8BIT_Val, /**< ADC resolution: 8 bit */
ADC_RES_10BIT = ADC_CTRLB_RESSEL_10BIT_Val, /**< ADC resolution: 10 bit */
ADC_RES_12BIT = ADC_CTRLB_RESSEL_12BIT_Val, /**< ADC resolution: 12 bit */
#elif defined(ADC_CTRLC_RESSEL)
ADC_RES_8BIT = ADC_CTRLC_RESSEL_8BIT_Val, /**< ADC resolution: 8 bit */
ADC_RES_10BIT = ADC_CTRLC_RESSEL_10BIT_Val, /**< ADC resolution: 10 bit */
ADC_RES_12BIT = ADC_CTRLC_RESSEL_12BIT_Val, /**< ADC resolution: 12 bit */
#endif
ADC_RES_14BIT = 0xfe, /**< not supported */
ADC_RES_16BIT = 0xfd /**< not supported */
} adc_res_t;
#endif /* DOXYGEN */
/**
* @name Ethernet peripheral parameters
* @{

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@ -203,12 +203,10 @@ static int _adc_configure(Adc *dev, adc_res_t res)
/* Set ADC resolution */
#ifdef ADC_CTRLC_RESSEL
/* Reset resolution bits in CTRLC */
dev->CTRLC.reg &= ~ADC_CTRLC_RESSEL_Msk;
dev->CTRLC.reg |= res;
dev->CTRLC.bit.RESSEL = res;
#else
/* Reset resolution bits in CTRLB */
dev->CTRLB.reg &= ~ADC_CTRLB_RESSEL_Msk;
dev->CTRLB.reg |= res;
dev->CTRLB.bit.RESSEL = res;
#endif
/* Set Voltage Reference */

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@ -99,18 +99,6 @@ static inline int _sercom_id(SercomUsart *sercom)
return ((((uint32_t)sercom) >> 10) & 0x7) - 2;
}
#ifndef DOXYGEN
#define HAVE_ADC_RES_T
typedef enum {
ADC_RES_6BIT = 0xff, /**< not supported */
ADC_RES_8BIT = ADC_CTRLB_RESSEL_8BIT, /**< ADC resolution: 8 bit */
ADC_RES_10BIT = ADC_CTRLB_RESSEL_10BIT, /**< ADC resolution: 10 bit */
ADC_RES_12BIT = ADC_CTRLB_RESSEL_12BIT, /**< ADC resolution: 12 bit */
ADC_RES_14BIT = 0xfe, /**< not supported */
ADC_RES_16BIT = 0xfd /**< not supported */
} adc_res_t;
#endif /* ndef DOXYGEN */
/**
* @brief Pins that can be used for ADC input
*/

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@ -83,18 +83,6 @@ enum {
*/
#define SPI_HWCS(x) (UINT_MAX - 1)
#ifndef DOXYGEN
#define HAVE_ADC_RES_T
typedef enum {
ADC_RES_6BIT = 0xff, /**< not supported */
ADC_RES_8BIT = ADC_CTRLB_RESSEL_8BIT, /**< ADC resolution: 8 bit */
ADC_RES_10BIT = ADC_CTRLB_RESSEL_10BIT, /**< ADC resolution: 10 bit */
ADC_RES_12BIT = ADC_CTRLB_RESSEL_12BIT, /**< ADC resolution: 12 bit */
ADC_RES_14BIT = 0xfe, /**< not supported */
ADC_RES_16BIT = 0xfd /**< not supported */
} adc_res_t;
#endif /* DOXYGEN */
/**
* @brief Pins that can be used for ADC input
*/

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@ -43,18 +43,6 @@ enum {
};
/** @} */
#ifndef DOXYGEN
#define HAVE_ADC_RES_T
typedef enum {
ADC_RES_6BIT = 0xff, /**< not supported */
ADC_RES_8BIT = ADC_CTRLC_RESSEL_8BIT, /**< ADC resolution: 8 bit */
ADC_RES_10BIT = ADC_CTRLC_RESSEL_10BIT, /**< ADC resolution: 10 bit */
ADC_RES_12BIT = ADC_CTRLC_RESSEL_12BIT, /**< ADC resolution: 12 bit */
ADC_RES_14BIT = 0xfe, /**< not supported */
ADC_RES_16BIT = 0xfd /**< not supported */
} adc_res_t;
#endif /* ndef DOXYGEN */
/**
* @brief Pins that can be used for ADC input
*/

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@ -74,18 +74,6 @@ enum {
};
/** @} */
#ifndef DOXYGEN
#define HAVE_ADC_RES_T
typedef enum {
ADC_RES_6BIT = 0xff, /**< not supported */
ADC_RES_8BIT = ADC_CTRLC_RESSEL_8BIT, /**< ADC resolution: 8 bit */
ADC_RES_10BIT = ADC_CTRLC_RESSEL_10BIT, /**< ADC resolution: 10 bit */
ADC_RES_12BIT = ADC_CTRLC_RESSEL_12BIT, /**< ADC resolution: 12 bit */
ADC_RES_14BIT = 0xfe, /**< not supported */
ADC_RES_16BIT = 0xfd /**< not supported */
} adc_res_t;
#endif /* ndef DOXYGEN */
/**
* @brief Pins that can be used for ADC input
*/