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https://github.com/RIOT-OS/RIOT.git
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cpu/sam0_common: fix vendor header files
Drop type qualifiers in front of anonymous bit fields (padding for reserved bits) for compatibility with `clang++`. A four line bash script was added to ease fixing new vendor header files.
This commit is contained in:
parent
b1b0690bc8
commit
a4bf63e483
8
cpu/sam0_common/include/vendor/README.md
vendored
8
cpu/sam0_common/include/vendor/README.md
vendored
@ -36,6 +36,14 @@ all `source` folders are removed.
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Be aware that if you want to make changes to any file in this tree that the
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changes will be lost when a new ASF release is going to be used.
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### C++ compatibility (with LLVM)
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Many of the header files where generated with an outdated version of SVDConv
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that adds the `__I` qualifier to anonymous bit fields, which `clang++` won't
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compile. Run the script `fix_cxx_compat.sh` in this directory whenever you
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add or update vendor header filers until Microchips starts using a fixed version
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of SVDConv.
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### sam0.h
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A SAM based CPU should include `sam0.h` in this directory, which will
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10
cpu/sam0_common/include/vendor/fix_cxx_compat.sh
vendored
Executable file
10
cpu/sam0_common/include/vendor/fix_cxx_compat.sh
vendored
Executable file
@ -0,0 +1,10 @@
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#!/bin/sh
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# This script removes type qualifiers from anonymous padding fields in bit
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# fields for compatibility with clang++.
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offenders="$(grep -Erl '__I [u]*int[0-9]*_t[ \t]*:[0-9]*;')"
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for file in $offenders; do
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sed -i "$file" -e 's/__I \([u]*int[0-9]*_t[\t ]*:[0-9]*;\)/\1 /g'
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done
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@ -224,15 +224,15 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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struct {
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__I uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */
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__I uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */
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__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
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uint8_t :2; /*!< bit: 2.. 3 Reserved */
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__I uint8_t WIN0:1; /*!< bit: 4 Window 0 */
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__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
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uint8_t :3; /*!< bit: 5.. 7 Reserved */
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} bit; /*!< Structure used for bit access */
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struct {
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__I uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */
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__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
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uint8_t :2; /*!< bit: 2.. 3 Reserved */
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__I uint8_t WIN:1; /*!< bit: 4 Window x */
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__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
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uint8_t :3; /*!< bit: 5.. 7 Reserved */
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} vec; /*!< Structure used for vec access */
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uint8_t reg; /*!< Type used for register access */
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} AC_INTFLAG_Type;
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@ -478,7 +478,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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__I uint8_t OVERRUN:1; /*!< bit: 1 Overrun */
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__I uint8_t WINMON:1; /*!< bit: 2 Window Monitor */
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__I uint8_t SYNCRDY:1; /*!< bit: 3 Synchronization Ready */
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__I uint8_t :4; /*!< bit: 4.. 7 Reserved */
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uint8_t :4; /*!< bit: 4.. 7 Reserved */
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} bit; /*!< Structure used for bit access */
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uint8_t reg; /*!< Type used for register access */
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} ADC_INTFLAG_Type;
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@ -179,7 +179,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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__I uint8_t UNDERRUN:1; /*!< bit: 0 Underrun */
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__I uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty */
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__I uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready */
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__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
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uint8_t :5; /*!< bit: 3.. 7 Reserved */
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} bit; /*!< Structure used for bit access */
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uint8_t reg; /*!< Type used for register access */
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} DAC_INTFLAG_Type;
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@ -752,7 +752,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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__I uint8_t TERR:1; /*!< bit: 0 Channel Transfer Error */
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__I uint8_t TCMPL:1; /*!< bit: 1 Channel Transfer Complete */
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__I uint8_t SUSP:1; /*!< bit: 2 Channel Suspend */
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__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
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uint8_t :5; /*!< bit: 3.. 7 Reserved */
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} bit; /*!< Structure used for bit access */
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uint8_t reg; /*!< Type used for register access */
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} DMAC_CHINTFLAG_Type;
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@ -280,11 +280,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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__I uint32_t EXTINT5:1; /*!< bit: 5 External Interrupt 5 */
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__I uint32_t EXTINT6:1; /*!< bit: 6 External Interrupt 6 */
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__I uint32_t EXTINT7:1; /*!< bit: 7 External Interrupt 7 */
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__I uint32_t :24; /*!< bit: 8..31 Reserved */
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uint32_t :24; /*!< bit: 8..31 Reserved */
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} bit; /*!< Structure used for bit access */
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struct {
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__I uint32_t EXTINT:8; /*!< bit: 0.. 7 External Interrupt x */
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__I uint32_t :24; /*!< bit: 8..31 Reserved */
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uint32_t :24; /*!< bit: 8..31 Reserved */
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} vec; /*!< Structure used for vec access */
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uint32_t reg; /*!< Type used for register access */
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} EIC_INTFLAG_Type;
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@ -340,20 +340,20 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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__I uint32_t OVR3:1; /*!< bit: 3 Channel 3 Overrun */
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__I uint32_t OVR4:1; /*!< bit: 4 Channel 4 Overrun */
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__I uint32_t OVR5:1; /*!< bit: 5 Channel 5 Overrun */
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__I uint32_t :2; /*!< bit: 6.. 7 Reserved */
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uint32_t :2; /*!< bit: 6.. 7 Reserved */
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__I uint32_t EVD0:1; /*!< bit: 8 Channel 0 Event Detection */
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__I uint32_t EVD1:1; /*!< bit: 9 Channel 1 Event Detection */
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__I uint32_t EVD2:1; /*!< bit: 10 Channel 2 Event Detection */
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__I uint32_t EVD3:1; /*!< bit: 11 Channel 3 Event Detection */
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__I uint32_t EVD4:1; /*!< bit: 12 Channel 4 Event Detection */
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__I uint32_t EVD5:1; /*!< bit: 13 Channel 5 Event Detection */
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__I uint32_t :18; /*!< bit: 14..31 Reserved */
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uint32_t :18; /*!< bit: 14..31 Reserved */
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} bit; /*!< Structure used for bit access */
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struct {
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__I uint32_t OVR:6; /*!< bit: 0.. 5 Channel x Overrun */
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__I uint32_t :2; /*!< bit: 6.. 7 Reserved */
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uint32_t :2; /*!< bit: 6.. 7 Reserved */
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__I uint32_t EVD:6; /*!< bit: 8..13 Channel x Event Detection */
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__I uint32_t :18; /*!< bit: 14..31 Reserved */
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uint32_t :18; /*!< bit: 14..31 Reserved */
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} vec; /*!< Structure used for vec access */
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uint32_t reg; /*!< Type used for register access */
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} EVSYS_INTFLAG_Type;
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@ -231,7 +231,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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struct {
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__I uint8_t READY:1; /*!< bit: 0 NVM Ready */
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__I uint8_t ERROR:1; /*!< bit: 1 Error */
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__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
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uint8_t :6; /*!< bit: 2.. 7 Reserved */
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} bit; /*!< Structure used for bit access */
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uint8_t reg; /*!< Type used for register access */
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} NVMCTRL_INTFLAG_Type;
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@ -447,7 +447,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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struct {
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__I uint8_t CKRDY:1; /*!< bit: 0 Clock Ready */
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__I uint8_t CFD:1; /*!< bit: 1 Clock Failure Detector */
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__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
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uint8_t :6; /*!< bit: 2.. 7 Reserved */
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} bit; /*!< Structure used for bit access */
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uint8_t reg; /*!< Type used for register access */
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} PM_INTFLAG_Type;
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@ -615,13 +615,13 @@ typedef union {
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typedef union { // __I to avoid read-modify-write on write-to-clear register
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struct {
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__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
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__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
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uint8_t :5; /*!< bit: 1.. 5 Reserved */
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__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
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__I uint8_t OVF:1; /*!< bit: 7 Overflow */
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} bit; /*!< Structure used for bit access */
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struct {
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__I uint8_t CMP:1; /*!< bit: 0 Compare x */
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__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
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uint8_t :7; /*!< bit: 1.. 7 Reserved */
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} vec; /*!< Structure used for vec access */
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uint8_t reg; /*!< Type used for register access */
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} RTC_MODE0_INTFLAG_Type;
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@ -647,13 +647,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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struct {
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__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
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__I uint8_t CMP1:1; /*!< bit: 1 Compare 1 */
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__I uint8_t :4; /*!< bit: 2.. 5 Reserved */
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uint8_t :4; /*!< bit: 2.. 5 Reserved */
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__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
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__I uint8_t OVF:1; /*!< bit: 7 Overflow */
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} bit; /*!< Structure used for bit access */
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struct {
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__I uint8_t CMP:2; /*!< bit: 0.. 1 Compare x */
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__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
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uint8_t :6; /*!< bit: 2.. 7 Reserved */
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} vec; /*!< Structure used for vec access */
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uint8_t reg; /*!< Type used for register access */
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} RTC_MODE1_INTFLAG_Type;
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@ -680,13 +680,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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typedef union { // __I to avoid read-modify-write on write-to-clear register
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struct {
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__I uint8_t ALARM0:1; /*!< bit: 0 Alarm 0 */
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__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
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uint8_t :5; /*!< bit: 1.. 5 Reserved */
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__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
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__I uint8_t OVF:1; /*!< bit: 7 Overflow */
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} bit; /*!< Structure used for bit access */
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struct {
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__I uint8_t ALARM:1; /*!< bit: 0 Alarm x */
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__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
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uint8_t :7; /*!< bit: 1.. 7 Reserved */
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} vec; /*!< Structure used for vec access */
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uint8_t reg; /*!< Type used for register access */
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} RTC_MODE2_INTFLAG_Type;
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@ -828,7 +828,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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struct {
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__I uint8_t MB:1; /*!< bit: 0 Master On Bus Interrupt */
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__I uint8_t SB:1; /*!< bit: 1 Slave On Bus Interrupt */
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__I uint8_t :5; /*!< bit: 2.. 6 Reserved */
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uint8_t :5; /*!< bit: 2.. 6 Reserved */
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__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
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} bit; /*!< Structure used for bit access */
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uint8_t reg; /*!< Type used for register access */
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@ -853,7 +853,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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__I uint8_t PREC:1; /*!< bit: 0 Stop Received Interrupt */
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__I uint8_t AMATCH:1; /*!< bit: 1 Address Match Interrupt */
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__I uint8_t DRDY:1; /*!< bit: 2 Data Interrupt */
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__I uint8_t :4; /*!< bit: 3.. 6 Reserved */
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uint8_t :4; /*!< bit: 3.. 6 Reserved */
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__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
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} bit; /*!< Structure used for bit access */
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uint8_t reg; /*!< Type used for register access */
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@ -881,7 +881,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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__I uint8_t TXC:1; /*!< bit: 1 Transmit Complete Interrupt */
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__I uint8_t RXC:1; /*!< bit: 2 Receive Complete Interrupt */
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__I uint8_t SSL:1; /*!< bit: 3 Slave Select Low Interrupt Flag */
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__I uint8_t :3; /*!< bit: 4.. 6 Reserved */
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uint8_t :3; /*!< bit: 4.. 6 Reserved */
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__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
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} bit; /*!< Structure used for bit access */
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uint8_t reg; /*!< Type used for register access */
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@ -913,7 +913,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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__I uint8_t RXS:1; /*!< bit: 3 Receive Start Interrupt */
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__I uint8_t CTSIC:1; /*!< bit: 4 Clear To Send Input Change Interrupt */
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__I uint8_t RXBRK:1; /*!< bit: 5 Break Received Interrupt */
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__I uint8_t :1; /*!< bit: 6 Reserved */
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uint8_t :1; /*!< bit: 6 Reserved */
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__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
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} bit; /*!< Structure used for bit access */
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uint8_t reg; /*!< Type used for register access */
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@ -177,11 +177,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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__I uint32_t BOD33RDY:1; /*!< bit: 9 BOD33 Ready */
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__I uint32_t BOD33DET:1; /*!< bit: 10 BOD33 Detection */
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__I uint32_t B33SRDY:1; /*!< bit: 11 BOD33 Synchronization Ready */
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__I uint32_t :3; /*!< bit: 12..14 Reserved */
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uint32_t :3; /*!< bit: 12..14 Reserved */
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__I uint32_t DPLLLCKR:1; /*!< bit: 15 DPLL Lock Rise */
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__I uint32_t DPLLLCKF:1; /*!< bit: 16 DPLL Lock Fall */
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__I uint32_t DPLLLTO:1; /*!< bit: 17 DPLL Lock Timeout */
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__I uint32_t :14; /*!< bit: 18..31 Reserved */
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uint32_t :14; /*!< bit: 18..31 Reserved */
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} bit; /*!< Structure used for bit access */
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uint32_t reg; /*!< Type used for register access */
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} SYSCTRL_INTFLAG_Type;
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@ -405,16 +405,16 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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struct {
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__I uint8_t OVF:1; /*!< bit: 0 Overflow */
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__I uint8_t ERR:1; /*!< bit: 1 Error */
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__I uint8_t :1; /*!< bit: 2 Reserved */
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uint8_t :1; /*!< bit: 2 Reserved */
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__I uint8_t SYNCRDY:1; /*!< bit: 3 Synchronization Ready */
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__I uint8_t MC0:1; /*!< bit: 4 Match or Capture Channel 0 */
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__I uint8_t MC1:1; /*!< bit: 5 Match or Capture Channel 1 */
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__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
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uint8_t :2; /*!< bit: 6.. 7 Reserved */
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} bit; /*!< Structure used for bit access */
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struct {
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__I uint8_t :4; /*!< bit: 0.. 3 Reserved */
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uint8_t :4; /*!< bit: 0.. 3 Reserved */
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__I uint8_t MC:2; /*!< bit: 4.. 5 Match or Capture Channel x */
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__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
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uint8_t :2; /*!< bit: 6.. 7 Reserved */
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} vec; /*!< Structure used for vec access */
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uint8_t reg; /*!< Type used for register access */
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} TC_INTFLAG_Type;
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@ -969,7 +969,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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__I uint32_t TRG:1; /*!< bit: 1 Retrigger */
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__I uint32_t CNT:1; /*!< bit: 2 Counter */
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__I uint32_t ERR:1; /*!< bit: 3 Error */
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__I uint32_t :7; /*!< bit: 4..10 Reserved */
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uint32_t :7; /*!< bit: 4..10 Reserved */
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__I uint32_t DFS:1; /*!< bit: 11 Non-Recoverable Debug Fault */
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__I uint32_t FAULTA:1; /*!< bit: 12 Recoverable Fault A */
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__I uint32_t FAULTB:1; /*!< bit: 13 Recoverable Fault B */
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@ -979,12 +979,12 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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__I uint32_t MC1:1; /*!< bit: 17 Match or Capture 1 */
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__I uint32_t MC2:1; /*!< bit: 18 Match or Capture 2 */
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__I uint32_t MC3:1; /*!< bit: 19 Match or Capture 3 */
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__I uint32_t :12; /*!< bit: 20..31 Reserved */
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uint32_t :12; /*!< bit: 20..31 Reserved */
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} bit; /*!< Structure used for bit access */
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struct {
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__I uint32_t :16; /*!< bit: 0..15 Reserved */
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uint32_t :16; /*!< bit: 0..15 Reserved */
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__I uint32_t MC:4; /*!< bit: 16..19 Match or Capture x */
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__I uint32_t :12; /*!< bit: 20..31 Reserved */
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uint32_t :12; /*!< bit: 20..31 Reserved */
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} vec; /*!< Structure used for vec access */
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uint32_t reg; /*!< Type used for register access */
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} TCC_INTFLAG_Type;
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@ -218,7 +218,7 @@ typedef union {
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typedef union { // __I to avoid read-modify-write on write-to-clear register
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struct {
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__I uint8_t EW:1; /*!< bit: 0 Early Warning */
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__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
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uint8_t :7; /*!< bit: 1.. 7 Reserved */
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} bit; /*!< Structure used for bit access */
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uint8_t reg; /*!< Type used for register access */
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} WDT_INTFLAG_Type;
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@ -224,15 +224,15 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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struct {
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__I uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */
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__I uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */
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__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
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uint8_t :2; /*!< bit: 2.. 3 Reserved */
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__I uint8_t WIN0:1; /*!< bit: 4 Window 0 */
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__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
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uint8_t :3; /*!< bit: 5.. 7 Reserved */
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} bit; /*!< Structure used for bit access */
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struct {
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__I uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */
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__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
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uint8_t :2; /*!< bit: 2.. 3 Reserved */
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__I uint8_t WIN:1; /*!< bit: 4 Window x */
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__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
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uint8_t :3; /*!< bit: 5.. 7 Reserved */
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} vec; /*!< Structure used for vec access */
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uint8_t reg; /*!< Type used for register access */
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} AC_INTFLAG_Type;
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@ -478,7 +478,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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__I uint8_t OVERRUN:1; /*!< bit: 1 Overrun */
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__I uint8_t WINMON:1; /*!< bit: 2 Window Monitor */
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__I uint8_t SYNCRDY:1; /*!< bit: 3 Synchronization Ready */
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__I uint8_t :4; /*!< bit: 4.. 7 Reserved */
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uint8_t :4; /*!< bit: 4.. 7 Reserved */
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} bit; /*!< Structure used for bit access */
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uint8_t reg; /*!< Type used for register access */
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} ADC_INTFLAG_Type;
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@ -176,7 +176,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
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__I uint8_t UNDERRUN:1; /*!< bit: 0 Underrun */
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__I uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty */
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__I uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready */
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__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
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uint8_t :5; /*!< bit: 3.. 7 Reserved */
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||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_INTFLAG_Type;
|
||||
|
@ -360,11 +360,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t EXTINT13:1; /*!< bit: 13 External Interrupt 13 */
|
||||
__I uint32_t EXTINT14:1; /*!< bit: 14 External Interrupt 14 */
|
||||
__I uint32_t EXTINT15:1; /*!< bit: 15 External Interrupt 15 */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t EXTINT:16; /*!< bit: 0..15 External Interrupt x */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} EIC_INTFLAG_Type;
|
||||
|
@ -378,12 +378,12 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t EVD5:1; /*!< bit: 13 Channel 5 Event Detection */
|
||||
__I uint32_t EVD6:1; /*!< bit: 14 Channel 6 Event Detection */
|
||||
__I uint32_t EVD7:1; /*!< bit: 15 Channel 7 Event Detection */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t OVR:8; /*!< bit: 0.. 7 Channel x Overrun */
|
||||
__I uint32_t EVD:8; /*!< bit: 8..15 Channel x Event Detection */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} EVSYS_INTFLAG_Type;
|
||||
|
@ -231,7 +231,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t READY:1; /*!< bit: 0 NVM Ready */
|
||||
__I uint8_t ERROR:1; /*!< bit: 1 Error */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} NVMCTRL_INTFLAG_Type;
|
||||
|
@ -425,7 +425,7 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CKRDY:1; /*!< bit: 0 Clock Ready */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} PM_INTFLAG_Type;
|
||||
|
@ -615,13 +615,13 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
|
||||
__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t CMP:1; /*!< bit: 0 Compare x */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE0_INTFLAG_Type;
|
||||
@ -647,13 +647,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
|
||||
__I uint8_t CMP1:1; /*!< bit: 1 Compare 1 */
|
||||
__I uint8_t :4; /*!< bit: 2.. 5 Reserved */
|
||||
uint8_t :4; /*!< bit: 2.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t CMP:2; /*!< bit: 0.. 1 Compare x */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE1_INTFLAG_Type;
|
||||
@ -680,13 +680,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t ALARM0:1; /*!< bit: 0 Alarm 0 */
|
||||
__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t ALARM:1; /*!< bit: 0 Alarm x */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE2_INTFLAG_Type;
|
||||
|
@ -761,7 +761,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t MB:1; /*!< bit: 0 Master on Bus */
|
||||
__I uint8_t SB:1; /*!< bit: 1 Slave on Bus */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} SERCOM_I2CM_INTFLAG_Type;
|
||||
@ -783,7 +783,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t PREC:1; /*!< bit: 0 Stop Received */
|
||||
__I uint8_t AMATCH:1; /*!< bit: 1 Address Match */
|
||||
__I uint8_t DRDY:1; /*!< bit: 2 Data Ready */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} SERCOM_I2CS_INTFLAG_Type;
|
||||
@ -807,7 +807,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t DRE:1; /*!< bit: 0 Data Register Empty */
|
||||
__I uint8_t TXC:1; /*!< bit: 1 Transmit Complete */
|
||||
__I uint8_t RXC:1; /*!< bit: 2 Receive Complete */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} SERCOM_SPI_INTFLAG_Type;
|
||||
@ -832,7 +832,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t TXC:1; /*!< bit: 1 Transmit Complete */
|
||||
__I uint8_t RXC:1; /*!< bit: 2 Receive Complete */
|
||||
__I uint8_t RXS:1; /*!< bit: 3 Receive Start Interrupt */
|
||||
__I uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} SERCOM_USART_INTFLAG_Type;
|
||||
|
@ -157,7 +157,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t BOD33RDY:1; /*!< bit: 9 BOD33 Ready */
|
||||
__I uint32_t BOD33DET:1; /*!< bit: 10 BOD33 Detection */
|
||||
__I uint32_t B33SRDY:1; /*!< bit: 11 BOD33 Synchronization Ready */
|
||||
__I uint32_t :20; /*!< bit: 12..31 Reserved */
|
||||
uint32_t :20; /*!< bit: 12..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} SYSCTRL_INTFLAG_Type;
|
||||
|
@ -405,16 +405,16 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t OVF:1; /*!< bit: 0 Overflow */
|
||||
__I uint8_t ERR:1; /*!< bit: 1 Error */
|
||||
__I uint8_t :1; /*!< bit: 2 Reserved */
|
||||
uint8_t :1; /*!< bit: 2 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 3 Synchronization Ready */
|
||||
__I uint8_t MC0:1; /*!< bit: 4 Match or Capture Channel 0 */
|
||||
__I uint8_t MC1:1; /*!< bit: 5 Match or Capture Channel 1 */
|
||||
__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t :4; /*!< bit: 0.. 3 Reserved */
|
||||
uint8_t :4; /*!< bit: 0.. 3 Reserved */
|
||||
__I uint8_t MC:2; /*!< bit: 4.. 5 Match or Capture Channel x */
|
||||
__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} TC_INTFLAG_Type;
|
||||
|
@ -218,7 +218,7 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t EW:1; /*!< bit: 0 Early Warning */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} WDT_INTFLAG_Type;
|
||||
|
@ -224,15 +224,15 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */
|
||||
__I uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */
|
||||
__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint8_t WIN0:1; /*!< bit: 4 Window 0 */
|
||||
__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */
|
||||
__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint8_t WIN:1; /*!< bit: 4 Window x */
|
||||
__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} AC_INTFLAG_Type;
|
||||
|
@ -478,7 +478,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t OVERRUN:1; /*!< bit: 1 Overrun */
|
||||
__I uint8_t WINMON:1; /*!< bit: 2 Window Monitor */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 3 Synchronization Ready */
|
||||
__I uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} ADC_INTFLAG_Type;
|
||||
|
@ -176,7 +176,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t UNDERRUN:1; /*!< bit: 0 Underrun */
|
||||
__I uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_INTFLAG_Type;
|
||||
|
@ -360,11 +360,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t EXTINT13:1; /*!< bit: 13 External Interrupt 13 */
|
||||
__I uint32_t EXTINT14:1; /*!< bit: 14 External Interrupt 14 */
|
||||
__I uint32_t EXTINT15:1; /*!< bit: 15 External Interrupt 15 */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t EXTINT:16; /*!< bit: 0..15 External Interrupt x */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} EIC_INTFLAG_Type;
|
||||
|
@ -380,12 +380,12 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t EVD5:1; /*!< bit: 13 Channel 5 Event Detection */
|
||||
__I uint32_t EVD6:1; /*!< bit: 14 Channel 6 Event Detection */
|
||||
__I uint32_t EVD7:1; /*!< bit: 15 Channel 7 Event Detection */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t OVR:8; /*!< bit: 0.. 7 Channel x Overrun */
|
||||
__I uint32_t EVD:8; /*!< bit: 8..15 Channel x Event Detection */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} EVSYS_INTFLAG_Type;
|
||||
|
@ -231,7 +231,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t READY:1; /*!< bit: 0 NVM Ready */
|
||||
__I uint8_t ERROR:1; /*!< bit: 1 Error */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} NVMCTRL_INTFLAG_Type;
|
||||
|
@ -425,7 +425,7 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CKRDY:1; /*!< bit: 0 Clock Ready */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} PM_INTFLAG_Type;
|
||||
|
@ -615,13 +615,13 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
|
||||
__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t CMP:1; /*!< bit: 0 Compare x */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE0_INTFLAG_Type;
|
||||
@ -647,13 +647,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
|
||||
__I uint8_t CMP1:1; /*!< bit: 1 Compare 1 */
|
||||
__I uint8_t :4; /*!< bit: 2.. 5 Reserved */
|
||||
uint8_t :4; /*!< bit: 2.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t CMP:2; /*!< bit: 0.. 1 Compare x */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE1_INTFLAG_Type;
|
||||
@ -680,13 +680,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t ALARM0:1; /*!< bit: 0 Alarm 0 */
|
||||
__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t ALARM:1; /*!< bit: 0 Alarm x */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE2_INTFLAG_Type;
|
||||
|
@ -761,7 +761,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t MB:1; /*!< bit: 0 Master on Bus */
|
||||
__I uint8_t SB:1; /*!< bit: 1 Slave on Bus */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} SERCOM_I2CM_INTFLAG_Type;
|
||||
@ -783,7 +783,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t PREC:1; /*!< bit: 0 Stop Received */
|
||||
__I uint8_t AMATCH:1; /*!< bit: 1 Address Match */
|
||||
__I uint8_t DRDY:1; /*!< bit: 2 Data Ready */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} SERCOM_I2CS_INTFLAG_Type;
|
||||
@ -807,7 +807,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t DRE:1; /*!< bit: 0 Data Register Empty */
|
||||
__I uint8_t TXC:1; /*!< bit: 1 Transmit Complete */
|
||||
__I uint8_t RXC:1; /*!< bit: 2 Receive Complete */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} SERCOM_SPI_INTFLAG_Type;
|
||||
@ -832,7 +832,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t TXC:1; /*!< bit: 1 Transmit Complete */
|
||||
__I uint8_t RXC:1; /*!< bit: 2 Receive Complete */
|
||||
__I uint8_t RXS:1; /*!< bit: 3 Receive Start Interrupt */
|
||||
__I uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} SERCOM_USART_INTFLAG_Type;
|
||||
|
@ -157,7 +157,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t BOD33RDY:1; /*!< bit: 9 BOD33 Ready */
|
||||
__I uint32_t BOD33DET:1; /*!< bit: 10 BOD33 Detection */
|
||||
__I uint32_t B33SRDY:1; /*!< bit: 11 BOD33 Synchronization Ready */
|
||||
__I uint32_t :20; /*!< bit: 12..31 Reserved */
|
||||
uint32_t :20; /*!< bit: 12..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} SYSCTRL_INTFLAG_Type;
|
||||
|
@ -405,16 +405,16 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t OVF:1; /*!< bit: 0 Overflow */
|
||||
__I uint8_t ERR:1; /*!< bit: 1 Error */
|
||||
__I uint8_t :1; /*!< bit: 2 Reserved */
|
||||
uint8_t :1; /*!< bit: 2 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 3 Synchronization Ready */
|
||||
__I uint8_t MC0:1; /*!< bit: 4 Match or Capture Channel 0 */
|
||||
__I uint8_t MC1:1; /*!< bit: 5 Match or Capture Channel 1 */
|
||||
__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t :4; /*!< bit: 0.. 3 Reserved */
|
||||
uint8_t :4; /*!< bit: 0.. 3 Reserved */
|
||||
__I uint8_t MC:2; /*!< bit: 4.. 5 Match or Capture Channel x */
|
||||
__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} TC_INTFLAG_Type;
|
||||
|
@ -218,7 +218,7 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t EW:1; /*!< bit: 0 Early Warning */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} WDT_INTFLAG_Type;
|
||||
|
@ -224,15 +224,15 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */
|
||||
__I uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */
|
||||
__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint8_t WIN0:1; /*!< bit: 4 Window 0 */
|
||||
__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */
|
||||
__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint8_t WIN:1; /*!< bit: 4 Window x */
|
||||
__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} AC_INTFLAG_Type;
|
||||
|
@ -478,7 +478,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t OVERRUN:1; /*!< bit: 1 Overrun */
|
||||
__I uint8_t WINMON:1; /*!< bit: 2 Window Monitor */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 3 Synchronization Ready */
|
||||
__I uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} ADC_INTFLAG_Type;
|
||||
|
@ -179,7 +179,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t UNDERRUN:1; /*!< bit: 0 Underrun */
|
||||
__I uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_INTFLAG_Type;
|
||||
|
@ -824,7 +824,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t TERR:1; /*!< bit: 0 Channel Transfer Error */
|
||||
__I uint8_t TCMPL:1; /*!< bit: 1 Channel Transfer Complete */
|
||||
__I uint8_t SUSP:1; /*!< bit: 2 Channel Suspend */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DMAC_CHINTFLAG_Type;
|
||||
|
@ -360,11 +360,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t EXTINT13:1; /*!< bit: 13 External Interrupt 13 */
|
||||
__I uint32_t EXTINT14:1; /*!< bit: 14 External Interrupt 14 */
|
||||
__I uint32_t EXTINT15:1; /*!< bit: 15 External Interrupt 15 */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t EXTINT:16; /*!< bit: 0..15 External Interrupt x */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} EIC_INTFLAG_Type;
|
||||
|
@ -486,20 +486,20 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t OVR9:1; /*!< bit: 17 Channel 9 Overrun */
|
||||
__I uint32_t OVR10:1; /*!< bit: 18 Channel 10 Overrun */
|
||||
__I uint32_t OVR11:1; /*!< bit: 19 Channel 11 Overrun */
|
||||
__I uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
__I uint32_t EVD8:1; /*!< bit: 24 Channel 8 Event Detection */
|
||||
__I uint32_t EVD9:1; /*!< bit: 25 Channel 9 Event Detection */
|
||||
__I uint32_t EVD10:1; /*!< bit: 26 Channel 10 Event Detection */
|
||||
__I uint32_t EVD11:1; /*!< bit: 27 Channel 11 Event Detection */
|
||||
__I uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t OVR:8; /*!< bit: 0.. 7 Channel x Overrun */
|
||||
__I uint32_t EVD:8; /*!< bit: 8..15 Channel x Event Detection */
|
||||
__I uint32_t OVRp8:4; /*!< bit: 16..19 Channel x+8 Overrun */
|
||||
__I uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
__I uint32_t EVDp8:4; /*!< bit: 24..27 Channel x+8 Event Detection */
|
||||
__I uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} EVSYS_INTFLAG_Type;
|
||||
|
@ -314,26 +314,26 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint16_t RXRDY0:1; /*!< bit: 0 Receive Ready 0 */
|
||||
__I uint16_t RXRDY1:1; /*!< bit: 1 Receive Ready 1 */
|
||||
__I uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint16_t RXOR0:1; /*!< bit: 4 Receive Overrun 0 */
|
||||
__I uint16_t RXOR1:1; /*!< bit: 5 Receive Overrun 1 */
|
||||
__I uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
__I uint16_t TXRDY0:1; /*!< bit: 8 Transmit Ready 0 */
|
||||
__I uint16_t TXRDY1:1; /*!< bit: 9 Transmit Ready 1 */
|
||||
__I uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
__I uint16_t TXUR0:1; /*!< bit: 12 Transmit Underrun 0 */
|
||||
__I uint16_t TXUR1:1; /*!< bit: 13 Transmit Underrun 1 */
|
||||
__I uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint16_t RXRDY:2; /*!< bit: 0.. 1 Receive Ready x */
|
||||
__I uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint16_t RXOR:2; /*!< bit: 4.. 5 Receive Overrun x */
|
||||
__I uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
__I uint16_t TXRDY:2; /*!< bit: 8.. 9 Transmit Ready x */
|
||||
__I uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
__I uint16_t TXUR:2; /*!< bit: 12..13 Transmit Underrun x */
|
||||
__I uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} I2S_INTFLAG_Type;
|
||||
|
@ -231,7 +231,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t READY:1; /*!< bit: 0 NVM Ready */
|
||||
__I uint8_t ERROR:1; /*!< bit: 1 Error */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} NVMCTRL_INTFLAG_Type;
|
||||
|
@ -443,7 +443,7 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CKRDY:1; /*!< bit: 0 Clock Ready */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} PM_INTFLAG_Type;
|
||||
|
@ -615,13 +615,13 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
|
||||
__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t CMP:1; /*!< bit: 0 Compare x */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE0_INTFLAG_Type;
|
||||
@ -647,13 +647,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
|
||||
__I uint8_t CMP1:1; /*!< bit: 1 Compare 1 */
|
||||
__I uint8_t :4; /*!< bit: 2.. 5 Reserved */
|
||||
uint8_t :4; /*!< bit: 2.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t CMP:2; /*!< bit: 0.. 1 Compare x */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE1_INTFLAG_Type;
|
||||
@ -680,13 +680,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t ALARM0:1; /*!< bit: 0 Alarm 0 */
|
||||
__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t ALARM:1; /*!< bit: 0 Alarm x */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE2_INTFLAG_Type;
|
||||
|
@ -828,7 +828,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t MB:1; /*!< bit: 0 Master On Bus Interrupt */
|
||||
__I uint8_t SB:1; /*!< bit: 1 Slave On Bus Interrupt */
|
||||
__I uint8_t :5; /*!< bit: 2.. 6 Reserved */
|
||||
uint8_t :5; /*!< bit: 2.. 6 Reserved */
|
||||
__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
@ -853,7 +853,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t PREC:1; /*!< bit: 0 Stop Received Interrupt */
|
||||
__I uint8_t AMATCH:1; /*!< bit: 1 Address Match Interrupt */
|
||||
__I uint8_t DRDY:1; /*!< bit: 2 Data Interrupt */
|
||||
__I uint8_t :4; /*!< bit: 3.. 6 Reserved */
|
||||
uint8_t :4; /*!< bit: 3.. 6 Reserved */
|
||||
__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
@ -881,7 +881,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t TXC:1; /*!< bit: 1 Transmit Complete Interrupt */
|
||||
__I uint8_t RXC:1; /*!< bit: 2 Receive Complete Interrupt */
|
||||
__I uint8_t SSL:1; /*!< bit: 3 Slave Select Low Interrupt Flag */
|
||||
__I uint8_t :3; /*!< bit: 4.. 6 Reserved */
|
||||
uint8_t :3; /*!< bit: 4.. 6 Reserved */
|
||||
__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
@ -913,7 +913,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t RXS:1; /*!< bit: 3 Receive Start Interrupt */
|
||||
__I uint8_t CTSIC:1; /*!< bit: 4 Clear To Send Input Change Interrupt */
|
||||
__I uint8_t RXBRK:1; /*!< bit: 5 Break Received Interrupt */
|
||||
__I uint8_t :1; /*!< bit: 6 Reserved */
|
||||
uint8_t :1; /*!< bit: 6 Reserved */
|
||||
__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
|
@ -177,11 +177,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t BOD33RDY:1; /*!< bit: 9 BOD33 Ready */
|
||||
__I uint32_t BOD33DET:1; /*!< bit: 10 BOD33 Detection */
|
||||
__I uint32_t B33SRDY:1; /*!< bit: 11 BOD33 Synchronization Ready */
|
||||
__I uint32_t :3; /*!< bit: 12..14 Reserved */
|
||||
uint32_t :3; /*!< bit: 12..14 Reserved */
|
||||
__I uint32_t DPLLLCKR:1; /*!< bit: 15 DPLL Lock Rise */
|
||||
__I uint32_t DPLLLCKF:1; /*!< bit: 16 DPLL Lock Fall */
|
||||
__I uint32_t DPLLLTO:1; /*!< bit: 17 DPLL Lock Timeout */
|
||||
__I uint32_t :14; /*!< bit: 18..31 Reserved */
|
||||
uint32_t :14; /*!< bit: 18..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} SYSCTRL_INTFLAG_Type;
|
||||
|
@ -405,16 +405,16 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t OVF:1; /*!< bit: 0 Overflow */
|
||||
__I uint8_t ERR:1; /*!< bit: 1 Error */
|
||||
__I uint8_t :1; /*!< bit: 2 Reserved */
|
||||
uint8_t :1; /*!< bit: 2 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 3 Synchronization Ready */
|
||||
__I uint8_t MC0:1; /*!< bit: 4 Match or Capture Channel 0 */
|
||||
__I uint8_t MC1:1; /*!< bit: 5 Match or Capture Channel 1 */
|
||||
__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t :4; /*!< bit: 0.. 3 Reserved */
|
||||
uint8_t :4; /*!< bit: 0.. 3 Reserved */
|
||||
__I uint8_t MC:2; /*!< bit: 4.. 5 Match or Capture Channel x */
|
||||
__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} TC_INTFLAG_Type;
|
||||
|
@ -961,7 +961,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t TRG:1; /*!< bit: 1 Retrigger */
|
||||
__I uint32_t CNT:1; /*!< bit: 2 Counter */
|
||||
__I uint32_t ERR:1; /*!< bit: 3 Error */
|
||||
__I uint32_t :7; /*!< bit: 4..10 Reserved */
|
||||
uint32_t :7; /*!< bit: 4..10 Reserved */
|
||||
__I uint32_t DFS:1; /*!< bit: 11 Non-Recoverable Debug Fault */
|
||||
__I uint32_t FAULTA:1; /*!< bit: 12 Recoverable Fault A */
|
||||
__I uint32_t FAULTB:1; /*!< bit: 13 Recoverable Fault B */
|
||||
@ -971,12 +971,12 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t MC1:1; /*!< bit: 17 Match or Capture 1 */
|
||||
__I uint32_t MC2:1; /*!< bit: 18 Match or Capture 2 */
|
||||
__I uint32_t MC3:1; /*!< bit: 19 Match or Capture 3 */
|
||||
__I uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t :16; /*!< bit: 0..15 Reserved */
|
||||
uint32_t :16; /*!< bit: 0..15 Reserved */
|
||||
__I uint32_t MC:4; /*!< bit: 16..19 Match or Capture x */
|
||||
__I uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} TCC_INTFLAG_Type;
|
||||
|
@ -627,7 +627,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint16_t RAMACER:1; /*!< bit: 7 Ram Access */
|
||||
__I uint16_t LPMNYET:1; /*!< bit: 8 Link Power Management Not Yet */
|
||||
__I uint16_t LPMSUSP:1; /*!< bit: 9 Link Power Management Suspend */
|
||||
__I uint16_t :6; /*!< bit: 10..15 Reserved */
|
||||
uint16_t :6; /*!< bit: 10..15 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} USB_DEVICE_INTFLAG_Type;
|
||||
@ -662,7 +662,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint16_t :2; /*!< bit: 0.. 1 Reserved */
|
||||
uint16_t :2; /*!< bit: 0.. 1 Reserved */
|
||||
__I uint16_t HSOF:1; /*!< bit: 2 Host Start Of Frame */
|
||||
__I uint16_t RST:1; /*!< bit: 3 Bus Reset */
|
||||
__I uint16_t WAKEUP:1; /*!< bit: 4 Wake Up */
|
||||
@ -671,7 +671,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint16_t RAMACER:1; /*!< bit: 7 Ram Access */
|
||||
__I uint16_t DCONN:1; /*!< bit: 8 Device Connection */
|
||||
__I uint16_t DDISC:1; /*!< bit: 9 Device Disconnection */
|
||||
__I uint16_t :6; /*!< bit: 10..15 Reserved */
|
||||
uint16_t :6; /*!< bit: 10..15 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} USB_HOST_INTFLAG_Type;
|
||||
@ -1146,14 +1146,14 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t RXSTP:1; /*!< bit: 4 Received Setup */
|
||||
__I uint8_t STALL0:1; /*!< bit: 5 Stall 0 In/out */
|
||||
__I uint8_t STALL1:1; /*!< bit: 6 Stall 1 In/out */
|
||||
__I uint8_t :1; /*!< bit: 7 Reserved */
|
||||
uint8_t :1; /*!< bit: 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t TRCPT:2; /*!< bit: 0.. 1 Transfer Complete x */
|
||||
__I uint8_t TRFAIL:2; /*!< bit: 2.. 3 Error Flow x */
|
||||
__I uint8_t :1; /*!< bit: 4 Reserved */
|
||||
uint8_t :1; /*!< bit: 4 Reserved */
|
||||
__I uint8_t STALL:2; /*!< bit: 5.. 6 Stall x In/out */
|
||||
__I uint8_t :1; /*!< bit: 7 Reserved */
|
||||
uint8_t :1; /*!< bit: 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} USB_DEVICE_EPINTFLAG_Type;
|
||||
@ -1197,11 +1197,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t PERR:1; /*!< bit: 3 Pipe Error Interrupt Flag */
|
||||
__I uint8_t TXSTP:1; /*!< bit: 4 Transmit Setup Interrupt Flag */
|
||||
__I uint8_t STALL:1; /*!< bit: 5 Stall Interrupt Flag */
|
||||
__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t TRCPT:2; /*!< bit: 0.. 1 Transfer Complete x Interrupt Flag */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} USB_HOST_PINTFLAG_Type;
|
||||
|
@ -218,7 +218,7 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t EW:1; /*!< bit: 0 Early Warning */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} WDT_INTFLAG_Type;
|
||||
|
@ -224,15 +224,15 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */
|
||||
__I uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */
|
||||
__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint8_t WIN0:1; /*!< bit: 4 Window 0 */
|
||||
__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */
|
||||
__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint8_t WIN:1; /*!< bit: 4 Window x */
|
||||
__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} AC_INTFLAG_Type;
|
||||
|
@ -478,7 +478,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t OVERRUN:1; /*!< bit: 1 Overrun */
|
||||
__I uint8_t WINMON:1; /*!< bit: 2 Window Monitor */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 3 Synchronization Ready */
|
||||
__I uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} ADC_INTFLAG_Type;
|
||||
|
@ -179,7 +179,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t UNDERRUN:1; /*!< bit: 0 Underrun */
|
||||
__I uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_INTFLAG_Type;
|
||||
|
@ -824,7 +824,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t TERR:1; /*!< bit: 0 Transfer Error */
|
||||
__I uint8_t TCMPL:1; /*!< bit: 1 Transfer Complete */
|
||||
__I uint8_t SUSP:1; /*!< bit: 2 Channel Suspend */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DMAC_CHINTFLAG_Type;
|
||||
|
@ -360,11 +360,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t EXTINT13:1; /*!< bit: 13 External Interrupt 13 */
|
||||
__I uint32_t EXTINT14:1; /*!< bit: 14 External Interrupt 14 */
|
||||
__I uint32_t EXTINT15:1; /*!< bit: 15 External Interrupt 15 */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t EXTINT:16; /*!< bit: 0..15 External Interrupt x */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} EIC_INTFLAG_Type;
|
||||
|
@ -486,20 +486,20 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t OVR9:1; /*!< bit: 17 Channel 9 Overrun */
|
||||
__I uint32_t OVR10:1; /*!< bit: 18 Channel 10 Overrun */
|
||||
__I uint32_t OVR11:1; /*!< bit: 19 Channel 11 Overrun */
|
||||
__I uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
__I uint32_t EVD8:1; /*!< bit: 24 Channel 8 Event Detection */
|
||||
__I uint32_t EVD9:1; /*!< bit: 25 Channel 9 Event Detection */
|
||||
__I uint32_t EVD10:1; /*!< bit: 26 Channel 10 Event Detection */
|
||||
__I uint32_t EVD11:1; /*!< bit: 27 Channel 11 Event Detection */
|
||||
__I uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t OVR:8; /*!< bit: 0.. 7 Channel x Overrun */
|
||||
__I uint32_t EVD:8; /*!< bit: 8..15 Channel x Event Detection */
|
||||
__I uint32_t OVRp8:4; /*!< bit: 16..19 Channel x+8 Overrun */
|
||||
__I uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
__I uint32_t EVDp8:4; /*!< bit: 24..27 Channel x+8 Event Detection */
|
||||
__I uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} EVSYS_INTFLAG_Type;
|
||||
|
@ -314,26 +314,26 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint16_t RXRDY0:1; /*!< bit: 0 Receive Ready 0 */
|
||||
__I uint16_t RXRDY1:1; /*!< bit: 1 Receive Ready 1 */
|
||||
__I uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint16_t RXOR0:1; /*!< bit: 4 Receive Overrun 0 */
|
||||
__I uint16_t RXOR1:1; /*!< bit: 5 Receive Overrun 1 */
|
||||
__I uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
__I uint16_t TXRDY0:1; /*!< bit: 8 Transmit Ready 0 */
|
||||
__I uint16_t TXRDY1:1; /*!< bit: 9 Transmit Ready 1 */
|
||||
__I uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
__I uint16_t TXUR0:1; /*!< bit: 12 Transmit Underrun 0 */
|
||||
__I uint16_t TXUR1:1; /*!< bit: 13 Transmit Underrun 1 */
|
||||
__I uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint16_t RXRDY:2; /*!< bit: 0.. 1 Receive Ready x */
|
||||
__I uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint16_t RXOR:2; /*!< bit: 4.. 5 Receive Overrun x */
|
||||
__I uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
__I uint16_t TXRDY:2; /*!< bit: 8.. 9 Transmit Ready x */
|
||||
__I uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
__I uint16_t TXUR:2; /*!< bit: 12..13 Transmit Underrun x */
|
||||
__I uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} I2S_INTFLAG_Type;
|
||||
|
@ -239,7 +239,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t READY:1; /*!< bit: 0 NVM Ready */
|
||||
__I uint8_t ERROR:1; /*!< bit: 1 Error */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} NVMCTRL_INTFLAG_Type;
|
||||
|
@ -464,7 +464,7 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CKRDY:1; /*!< bit: 0 Clock Ready */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} PM_INTFLAG_Type;
|
||||
|
@ -615,13 +615,13 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
|
||||
__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t CMP:1; /*!< bit: 0 Compare x */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE0_INTFLAG_Type;
|
||||
@ -647,13 +647,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
|
||||
__I uint8_t CMP1:1; /*!< bit: 1 Compare 1 */
|
||||
__I uint8_t :4; /*!< bit: 2.. 5 Reserved */
|
||||
uint8_t :4; /*!< bit: 2.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t CMP:2; /*!< bit: 0.. 1 Compare x */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE1_INTFLAG_Type;
|
||||
@ -680,13 +680,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t ALARM0:1; /*!< bit: 0 Alarm 0 */
|
||||
__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t ALARM:1; /*!< bit: 0 Alarm x */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE2_INTFLAG_Type;
|
||||
|
@ -828,7 +828,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t MB:1; /*!< bit: 0 Master On Bus Interrupt */
|
||||
__I uint8_t SB:1; /*!< bit: 1 Slave On Bus Interrupt */
|
||||
__I uint8_t :5; /*!< bit: 2.. 6 Reserved */
|
||||
uint8_t :5; /*!< bit: 2.. 6 Reserved */
|
||||
__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
@ -853,7 +853,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t PREC:1; /*!< bit: 0 Stop Received Interrupt */
|
||||
__I uint8_t AMATCH:1; /*!< bit: 1 Address Match Interrupt */
|
||||
__I uint8_t DRDY:1; /*!< bit: 2 Data Interrupt */
|
||||
__I uint8_t :4; /*!< bit: 3.. 6 Reserved */
|
||||
uint8_t :4; /*!< bit: 3.. 6 Reserved */
|
||||
__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
@ -881,7 +881,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t TXC:1; /*!< bit: 1 Transmit Complete Interrupt */
|
||||
__I uint8_t RXC:1; /*!< bit: 2 Receive Complete Interrupt */
|
||||
__I uint8_t SSL:1; /*!< bit: 3 Slave Select Low Interrupt Flag */
|
||||
__I uint8_t :3; /*!< bit: 4.. 6 Reserved */
|
||||
uint8_t :3; /*!< bit: 4.. 6 Reserved */
|
||||
__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
@ -913,7 +913,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t RXS:1; /*!< bit: 3 Receive Start Interrupt */
|
||||
__I uint8_t CTSIC:1; /*!< bit: 4 Clear To Send Input Change Interrupt */
|
||||
__I uint8_t RXBRK:1; /*!< bit: 5 Break Received Interrupt */
|
||||
__I uint8_t :1; /*!< bit: 6 Reserved */
|
||||
uint8_t :1; /*!< bit: 6 Reserved */
|
||||
__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
|
@ -177,11 +177,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t BOD33RDY:1; /*!< bit: 9 BOD33 Ready */
|
||||
__I uint32_t BOD33DET:1; /*!< bit: 10 BOD33 Detection */
|
||||
__I uint32_t B33SRDY:1; /*!< bit: 11 BOD33 Synchronization Ready */
|
||||
__I uint32_t :3; /*!< bit: 12..14 Reserved */
|
||||
uint32_t :3; /*!< bit: 12..14 Reserved */
|
||||
__I uint32_t DPLLLCKR:1; /*!< bit: 15 DPLL Lock Rise */
|
||||
__I uint32_t DPLLLCKF:1; /*!< bit: 16 DPLL Lock Fall */
|
||||
__I uint32_t DPLLLTO:1; /*!< bit: 17 DPLL Lock Timeout */
|
||||
__I uint32_t :14; /*!< bit: 18..31 Reserved */
|
||||
uint32_t :14; /*!< bit: 18..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} SYSCTRL_INTFLAG_Type;
|
||||
|
@ -405,16 +405,16 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t OVF:1; /*!< bit: 0 Overflow */
|
||||
__I uint8_t ERR:1; /*!< bit: 1 Error */
|
||||
__I uint8_t :1; /*!< bit: 2 Reserved */
|
||||
uint8_t :1; /*!< bit: 2 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 3 Synchronization Ready */
|
||||
__I uint8_t MC0:1; /*!< bit: 4 Match or Capture Channel 0 */
|
||||
__I uint8_t MC1:1; /*!< bit: 5 Match or Capture Channel 1 */
|
||||
__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t :4; /*!< bit: 0.. 3 Reserved */
|
||||
uint8_t :4; /*!< bit: 0.. 3 Reserved */
|
||||
__I uint8_t MC:2; /*!< bit: 4.. 5 Match or Capture Channel x */
|
||||
__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} TC_INTFLAG_Type;
|
||||
|
@ -961,7 +961,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t TRG:1; /*!< bit: 1 Retrigger */
|
||||
__I uint32_t CNT:1; /*!< bit: 2 Counter */
|
||||
__I uint32_t ERR:1; /*!< bit: 3 Error */
|
||||
__I uint32_t :7; /*!< bit: 4..10 Reserved */
|
||||
uint32_t :7; /*!< bit: 4..10 Reserved */
|
||||
__I uint32_t DFS:1; /*!< bit: 11 Non-Recoverable Debug Fault */
|
||||
__I uint32_t FAULTA:1; /*!< bit: 12 Recoverable Fault A */
|
||||
__I uint32_t FAULTB:1; /*!< bit: 13 Recoverable Fault B */
|
||||
@ -971,12 +971,12 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t MC1:1; /*!< bit: 17 Match or Capture 1 */
|
||||
__I uint32_t MC2:1; /*!< bit: 18 Match or Capture 2 */
|
||||
__I uint32_t MC3:1; /*!< bit: 19 Match or Capture 3 */
|
||||
__I uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t :16; /*!< bit: 0..15 Reserved */
|
||||
uint32_t :16; /*!< bit: 0..15 Reserved */
|
||||
__I uint32_t MC:4; /*!< bit: 16..19 Match or Capture x */
|
||||
__I uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} TCC_INTFLAG_Type;
|
||||
|
@ -973,7 +973,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t TRG:1; /*!< bit: 1 Retrigger */
|
||||
__I uint32_t CNT:1; /*!< bit: 2 Counter */
|
||||
__I uint32_t ERR:1; /*!< bit: 3 Error */
|
||||
__I uint32_t :6; /*!< bit: 4.. 9 Reserved */
|
||||
uint32_t :6; /*!< bit: 4.. 9 Reserved */
|
||||
__I uint32_t UFS:1; /*!< bit: 10 Non-Recoverable Update Fault */
|
||||
__I uint32_t DFS:1; /*!< bit: 11 Non-Recoverable Debug Fault */
|
||||
__I uint32_t FAULTA:1; /*!< bit: 12 Recoverable Fault A */
|
||||
@ -984,12 +984,12 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t MC1:1; /*!< bit: 17 Match or Capture 1 */
|
||||
__I uint32_t MC2:1; /*!< bit: 18 Match or Capture 2 */
|
||||
__I uint32_t MC3:1; /*!< bit: 19 Match or Capture 3 */
|
||||
__I uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t :16; /*!< bit: 0..15 Reserved */
|
||||
uint32_t :16; /*!< bit: 0..15 Reserved */
|
||||
__I uint32_t MC:4; /*!< bit: 16..19 Match or Capture x */
|
||||
__I uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} TCC_INTFLAG_Type;
|
||||
|
@ -627,7 +627,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint16_t RAMACER:1; /*!< bit: 7 Ram Access */
|
||||
__I uint16_t LPMNYET:1; /*!< bit: 8 Link Power Management Not Yet */
|
||||
__I uint16_t LPMSUSP:1; /*!< bit: 9 Link Power Management Suspend */
|
||||
__I uint16_t :6; /*!< bit: 10..15 Reserved */
|
||||
uint16_t :6; /*!< bit: 10..15 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} USB_DEVICE_INTFLAG_Type;
|
||||
@ -662,7 +662,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint16_t :2; /*!< bit: 0.. 1 Reserved */
|
||||
uint16_t :2; /*!< bit: 0.. 1 Reserved */
|
||||
__I uint16_t HSOF:1; /*!< bit: 2 Host Start Of Frame */
|
||||
__I uint16_t RST:1; /*!< bit: 3 Bus Reset */
|
||||
__I uint16_t WAKEUP:1; /*!< bit: 4 Wake Up */
|
||||
@ -671,7 +671,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint16_t RAMACER:1; /*!< bit: 7 Ram Access */
|
||||
__I uint16_t DCONN:1; /*!< bit: 8 Device Connection */
|
||||
__I uint16_t DDISC:1; /*!< bit: 9 Device Disconnection */
|
||||
__I uint16_t :6; /*!< bit: 10..15 Reserved */
|
||||
uint16_t :6; /*!< bit: 10..15 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} USB_HOST_INTFLAG_Type;
|
||||
@ -1146,14 +1146,14 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t RXSTP:1; /*!< bit: 4 Received Setup */
|
||||
__I uint8_t STALL0:1; /*!< bit: 5 Stall 0 In/out */
|
||||
__I uint8_t STALL1:1; /*!< bit: 6 Stall 1 In/out */
|
||||
__I uint8_t :1; /*!< bit: 7 Reserved */
|
||||
uint8_t :1; /*!< bit: 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t TRCPT:2; /*!< bit: 0.. 1 Transfer Complete x */
|
||||
__I uint8_t TRFAIL:2; /*!< bit: 2.. 3 Error Flow x */
|
||||
__I uint8_t :1; /*!< bit: 4 Reserved */
|
||||
uint8_t :1; /*!< bit: 4 Reserved */
|
||||
__I uint8_t STALL:2; /*!< bit: 5.. 6 Stall x In/out */
|
||||
__I uint8_t :1; /*!< bit: 7 Reserved */
|
||||
uint8_t :1; /*!< bit: 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} USB_DEVICE_EPINTFLAG_Type;
|
||||
@ -1197,11 +1197,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t PERR:1; /*!< bit: 3 Pipe Error Interrupt Flag */
|
||||
__I uint8_t TXSTP:1; /*!< bit: 4 Transmit Setup Interrupt Flag */
|
||||
__I uint8_t STALL:1; /*!< bit: 5 Stall Interrupt Flag */
|
||||
__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t TRCPT:2; /*!< bit: 0.. 1 Transfer Complete x Interrupt Flag */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} USB_HOST_PINTFLAG_Type;
|
||||
|
@ -218,7 +218,7 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t EW:1; /*!< bit: 0 Early Warning */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} WDT_INTFLAG_Type;
|
||||
|
@ -224,15 +224,15 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */
|
||||
__I uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */
|
||||
__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint8_t WIN0:1; /*!< bit: 4 Window 0 */
|
||||
__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */
|
||||
__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint8_t WIN:1; /*!< bit: 4 Window x */
|
||||
__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} AC_INTFLAG_Type;
|
||||
|
@ -478,7 +478,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t OVERRUN:1; /*!< bit: 1 Overrun */
|
||||
__I uint8_t WINMON:1; /*!< bit: 2 Window Monitor */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 3 Synchronization Ready */
|
||||
__I uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} ADC_INTFLAG_Type;
|
||||
|
@ -179,7 +179,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t UNDERRUN:1; /*!< bit: 0 Underrun */
|
||||
__I uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_INTFLAG_Type;
|
||||
|
@ -824,7 +824,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t TERR:1; /*!< bit: 0 Transfer Error */
|
||||
__I uint8_t TCMPL:1; /*!< bit: 1 Transfer Complete */
|
||||
__I uint8_t SUSP:1; /*!< bit: 2 Channel Suspend */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DMAC_CHINTFLAG_Type;
|
||||
|
@ -360,11 +360,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t EXTINT13:1; /*!< bit: 13 External Interrupt 13 */
|
||||
__I uint32_t EXTINT14:1; /*!< bit: 14 External Interrupt 14 */
|
||||
__I uint32_t EXTINT15:1; /*!< bit: 15 External Interrupt 15 */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t EXTINT:16; /*!< bit: 0..15 External Interrupt x */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} EIC_INTFLAG_Type;
|
||||
|
@ -486,20 +486,20 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t OVR9:1; /*!< bit: 17 Channel 9 Overrun */
|
||||
__I uint32_t OVR10:1; /*!< bit: 18 Channel 10 Overrun */
|
||||
__I uint32_t OVR11:1; /*!< bit: 19 Channel 11 Overrun */
|
||||
__I uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
__I uint32_t EVD8:1; /*!< bit: 24 Channel 8 Event Detection */
|
||||
__I uint32_t EVD9:1; /*!< bit: 25 Channel 9 Event Detection */
|
||||
__I uint32_t EVD10:1; /*!< bit: 26 Channel 10 Event Detection */
|
||||
__I uint32_t EVD11:1; /*!< bit: 27 Channel 11 Event Detection */
|
||||
__I uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t OVR:8; /*!< bit: 0.. 7 Channel x Overrun */
|
||||
__I uint32_t EVD:8; /*!< bit: 8..15 Channel x Event Detection */
|
||||
__I uint32_t OVRp8:4; /*!< bit: 16..19 Channel x+8 Overrun */
|
||||
__I uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
__I uint32_t EVDp8:4; /*!< bit: 24..27 Channel x+8 Event Detection */
|
||||
__I uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} EVSYS_INTFLAG_Type;
|
||||
|
@ -314,26 +314,26 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint16_t RXRDY0:1; /*!< bit: 0 Receive Ready 0 */
|
||||
__I uint16_t RXRDY1:1; /*!< bit: 1 Receive Ready 1 */
|
||||
__I uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint16_t RXOR0:1; /*!< bit: 4 Receive Overrun 0 */
|
||||
__I uint16_t RXOR1:1; /*!< bit: 5 Receive Overrun 1 */
|
||||
__I uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
__I uint16_t TXRDY0:1; /*!< bit: 8 Transmit Ready 0 */
|
||||
__I uint16_t TXRDY1:1; /*!< bit: 9 Transmit Ready 1 */
|
||||
__I uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
__I uint16_t TXUR0:1; /*!< bit: 12 Transmit Underrun 0 */
|
||||
__I uint16_t TXUR1:1; /*!< bit: 13 Transmit Underrun 1 */
|
||||
__I uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint16_t RXRDY:2; /*!< bit: 0.. 1 Receive Ready x */
|
||||
__I uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint16_t RXOR:2; /*!< bit: 4.. 5 Receive Overrun x */
|
||||
__I uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
__I uint16_t TXRDY:2; /*!< bit: 8.. 9 Transmit Ready x */
|
||||
__I uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
__I uint16_t TXUR:2; /*!< bit: 12..13 Transmit Underrun x */
|
||||
__I uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} I2S_INTFLAG_Type;
|
||||
|
@ -239,7 +239,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t READY:1; /*!< bit: 0 NVM Ready */
|
||||
__I uint8_t ERROR:1; /*!< bit: 1 Error */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} NVMCTRL_INTFLAG_Type;
|
||||
|
@ -464,7 +464,7 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CKRDY:1; /*!< bit: 0 Clock Ready */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} PM_INTFLAG_Type;
|
||||
|
@ -615,13 +615,13 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
|
||||
__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t CMP:1; /*!< bit: 0 Compare x */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE0_INTFLAG_Type;
|
||||
@ -647,13 +647,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
|
||||
__I uint8_t CMP1:1; /*!< bit: 1 Compare 1 */
|
||||
__I uint8_t :4; /*!< bit: 2.. 5 Reserved */
|
||||
uint8_t :4; /*!< bit: 2.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t CMP:2; /*!< bit: 0.. 1 Compare x */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE1_INTFLAG_Type;
|
||||
@ -680,13 +680,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t ALARM0:1; /*!< bit: 0 Alarm 0 */
|
||||
__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t ALARM:1; /*!< bit: 0 Alarm x */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE2_INTFLAG_Type;
|
||||
|
@ -828,7 +828,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t MB:1; /*!< bit: 0 Master On Bus Interrupt */
|
||||
__I uint8_t SB:1; /*!< bit: 1 Slave On Bus Interrupt */
|
||||
__I uint8_t :5; /*!< bit: 2.. 6 Reserved */
|
||||
uint8_t :5; /*!< bit: 2.. 6 Reserved */
|
||||
__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
@ -853,7 +853,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t PREC:1; /*!< bit: 0 Stop Received Interrupt */
|
||||
__I uint8_t AMATCH:1; /*!< bit: 1 Address Match Interrupt */
|
||||
__I uint8_t DRDY:1; /*!< bit: 2 Data Interrupt */
|
||||
__I uint8_t :4; /*!< bit: 3.. 6 Reserved */
|
||||
uint8_t :4; /*!< bit: 3.. 6 Reserved */
|
||||
__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
@ -881,7 +881,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t TXC:1; /*!< bit: 1 Transmit Complete Interrupt */
|
||||
__I uint8_t RXC:1; /*!< bit: 2 Receive Complete Interrupt */
|
||||
__I uint8_t SSL:1; /*!< bit: 3 Slave Select Low Interrupt Flag */
|
||||
__I uint8_t :3; /*!< bit: 4.. 6 Reserved */
|
||||
uint8_t :3; /*!< bit: 4.. 6 Reserved */
|
||||
__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
@ -913,7 +913,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t RXS:1; /*!< bit: 3 Receive Start Interrupt */
|
||||
__I uint8_t CTSIC:1; /*!< bit: 4 Clear To Send Input Change Interrupt */
|
||||
__I uint8_t RXBRK:1; /*!< bit: 5 Break Received Interrupt */
|
||||
__I uint8_t :1; /*!< bit: 6 Reserved */
|
||||
uint8_t :1; /*!< bit: 6 Reserved */
|
||||
__I uint8_t ERROR:1; /*!< bit: 7 Combined Error Interrupt */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
|
@ -177,11 +177,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t BOD33RDY:1; /*!< bit: 9 BOD33 Ready */
|
||||
__I uint32_t BOD33DET:1; /*!< bit: 10 BOD33 Detection */
|
||||
__I uint32_t B33SRDY:1; /*!< bit: 11 BOD33 Synchronization Ready */
|
||||
__I uint32_t :3; /*!< bit: 12..14 Reserved */
|
||||
uint32_t :3; /*!< bit: 12..14 Reserved */
|
||||
__I uint32_t DPLLLCKR:1; /*!< bit: 15 DPLL Lock Rise */
|
||||
__I uint32_t DPLLLCKF:1; /*!< bit: 16 DPLL Lock Fall */
|
||||
__I uint32_t DPLLLTO:1; /*!< bit: 17 DPLL Lock Timeout */
|
||||
__I uint32_t :14; /*!< bit: 18..31 Reserved */
|
||||
uint32_t :14; /*!< bit: 18..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} SYSCTRL_INTFLAG_Type;
|
||||
|
@ -405,16 +405,16 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t OVF:1; /*!< bit: 0 Overflow */
|
||||
__I uint8_t ERR:1; /*!< bit: 1 Error */
|
||||
__I uint8_t :1; /*!< bit: 2 Reserved */
|
||||
uint8_t :1; /*!< bit: 2 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 3 Synchronization Ready */
|
||||
__I uint8_t MC0:1; /*!< bit: 4 Match or Capture Channel 0 */
|
||||
__I uint8_t MC1:1; /*!< bit: 5 Match or Capture Channel 1 */
|
||||
__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t :4; /*!< bit: 0.. 3 Reserved */
|
||||
uint8_t :4; /*!< bit: 0.. 3 Reserved */
|
||||
__I uint8_t MC:2; /*!< bit: 4.. 5 Match or Capture Channel x */
|
||||
__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} TC_INTFLAG_Type;
|
||||
|
@ -961,7 +961,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t TRG:1; /*!< bit: 1 Retrigger */
|
||||
__I uint32_t CNT:1; /*!< bit: 2 Counter */
|
||||
__I uint32_t ERR:1; /*!< bit: 3 Error */
|
||||
__I uint32_t :7; /*!< bit: 4..10 Reserved */
|
||||
uint32_t :7; /*!< bit: 4..10 Reserved */
|
||||
__I uint32_t DFS:1; /*!< bit: 11 Non-Recoverable Debug Fault */
|
||||
__I uint32_t FAULTA:1; /*!< bit: 12 Recoverable Fault A */
|
||||
__I uint32_t FAULTB:1; /*!< bit: 13 Recoverable Fault B */
|
||||
@ -971,12 +971,12 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t MC1:1; /*!< bit: 17 Match or Capture 1 */
|
||||
__I uint32_t MC2:1; /*!< bit: 18 Match or Capture 2 */
|
||||
__I uint32_t MC3:1; /*!< bit: 19 Match or Capture 3 */
|
||||
__I uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t :16; /*!< bit: 0..15 Reserved */
|
||||
uint32_t :16; /*!< bit: 0..15 Reserved */
|
||||
__I uint32_t MC:4; /*!< bit: 16..19 Match or Capture x */
|
||||
__I uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} TCC_INTFLAG_Type;
|
||||
|
@ -977,7 +977,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t TRG:1; /*!< bit: 1 Retrigger */
|
||||
__I uint32_t CNT:1; /*!< bit: 2 Counter */
|
||||
__I uint32_t ERR:1; /*!< bit: 3 Error */
|
||||
__I uint32_t :6; /*!< bit: 4.. 9 Reserved */
|
||||
uint32_t :6; /*!< bit: 4.. 9 Reserved */
|
||||
__I uint32_t UFS:1; /*!< bit: 10 Non-Recoverable Update Fault */
|
||||
__I uint32_t DFS:1; /*!< bit: 11 Non-Recoverable Debug Fault */
|
||||
__I uint32_t FAULTA:1; /*!< bit: 12 Recoverable Fault A */
|
||||
@ -988,12 +988,12 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t MC1:1; /*!< bit: 17 Match or Capture 1 */
|
||||
__I uint32_t MC2:1; /*!< bit: 18 Match or Capture 2 */
|
||||
__I uint32_t MC3:1; /*!< bit: 19 Match or Capture 3 */
|
||||
__I uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t :16; /*!< bit: 0..15 Reserved */
|
||||
uint32_t :16; /*!< bit: 0..15 Reserved */
|
||||
__I uint32_t MC:4; /*!< bit: 16..19 Match or Capture x */
|
||||
__I uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
uint32_t :12; /*!< bit: 20..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} TCC_INTFLAG_Type;
|
||||
|
@ -627,7 +627,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint16_t RAMACER:1; /*!< bit: 7 Ram Access */
|
||||
__I uint16_t LPMNYET:1; /*!< bit: 8 Link Power Management Not Yet */
|
||||
__I uint16_t LPMSUSP:1; /*!< bit: 9 Link Power Management Suspend */
|
||||
__I uint16_t :6; /*!< bit: 10..15 Reserved */
|
||||
uint16_t :6; /*!< bit: 10..15 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} USB_DEVICE_INTFLAG_Type;
|
||||
@ -662,7 +662,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint16_t :2; /*!< bit: 0.. 1 Reserved */
|
||||
uint16_t :2; /*!< bit: 0.. 1 Reserved */
|
||||
__I uint16_t HSOF:1; /*!< bit: 2 Host Start Of Frame */
|
||||
__I uint16_t RST:1; /*!< bit: 3 Bus Reset */
|
||||
__I uint16_t WAKEUP:1; /*!< bit: 4 Wake Up */
|
||||
@ -671,7 +671,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint16_t RAMACER:1; /*!< bit: 7 Ram Access */
|
||||
__I uint16_t DCONN:1; /*!< bit: 8 Device Connection */
|
||||
__I uint16_t DDISC:1; /*!< bit: 9 Device Disconnection */
|
||||
__I uint16_t :6; /*!< bit: 10..15 Reserved */
|
||||
uint16_t :6; /*!< bit: 10..15 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} USB_HOST_INTFLAG_Type;
|
||||
@ -1146,14 +1146,14 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t RXSTP:1; /*!< bit: 4 Received Setup */
|
||||
__I uint8_t STALL0:1; /*!< bit: 5 Stall 0 In/out */
|
||||
__I uint8_t STALL1:1; /*!< bit: 6 Stall 1 In/out */
|
||||
__I uint8_t :1; /*!< bit: 7 Reserved */
|
||||
uint8_t :1; /*!< bit: 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t TRCPT:2; /*!< bit: 0.. 1 Transfer Complete x */
|
||||
__I uint8_t TRFAIL:2; /*!< bit: 2.. 3 Error Flow x */
|
||||
__I uint8_t :1; /*!< bit: 4 Reserved */
|
||||
uint8_t :1; /*!< bit: 4 Reserved */
|
||||
__I uint8_t STALL:2; /*!< bit: 5.. 6 Stall x In/out */
|
||||
__I uint8_t :1; /*!< bit: 7 Reserved */
|
||||
uint8_t :1; /*!< bit: 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} USB_DEVICE_EPINTFLAG_Type;
|
||||
@ -1197,11 +1197,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t PERR:1; /*!< bit: 3 Pipe Error Interrupt Flag */
|
||||
__I uint8_t TXSTP:1; /*!< bit: 4 Transmit Setup Interrupt Flag */
|
||||
__I uint8_t STALL:1; /*!< bit: 5 Stall Interrupt Flag */
|
||||
__I uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint8_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t TRCPT:2; /*!< bit: 0.. 1 Transfer Complete x Interrupt Flag */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} USB_HOST_PINTFLAG_Type;
|
||||
|
@ -218,7 +218,7 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t EW:1; /*!< bit: 0 Early Warning */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} WDT_INTFLAG_Type;
|
||||
|
@ -224,15 +224,15 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */
|
||||
__I uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */
|
||||
__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint8_t WIN0:1; /*!< bit: 4 Window 0 */
|
||||
__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */
|
||||
__I uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint8_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint8_t WIN:1; /*!< bit: 4 Window x */
|
||||
__I uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
uint8_t :3; /*!< bit: 5.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} AC_INTFLAG_Type;
|
||||
|
@ -478,7 +478,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t OVERRUN:1; /*!< bit: 1 Overrun */
|
||||
__I uint8_t WINMON:1; /*!< bit: 2 Window Monitor */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 3 Synchronization Ready */
|
||||
__I uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
uint8_t :4; /*!< bit: 4.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} ADC_INTFLAG_Type;
|
||||
|
@ -179,7 +179,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t UNDERRUN:1; /*!< bit: 0 Underrun */
|
||||
__I uint8_t EMPTY:1; /*!< bit: 1 Data Buffer Empty */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 2 Synchronization Ready */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DAC_INTFLAG_Type;
|
||||
|
@ -824,7 +824,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint8_t TERR:1; /*!< bit: 0 Transfer Error */
|
||||
__I uint8_t TCMPL:1; /*!< bit: 1 Transfer Complete */
|
||||
__I uint8_t SUSP:1; /*!< bit: 2 Channel Suspend */
|
||||
__I uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
uint8_t :5; /*!< bit: 3.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} DMAC_CHINTFLAG_Type;
|
||||
|
@ -360,11 +360,11 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t EXTINT13:1; /*!< bit: 13 External Interrupt 13 */
|
||||
__I uint32_t EXTINT14:1; /*!< bit: 14 External Interrupt 14 */
|
||||
__I uint32_t EXTINT15:1; /*!< bit: 15 External Interrupt 15 */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t EXTINT:16; /*!< bit: 0..15 External Interrupt x */
|
||||
__I uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
uint32_t :16; /*!< bit: 16..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} EIC_INTFLAG_Type;
|
||||
|
@ -486,20 +486,20 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
__I uint32_t OVR9:1; /*!< bit: 17 Channel 9 Overrun */
|
||||
__I uint32_t OVR10:1; /*!< bit: 18 Channel 10 Overrun */
|
||||
__I uint32_t OVR11:1; /*!< bit: 19 Channel 11 Overrun */
|
||||
__I uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
__I uint32_t EVD8:1; /*!< bit: 24 Channel 8 Event Detection */
|
||||
__I uint32_t EVD9:1; /*!< bit: 25 Channel 9 Event Detection */
|
||||
__I uint32_t EVD10:1; /*!< bit: 26 Channel 10 Event Detection */
|
||||
__I uint32_t EVD11:1; /*!< bit: 27 Channel 11 Event Detection */
|
||||
__I uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint32_t OVR:8; /*!< bit: 0.. 7 Channel x Overrun */
|
||||
__I uint32_t EVD:8; /*!< bit: 8..15 Channel x Event Detection */
|
||||
__I uint32_t OVRp8:4; /*!< bit: 16..19 Channel x+8 Overrun */
|
||||
__I uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
uint32_t :4; /*!< bit: 20..23 Reserved */
|
||||
__I uint32_t EVDp8:4; /*!< bit: 24..27 Channel x+8 Event Detection */
|
||||
__I uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
uint32_t :4; /*!< bit: 28..31 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint32_t reg; /*!< Type used for register access */
|
||||
} EVSYS_INTFLAG_Type;
|
||||
|
@ -314,26 +314,26 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint16_t RXRDY0:1; /*!< bit: 0 Receive Ready 0 */
|
||||
__I uint16_t RXRDY1:1; /*!< bit: 1 Receive Ready 1 */
|
||||
__I uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint16_t RXOR0:1; /*!< bit: 4 Receive Overrun 0 */
|
||||
__I uint16_t RXOR1:1; /*!< bit: 5 Receive Overrun 1 */
|
||||
__I uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
__I uint16_t TXRDY0:1; /*!< bit: 8 Transmit Ready 0 */
|
||||
__I uint16_t TXRDY1:1; /*!< bit: 9 Transmit Ready 1 */
|
||||
__I uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
__I uint16_t TXUR0:1; /*!< bit: 12 Transmit Underrun 0 */
|
||||
__I uint16_t TXUR1:1; /*!< bit: 13 Transmit Underrun 1 */
|
||||
__I uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint16_t RXRDY:2; /*!< bit: 0.. 1 Receive Ready x */
|
||||
__I uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
uint16_t :2; /*!< bit: 2.. 3 Reserved */
|
||||
__I uint16_t RXOR:2; /*!< bit: 4.. 5 Receive Overrun x */
|
||||
__I uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
uint16_t :2; /*!< bit: 6.. 7 Reserved */
|
||||
__I uint16_t TXRDY:2; /*!< bit: 8.. 9 Transmit Ready x */
|
||||
__I uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
uint16_t :2; /*!< bit: 10..11 Reserved */
|
||||
__I uint16_t TXUR:2; /*!< bit: 12..13 Transmit Underrun x */
|
||||
__I uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
uint16_t :2; /*!< bit: 14..15 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint16_t reg; /*!< Type used for register access */
|
||||
} I2S_INTFLAG_Type;
|
||||
|
@ -239,7 +239,7 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t READY:1; /*!< bit: 0 NVM Ready */
|
||||
__I uint8_t ERROR:1; /*!< bit: 1 Error */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} NVMCTRL_INTFLAG_Type;
|
||||
|
@ -468,7 +468,7 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CKRDY:1; /*!< bit: 0 Clock Ready */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} PM_INTFLAG_Type;
|
||||
|
@ -615,13 +615,13 @@ typedef union {
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
|
||||
__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t CMP:1; /*!< bit: 0 Compare x */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE0_INTFLAG_Type;
|
||||
@ -647,13 +647,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t CMP0:1; /*!< bit: 0 Compare 0 */
|
||||
__I uint8_t CMP1:1; /*!< bit: 1 Compare 1 */
|
||||
__I uint8_t :4; /*!< bit: 2.. 5 Reserved */
|
||||
uint8_t :4; /*!< bit: 2.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t CMP:2; /*!< bit: 0.. 1 Compare x */
|
||||
__I uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
uint8_t :6; /*!< bit: 2.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE1_INTFLAG_Type;
|
||||
@ -680,13 +680,13 @@ typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
typedef union { // __I to avoid read-modify-write on write-to-clear register
|
||||
struct {
|
||||
__I uint8_t ALARM0:1; /*!< bit: 0 Alarm 0 */
|
||||
__I uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
uint8_t :5; /*!< bit: 1.. 5 Reserved */
|
||||
__I uint8_t SYNCRDY:1; /*!< bit: 6 Synchronization Ready */
|
||||
__I uint8_t OVF:1; /*!< bit: 7 Overflow */
|
||||
} bit; /*!< Structure used for bit access */
|
||||
struct {
|
||||
__I uint8_t ALARM:1; /*!< bit: 0 Alarm x */
|
||||
__I uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
uint8_t :7; /*!< bit: 1.. 7 Reserved */
|
||||
} vec; /*!< Structure used for vec access */
|
||||
uint8_t reg; /*!< Type used for register access */
|
||||
} RTC_MODE2_INTFLAG_Type;
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue
Block a user