This patch allows boards to select a max ADC clock speed. This could be
handy if the board wants to clock the ADC differently according to the
board's front end analog circuitry or MCU model's ADC capabilities.
- `printf "%d" ""` triggers an "invalid number" warning on ash, so
let's use `0` as portable default for zero
- add quotes where needed to make shellcheck happy
- `gpio_ll_toggle()` now is race-free
- avoid using a look up table but branch to the two different registers
in the `gpio_ll*()` functions
- in most cases the GPIO port is a compile time constant and the
dead branch is eliminated by the optimizer, making this vastly
more efficient
- some MCUs do only have a single port, in which case
`GPIO_PORT_NUM(port)` is known to return `0` even if `port` is
not known, resulting in one of the branch being eliminated as
dead branch no matter what
- in case it really is unknown at compile time which port to work
on, the branch can still be implemented efficiently by the
compiler e.g. using a conditional move; likely more efficient
than fetching a value from the look up table.
This implements `pm_set_lowest()` for the MSP430. Unlike most other
platforms, it intentionally does not use pm_layered. It is pretty
similar to `pm_layered` in that is does use reference counters, but it
uses them for two independent clock sources.
The main difference is that the low frequency clock domain can be
disabled even when the high frequency clock is still active. With the
layers, disabling layer n-1 while layer n is still blocked would not
work.
For super low symbol rates the auxiliary clock (ACLK) is used to
conserve power. But with only 32,678 Hz clock just prescaling will
result in poor bit timing, hence correct modulation control settings
to compensate are needed. Since computing this is too expensive, a
look-up table (as switch statement) for the four most common symbol
rates was used.
The datasheet gave the prescaler values ordered by ascending symbol
rate, the switch statement was ordered descending.
This changes the order to match the datasheets order and matches the
correct prescaler setting to the corresponding symbol rate.
Fixes https://github.com/RIOT-OS/RIOT/issues/20620
Only call this instruction if a debug session is active otherwise it will trigger a hardfault
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
- The validity test for the high frequency crystal did not take
into account the higher range supported by the MSP430 F2xx / G2xx
family. This fixes the issue.
- The CPU family used is exposed to C as `CPU_FAM_<NAME>` macro
- Unused headers where dropped
- The status register is aliased `SR`, so let's use that more readable
name.
In TX-only mode the UART was previously release before all bits of the
last byte were shifted out. This adds a busy loop waiting while the
peripheral is still busy, fixing the issue.
Co-authored-by: benpicco <benpicco@googlemail.com>
The driver assumes that timer A and timer B have the same register
layout regarding all the features exposed by the driver. This is
backed by the MCU family datasheets for the MSP430 x1xx and the
MSP430 G2xx / F2xx MCUs (and likely more families).
The assert() is pretty limited in coverage, but more to document why
a "timer A clear" mask is used but still claiming the driver also
works for timer B. It just looks too much like a bug otherwise.
