Benjamin Valentin
f12a82e4f9
cpu/stm32: use common pm_off() function
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The code is identical to the one found in sys/pm_layered/pm.c
2021-01-27 14:07:22 +01:00
87cd41a6d1
Merge pull request #15657 from aabadie/pr/cpu/stm32_merge_clock_headers
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cpu/stm32: merge clock source selection headers
2021-01-25 13:57:05 +01:00
5fef40ab5a
cpu/stm32/clk: cleanup common clock configuration
2021-01-25 11:46:35 +01:00
dfed1b0567
cpu/stm32: merge g0 and g4 clock configuration headers
2021-01-25 11:46:34 +01:00
0aadf367cc
cpu/stm32: rework common clock source selection header
2021-01-25 11:46:34 +01:00
AravindKarri
63252d17c0
cpu/stm32/adc_f4: add support for stm32f7
2021-01-24 22:30:49 +01:00
048e8446ef
cpu/stm32f0: remove old clock configuration header
2020-12-17 08:38:40 +01:00
45c2b19f25
cpu/stm32: merge f0f1f3 clock configuration headers
2020-12-17 08:38:40 +01:00
c68f63b318
cpu/stm32f1f3: handle custom pll prediv/mul at cpu level
2020-12-08 17:36:52 +01:00
benpicco
a80631a297
Merge pull request #15074 from maribu/ptp-clock
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drivers/periph/ptp_clock
2020-12-03 09:59:07 +01:00
Marian Buschsieweke
ea3752db77
cpu/stm32: Added PTP clock implementation
2020-12-02 17:53:00 +01:00
b0b19203a7
Merge pull request #15190 from benpicco/boards/wefun-f401cc
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boards/common/weact-f4x1cx: create common WeAct boards
2020-12-01 12:03:38 +01:00
Benjamin Valentin
0ed34cdb4d
cpu/stm32: periph_eth: drop addr from eth_conf_t
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MAC address is now supplied by EUI provider, no need to hard-code
it for the board.
2020-11-29 23:11:14 +01:00
3f0ea86963
cpu/stm32/include/periph_cpu.h: add missing limits.h include
2020-11-23 16:56:34 +01:00
aebf6f06d8
stm32/flashpage: Add common stm32_flashpage_block_t type
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This commits adds a common type for the block writes to the flash of the
stm32. Depending on the family, the type has a different size. This
allows the removal of a number of ifdefs to track the differences
between families, simplifying the flashpage code
2020-11-18 12:04:57 +01:00
Leandro Lanzieri
5a04f94b63
Merge pull request #14967 from aabadie/pr/boards/stm32f0_clock_kconfig_only
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boards/stm32f0: add Kconfig for clock configuration
2020-11-17 12:14:10 +01:00
Gilles DOFFE
e4fa203db4
cpu/stm32: STM32MP1 family has no flash
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Then CPU_FLASH_BASE cannot be defined as FLASH_BASE does not exist.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
2ac0467807
cpu/stm32: configure timer2 for stm32mp1 boards
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This timer will be used by RIOT-OS as the scheduling timer for
stm32mp157c-dk2 board.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
504fba61b8
cpu/stm32: add uart support for stm32mp1
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stm32mp1 family uart driver is the same than for other stm32 families.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
be2c0ae179
cpu/stm32: define CPU_IRQ_NUMOF for stm32mp157cac
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This MCU has 150 interrupt vectors.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
d6400c77de
cpu/stm32: include stm32mp1 vendor headers
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Include stm32mp1 vendors header. CORE_CM4 must be defined to include
Cortex-M4 core headers.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
169097ac21
cpu/stm32: add stm32mp157x vendor headers
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Add vendor CMSIS headers from STMicroelectronics:
https://wiki.st.com/stm32mpu/wiki/STM32CubeMP1_architecture#CMSIS
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
4f0fd9cf95
cpu/stm32: add GPIO_PIN macro for stm32mp1 family
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As stm32mp1 family accesses gpio pins with a different
offset than other stm32, create a specific macro.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
7a2550da9b
cpu/stm32: add stm32mp1 peripheral busses
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Add stm32mp1 peripheral busses AHB1, AHB2, AHB3 and AHB4 with
enable/disable functions.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
67f37950a0
cpu/stm32: default i2c configuration
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* Setup i2c speed to I2C_SPEED_LOW by default
* enable i2c_write_regs() function.
* i2c frequency needs to be specified into board periph_conf.h
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
f39aa979af
cpu/stm32: setup CLOCK_LSI for stm32mp1
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Set stm32mp1 family LSI clock frequency to 32KHz as specified in datasheet.
STM32MP157C example:
https://www.st.com/resource/en/datasheet/stm32mp157c.pdf
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
1c063a74ea
stm32: Adapt to flashpage/flashpage_pagewise API
2020-11-11 23:16:42 +01:00
9d13c07e92
cpu/stm32f0: handle custom pll prediv/mul at cpu level
2020-11-10 15:55:38 +01:00
2f2622c76f
cpu/stm32: move stm32l5 default PLL N to cpu
2020-11-10 09:34:07 +01:00
36d33d38f7
cpu/stm32: move stm32l4+ default PLL N to cpu
2020-11-10 09:34:07 +01:00
934028c114
cpu/stm32: fix l4l5wb clock configuration
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Default values were wrong for WB when using HSE 32MHz as PLL input source
Default PLL input source was wrong when not using HSE and the board
provides an HSE
2020-11-10 09:34:07 +01:00
Benjamin Valentin
a90016740c
cpu/stm32/clk/f2f4f7: add config for 25 MHz HSE
2020-11-05 15:46:11 +01:00
ec5b47fc61
cpu/stm32l4+/wb: centralize max core clock define, adapt related boards
2020-10-27 08:44:55 +01:00
05f67a0a00
cpu/stm32: remove useless include in clock configuration
2020-10-26 11:21:07 +01:00
d6d85a3370
cpu/stm32: add common clock configuration header
2020-10-26 11:21:07 +01:00
f2e2c89424
cpu/stm32: move clock configuration headers to cpu
2020-10-26 11:16:23 +01:00
7f26d5c389
cpu/stm32l5: adapt flashpage periph
2020-10-23 18:21:50 +02:00
a416b2793f
cpu/stm32: add basic support for stm32l5
2020-10-23 18:21:50 +02:00
02c4b05a5a
cpu/stm32: configure stm32l5 cmsis repository version
2020-10-23 18:13:07 +02:00
2e2b87dda5
cpu/stm32: define EEPROM size for stm32l011k4
2020-10-15 16:24:33 +02:00
Marian Buschsieweke
6294382627
cpu/stm32: Use mii.h for periph_eth
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Use shared MII definitions and utilities instead own definitions.
2020-10-12 08:46:20 +02:00
Marian Buschsieweke
7920d32e32
cpu/stm32: Clean up periph_eth
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Use `addr` instead of `mac` when referring to L2 address.
2020-10-05 16:03:47 +02:00
ec2e1a15f9
cpu/stm32: move cmsis package Makefile to stm32 cpu
2020-09-02 11:30:49 +02:00
91c9b8c1b0
cpu/stm32: remove hardcoded CPU_IRQ_NUMOF defines
2020-09-02 11:30:49 +02:00
39d95b1950
cpu/stm32: add tool to generate a header with IRQ numof defines
2020-09-02 11:30:49 +02:00
hugues
6959a905a2
cpu/stm32/include/periph/f3/periph_cpu.h: add ADC support
2020-08-27 15:43:43 +02:00
5fab8f7a9a
stm32: Add define for when DMA channel selection is not supported
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This adds a placeholder define for when the DMA peripheral available on
the MCU doesn't support channel/trigger filtering. This is the case on
the stm32f1 and stm32f3 family.
2020-08-19 16:09:55 +02:00
b9d62e47d3
stm32: Add support for arbitrary SPI clock rates
2020-08-18 16:55:01 +02:00
benpicco
22d3bf7c51
Merge pull request #14594 from maribu/stm32-eth-cleanup
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cpu/stm32: Clean up / fix periph_eth
2020-08-17 21:16:27 +02:00
Marian Buschsieweke
4fcf37c162
cpu/stm32/periph_eth: Handle lost & spurious IRQs
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Fixes https://github.com/RIOT-OS/RIOT/issues/13496
2020-08-17 20:30:16 +02:00
