19824: boards/sipeed_longan_nano: separate board definition for Sipeed Longan Nano TFT r=benpicco a=gschorcht
### Contribution description
This PR provides a minimal separate board definition for the Sipeed Longan Nano version with TFT display which is just an extension of `boards/sipeed-longan-nano` with enabled TFT display module.
From the lessons we had to learn with the Kconfig modelling of optional hardware, the TFT version of the Sipeed Longan Nano board has been split off into its own board definition based on the existing Siepeed Longan Nano board.
Commits ba29a5eefad6f24106d51bf4fbd0d1407bc7b816, 237819eac894399e423f24ffd9b79b48af1cf25c, 6d8b56dcd426580ddbbbecd003ece54d46cee05c and c5faf349d63aef28b3aa3cfce8250229b6622a15 are small cleanups of peripheral configurations and could be split from this PR as follow-up PR (changes +70 -36).
### Testing procedure
Green CI
```
BOARD=sipeed-longan-nano-tft make -j8 -C tests/drivers/st77xx flash
```
should work
### Issues/PRs references
Follow up to PR #19813 and PR #19814
Prerequisite for PR #19825 and PR #19827
19855: gnrc_static: fix static PID assignment r=benpicco a=benpicco
19862: cpu/riscv_common: remove picolibc from blacklisting in CI r=benpicco a=gschorcht
### Contribution description
`picolibc` is now supported by the RISC-V toolchain in `riotdocker`. It is not necessary to blacklist it in CI any longer.
Reference: `picolib` was blacklisted by commit 45270dada0 in PR #15011.
### Testing procedure
1. Green CI
2. Check feature list for CI compilation:
```
BUILD_IN_DOCKER=1 RIOT_CI_BUILD=1 FEATURES_OPTIONAL=picolibc \
BOARD=sipeed-longan-nano make -j8 -C tests/sys/shell info-modules | grep picolib
picolibc
picolibc_stdout_buffered
picolibc_syscalls_default
```
### Issues/PRs references
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Benjamin Valentin <benjamin.valentin@bht-berlin.de>
After cleaning up the default config of SPI, this commit cleans up the configuration for `sipeed-longan-nano` a bit:
- PA4 is no longer used as default CS for `SPI_DEV(1)`
- At least one DAC channel PA4 is always available if DAC is used.
- PA4 is always available as ADC channel if DAC is not used.
- The order of ADC and DAC channels has been changed accordingly.
This commit includes the following cleanups:
- The macros `I2C_DEV_1_USED` and `SPI_DEV_1_USED` are now used with the values 0 and 1. This allows to enable but also to disable the second interface even if the board definition enables it by default.
- The second I2C device `I2C_DEV(1)` and the second SPI device `SPI_DEV(1)` are now disabled by default.
- The second SPI device `SPI_DEV(1)` now uses PB5 as default CS signal instead of PA4 to keep PA4 free for ADC or DAC even if `SPI_DEV(1)` is used, for example for the TFT display.
This commit introduces a separate board definition based on the `sipeed-longan-nano` board definition for the TFT version of the Sipeed Longan Nano board.
19856: tests/net/gcoap_fileserver: Fix failing nightlies r=benpicco a=MrKevinWeiss
### Contribution description
This test has been failing inconsistently in the nightlies and sometimes on unrelated PRs. I was able to reproduce it with murdock and as soon as I added some print statements to the test it went away. Since the issue is something to do with a failure when comparing 2 files after a node sends a file I am guessing that the comparison comes occasionally too fast and the file is not ready.
Maybe there is some more synchronization needed after a `ncput` but for now just adding a small sleep should prevent this issue.
### Testing procedure
Run murdock multiple times or try to get it failing on a local setup then apply the PR...
### Issues/PRs references
Co-authored-by: MrKevinWeiss <weiss.kevin604@gmail.com>
19854: cpu/esp_common: esp-wifi: drop assert(val) r=benpicco a=benpicco
19858: tests/drivers/shtcx: don't repeat last string on error r=benpicco a=benpicco
Co-authored-by: Benjamin Valentin <benjamin.valentin@bht-berlin.de>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
19452: dist/tools/esptools: upgrade ESP32x toolchains to GCC version 12.2 r=MrKevinWeiss a=gschorcht
### Contribution description
This PR upgrades ESP32x toolchains to GCC version 12.2 which is a prerequisite for upgrading the ESP-IDF to version 5.1.
This PR depends on PR #19450
### Testing procedure
`dist/tools/install.sh all` should install all ESP32x toolchains.
`. dist/tools/export.sh all` should make them visible.
### Issues/PRs references
Depends on PR #19450
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
19852: clang floating point handling fix r=MrKevinWeiss a=MrKevinWeiss
### Contribution description
As promised (with a delay for vacation), here is the nightlies fix. It is very easy...
I guess previously native had different handling of floating points (similar to cross-compiled gcc) when using clang. thanks to `@maribu` great work on fixing the llvm toolchain issues, that seems to not be an issue anymore (though I don't know the commit that fixed it).
Thus we remove clang conditions and enjoy a green CI.
### Testing procedure
It seems like this wasn't tested or doesn't get tested in the normal murdock/bors procedure (still don't know why) but can be easily verified with a/b testing (master vs this PR)
```
TOOLCHAIN=llvm make all test -C tests/pkg/cayenne-lpp/
```
and
```
TOOLCHAIN=llvm make all test -C tests/pkg/lora-serialization/
```
I also tested with cross compiling on the samr21 and they all work...
### Issues/PRs references
Look at nightlies...
Co-authored-by: MrKevinWeiss <weiss.kevin604@gmail.com>
19843: cpu/stm32/periph: add FMC/FSMC support for STM32 r=aabadie a=gschorcht
### Contribution description
The PR provides a driver for STM32 FMC/FSMC peripherals. It supports:
- NOR Flashes,
- PSRAMs/SRAMs,
- SDRAMs, and
- Display Controllers with MCU 8-/16-bit parallel interface.
NAND Flashes are not yet supported.
To use the FMC/FSMC, the `periph_fmc` module has to be enabled. To keep required data structures and resulting code as small as possible, a couple of pseudomodules are defined that have to be used in addition to the `periph_fmc` module to enable supported features. These are:
| Module | Feature |
|:-----------------------|:----------------------------------------|
| `periph_fmc_nor_sram` | enable NOR Flash and PSRAM/SRAM support |
| `periph_fmc_sdram` | enable SDRAM support |
| `periph_fmc_16bit` | enable 16-bit support |
| `periph_fmc_32bit` | enable 32-bit support |
The board has then to define
- the corresponding features according to the connected external device,
- the peripheral configuration of the FMC/FSMC of type `fmc_conf_t,`
- the configuration of the FMC banks which describe the connected external devices.
The PR includes the support for
- `stm32f429i-disc1` with 8 MByte SDRAM
- `stm32f746g-disco` with 16 MByte SDRAM
- `stm32l496g-disco` with 1 MByte SRAM
- `stm32f723e-disco` with 1 MByte SRAM.
To use the RAM connected to the FMC as heap, the board defines `FMC_RAM_ADDR` and ` FMC_RAM_LEN`. For that purpose:
- the linker symbols `_fmc_ram_addr` and `_fmc_ram_len` are set,
- a memory region `fcmram` is added in linker script for the FMC RAM based on these `_fcm_ram_*` linker symbols
- a section for the FMC RAM is defined in this memory region that defines the heap by setting `_sheap3` and `_eheap3` and
- the number of heaps is set to 4 to use `_sheap3` and `_eheap3` even though `_sheap1` and `_eheap1` (the backup RAM) and `_sheap2` and `_eheap2` (SRAM4) are not present.
Once the `drivers/st77xx` and `drivers/lcd` changes are merged, the display for boards like
the `stm32l496g-disco` and `stm32f723e-disco` can also use the FMC peripheral.
~**NOTE**: The PR includes the fix in PR #19842 for now (commit 560fea17a0c50483214770855e22cc94df0e55b5).~
### Testing procedure
1. Use one of the boards above and flash `tests/driver/stm32_fmc`, for example:
```
BOARD=stm32f429i-disc1 make -j8 -C tests/drivers/stm32_fmc flash test
```
The test should succeed.
**NOTE**: There is still a problem with `stm32f746g-disco`. It crashes with a hard-fault on accessing the upper 8 MByte of the 16 MByte.
2. Use the board above and flash `tests/sys/malloc`, for example:
```
USEMODULE=periph_fmc CFLAGS='-DCHUNK_SIZE=4096 -DDEBUG_ASSERT_VERBOSE' \
BOARD=stm32f429i-disc1 make -j8 -C tests/sys/malloc
```
The FMC RAM should be used for `malloc`. On `stm32f746g-disco` for example
```
...
Allocated 4096 Bytes at 0x2002d7c8, total 184672
Allocated 4096 Bytes at 0x2002e7e0, total 188776
Allocated 4096 Bytes at 0xd0000008, total 192880
Allocated 4096 Bytes at 0xd0001010, total 196984
Allocated 4096 Bytes at 0xd0002018, total 201088
...
Allocated 4096 Bytes at 0xd07fd6d0, total 8544520
Allocated 4096 Bytes at 0xd07fe6e8, total 8548624
Allocations count: 2083
```
### Issues/PRs references
~Depends on PR #19842~
19847: .github: drop test-on-ryot workflow r=aabadie a=aabadie
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
To detect misconfigurations of addresses and sizes, the whole memory is filled word-wise with it's addresses. If the content doesn't match, it prints the address and the content.
f
If the board defines `FMC_RAM_ADDR` and `FMC_RAM_LEN`, the FMC RAM is used a additional heap if module `periph_fmc` is enabled.
For that purpose
- the linker symbols `_fmc_ram_addr` and `_fmc_ram_len` are set,
- a memory region `fcmram` is added in linker script for the FMC RAM based on these `_fcm_ram_*` linker symbols
- a section for the FMC RAM is defined in this memory region that defines the heap by setting `_sheap3` and `_eheap3` and
- the number of heaps is set to 4 since to use `_sheap3` and `_eheap3` even though `_sheap1` and `_eheap1` (the backup RAM) and `_sheap2` and `_eheap2` (SRAM4) are not present.
19817: compile_and_test_for_boards: Add no-compile flag r=benpicco a=MrKevinWeiss
### Contribution description
Since we have a no-test flag that prevents executing tests, I think a no-compile flag is a nice compliment. Why? Well if I want to use this script for running multiple boards at the same time, RIOT is not so great handling parallel compile steps with conflicts on lockfiles happening, mostly due to packages. With this I can compile a list of boards sequentially, then flash and run tests in parallel, skipping the compile step.
### Testing procedure
Run the following once to compile and clean:
```
./dist/tools/compile_and_test_for_board/compile_and_test_for_board.py . native --applications tests/sys/shell --clean-after
```
Then try to run without the compile step and it should fail due to lack of the binary
```
./dist/tools/compile_and_test_for_board/compile_and_test_for_board.py . native --applications tests/sys/shell --no-compile
```
### Issues/PRs references
19826: ztimer/periodic: reinit remove from right clock and handle aquired ztimer r=benpicco a=kfessel
### Contribution description
#19806 added some retinit handling for ztimer periodic removing the timer from the new clock
This tries to detect if this is a reinit and remove the timer from the old clock
this also removes the ztimer_acquire/_release handling by removing now calls in favour of set return value and now values that are allready in ztimer,
that also has the potential to reduce the jitter of the periodic calls and bus-usage (for cpus that take their time to get "now")
### Testing procedure
read
run tests/sys/ztimer_periodic
### Issues/PRs references
Fixes#19806
19841: boards/adafruit-itsybitsy-nrf52: Add configuration for DotStar LED r=benpicco a=jimporter
19842: cpu/stm32: fix ld script for SRAM4 r=benpicco a=gschorcht
### Contribution description
This PR fixes the LD script for STM32.
Since the CCM and SRAM4 length are defined as symbols with perifx `_`, the LD script didn't use them correctly. Instead of using `ccmram_length` and `sram4_length`, `_ccmram_length` and `_sram4_length` have to be used. Furthermore, the location counter for the SRAM has to be set to the beginning of SRAM4 to work.
BTW, I don't understand why the `ccmram` region is defined. There is no section definition that would use it to place code or data with attribute `.ccmram.*` there.
Without the fix in this PR, defined symbols in `tests/sys/malloc` for the `b-u585i-iot02a` board were:
```python
00000000 T _sheap2 <== wrong start position because of wrong location counter
28000000 T _eheap2 <== wrong end position because of `sram4_length` is 0.
```
Although the `tests/sys/malloc` crashes for `b-u585i-iot02a` at the end of the heap (known problem, see [here](https://github.com/RIOT-OS/RIOT/pull/17410#issuecomment-996556823)), it uses only the backup RAM before it crashes:
```
Allocated 512 Bytes at 0x200bf600, total 756072
Allocated 512 Bytes at 0x200bf818, total 756592
Allocated 512 Bytes at 0x200bfa30, total 757112
Allocated 512 Bytes at 0x200bfc48, total 757632
Allocated 512 Bytes at 0x40036408, total 758152
Allocated 512 Bytes at 0x40036610, total 758672
Allocated 512 Bytes at 0x40036818, total 759192
```
With the fix in this PR, defined symbols in `tests/sys/malloc` for the `b-u585i-iot02a` board are:
```python
28000000 T _sheap2 <== correct start position
28004000 T _eheap2 <== correct end position
```
`tests/sys/malloc` also crashes for the `b-u585i-iot02a` at the end of the heap, but it uses also the SRAM4 before it crashes.
```
Allocated 512 Bytes at 0x200bf600, total 756072
Allocated 512 Bytes at 0x200bf818, total 756592
Allocated 512 Bytes at 0x200bfa30, total 757112
Allocated 512 Bytes at 0x200bfc48, total 757632
Allocated 512 Bytes at 0x40036408, total 758152
Allocated 512 Bytes at 0x40036610, total 758672
Allocated 512 Bytes at 0x40036818, total 759192
Allocated 512 Bytes at 0x28000008, total 759712
Allocated 512 Bytes at 0x28000210, total 760232
Allocated 512 Bytes at 0x28000418, total 760752
...
Allocated 512 Bytes at 0x280038e8, total 774272
Allocated 512 Bytes at 0x28003af0, total 774792
Allocated 512 Bytes at 0x28003cf8, total 775312
```
### Testing procedure
1. Flash `tests/sys/malloc` and use `MAX_MEM` limit to stop `malloc` before the crash:
```
CFLAGS='-DMAX_MEM=774800 -DCHUNK_SIZE=512 -DDEBUG_ASSERT_VERBOSE' \
BOARD=b-u585i-iot02a make -j8 -C tests/sys/malloc flash
```
Without the PR it crashes at the end of the backup RAM. With the PR it works.
2. Check `_sheap2` and `_eheap2` with
```
nm -s tests/sys/malloc/bin/b-u585i-iot02a/tests_malloc.elf | grep heap2 | sort
```
Without the PR it will be:
```
00000000 T _sheap2
28000000 T _eheap2
```
With the PR it should be:
```
28000000 T _sheap2
28004000 T _eheap2
```
### Issues/PRs references
Co-authored-by: MrKevinWeiss <weiss.kevin604@gmail.com>
Co-authored-by: Karl Fessel <karl.fessel@ovgu.de>
Co-authored-by: Jim Porter <jporterbugs@gmail.com>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
19839: pkg/arduino_adafruit_sensor: fix dependencies r=maribu a=maribu
### Contribution description
This fixes the dependencies of the `arduino_adafruit_sensor` package, which previously relied on the `arduino` feature. This feature no longer exists, as it was split into more fine granular features. However, the module should never have used that feature directly in the first place, but rather just use the arduino module. This in turn depends on the correct features.
### Testing procedure
`tests/arduino_adafruit_sensor` should again be supported by boards that have the features required by the `arduino` module.
### Issues/PRs references
Fallout of https://github.com/RIOT-OS/RIOT/pull/19759
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@posteo.net>
This fixes the dependencies of the `arduino_adafruit_sensor` package,
which previously relied on the `arduino` feature. This feature no longer
exists, as it was split into more fine granular features. However, the
module should never have used that feature directly in the first place,
but rather just use the arduino module. This in turn depends on the
correct features.
