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boards/stm32l496g-disco: add FMC support
This commit is contained in:
Gunar Schorcht
parent
31c29c1e74
commit
bb85d5a239
@ -17,6 +17,9 @@ config BOARD_STM32L496G_DISCO
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select HAS_PERIPH_ADC
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select HAS_PERIPH_DAC
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select HAS_PERIPH_DMA
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select HAS_PERIPH_FMC
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select HAS_PERIPH_FMC_NOR_SRAM
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select HAS_PERIPH_FMC_16BIT
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select HAS_PERIPH_I2C
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select HAS_PERIPH_LPUART
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select HAS_PERIPH_RTC
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@ -10,6 +10,10 @@ ifneq (,$(filter touch_dev,$(USEMODULE)))
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USEMODULE += ft5x06
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endif
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ifneq (,$(filter periph_fmc,$(USEMODULE)))
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FEATURES_REQUIRED += periph_fmc_16bit
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endif
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ifneq (,$(filter periph_uart,$(USEMODULE)))
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USEMODULE += periph_lpuart
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ifeq (,$(filter periph_spi_stmod_plus,$(USEMODULE)))
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@ -5,6 +5,9 @@ CPU_MODEL = stm32l496ag
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_dac
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FEATURES_PROVIDED += periph_dma
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FEATURES_PROVIDED += periph_fmc
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FEATURES_PROVIDED += periph_fmc_16bit
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FEATURES_PROVIDED += periph_fmc_nor_sram
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_lpuart
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FEATURES_PROVIDED += periph_rtc
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@ -16,3 +16,6 @@ ifneq (,$(filter usbus_dfu tinyusb_dfu,$(USEMODULE)))
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else
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RIOTBOOT_LEN ?= 0x2000
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endif
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FMC_RAM_ADDR=0x64000000
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FMC_RAM_LEN=1024K
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@ -36,7 +36,7 @@ The main features of this board are:
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| Capacitive Touch Screen | - | FT3267 used as driver IC (not supported yet) |
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| Stereo microphones | - | |
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| SAI audio codec | - | |
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| External PSRAM | - | Connected to FMC peripheral (not supported yet) |
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| External PSRAM | x | Connected to FMC peripheral |
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| External Quad-SPI Flash | - | QSPI peripheral is not yet supported |
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| SD Card Interface | - | |
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@ -156,15 +156,111 @@ static const dac_conf_t dac_config[] = {
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{ GPIO_PIN(PORT_A, 5), .chan = 1 }, /* Arduino D13, conflicts with SPI_DEV(0) */
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#endif
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};
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/** @}*/
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/**
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* @brief Number of DACs
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* @{
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*/
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#define DAC_NUMOF ARRAY_SIZE(dac_config)
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/** @} */
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/**
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* @name FMC configuration
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* @{
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*/
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/**
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* @brief FMC controller configuration
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*/
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static const fmc_conf_t fmc_config = {
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.bus = AHB3,
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.rcc_mask = RCC_AHB3ENR_FMCEN,
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#if MODULE_PERIPH_FMC_NOR_SRAM
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.ne1_pin = { .pin = GPIO_PIN(PORT_D, 7), .af = GPIO_AF12, }, /* LCD_NE signal, subbank 1 */
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.ne2_pin = { .pin = GPIO_PIN(PORT_G, 9), .af = GPIO_AF12, }, /* PSRAM_NE signal, subbank 2 */
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.noe_pin = { .pin = GPIO_PIN(PORT_D, 4), .af = GPIO_AF12, }, /* PSRAM/LCD_OE signal (OE) */
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.nwe_pin = { .pin = GPIO_PIN(PORT_D, 5), .af = GPIO_AF12, }, /* PSRAM/LCD_WE signal (WE) */
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.addr = {
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{ .pin = GPIO_PIN(PORT_F, 0), .af = GPIO_AF12, }, /* PSRAM_A0 signal */
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{ .pin = GPIO_PIN(PORT_F, 1), .af = GPIO_AF12, }, /* PSRAM_A1 signal */
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{ .pin = GPIO_PIN(PORT_F, 2), .af = GPIO_AF12, }, /* PSRAM_A2 signal */
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{ .pin = GPIO_PIN(PORT_F, 3), .af = GPIO_AF12, }, /* PSRAM_A3 signal */
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{ .pin = GPIO_PIN(PORT_F, 4), .af = GPIO_AF12, }, /* PSRAM_A4 signal */
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{ .pin = GPIO_PIN(PORT_F, 5), .af = GPIO_AF12, }, /* PSRAM_A5 signal */
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{ .pin = GPIO_PIN(PORT_F, 12), .af = GPIO_AF12, }, /* PSRAM_A6 signal */
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{ .pin = GPIO_PIN(PORT_F, 13), .af = GPIO_AF12, }, /* PSRAM_A7 signal */
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{ .pin = GPIO_PIN(PORT_F, 14), .af = GPIO_AF12, }, /* PSRAM_A8 signal */
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{ .pin = GPIO_PIN(PORT_F, 15), .af = GPIO_AF12, }, /* PSRAM_A9 signal */
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{ .pin = GPIO_PIN(PORT_G, 0), .af = GPIO_AF12, }, /* PSRAM_A10 signal */
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{ .pin = GPIO_PIN(PORT_G, 1), .af = GPIO_AF12, }, /* PSRAM_A11 signal */
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{ .pin = GPIO_PIN(PORT_G, 2), .af = GPIO_AF12, }, /* PSRAM_A12 signal */
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{ .pin = GPIO_PIN(PORT_G, 3), .af = GPIO_AF12, }, /* PSRAM_A13 signal */
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{ .pin = GPIO_PIN(PORT_G, 4), .af = GPIO_AF12, }, /* PSRAM_A14 signal */
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{ .pin = GPIO_PIN(PORT_G, 5), .af = GPIO_AF12, }, /* PSRAM_A15 signal */
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{ .pin = GPIO_PIN(PORT_D, 11), .af = GPIO_AF12, }, /* PSRAM_A16 signal */
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{ .pin = GPIO_PIN(PORT_D, 12), .af = GPIO_AF12, }, /* PSRAM_A17 signal */
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{ .pin = GPIO_PIN(PORT_D, 13), .af = GPIO_AF12, }, /* PSRAM_A18 / LCD_RS signal */
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},
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#endif
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.data = {
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{ .pin = GPIO_PIN(PORT_D, 14), .af = GPIO_AF12, }, /* PSRAM_D0 / LCD_D0 signal */
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{ .pin = GPIO_PIN(PORT_D, 15), .af = GPIO_AF12, }, /* PSRAM_D1 / LCD_D1 signal */
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{ .pin = GPIO_PIN(PORT_D, 0), .af = GPIO_AF12, }, /* PSRAM_D2 / LCD_D2 signal */
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{ .pin = GPIO_PIN(PORT_D, 1), .af = GPIO_AF12, }, /* PSRAM_D3 / LCD_D3 signal */
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{ .pin = GPIO_PIN(PORT_E, 7), .af = GPIO_AF12, }, /* PSRAM_D4 / LCD_D4 signal */
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{ .pin = GPIO_PIN(PORT_E, 8), .af = GPIO_AF12, }, /* PSRAM_D5 / LCD_D5 signal */
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{ .pin = GPIO_PIN(PORT_E, 9), .af = GPIO_AF12, }, /* PSRAM_D6 / LCD_D6 signal */
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{ .pin = GPIO_PIN(PORT_E, 10), .af = GPIO_AF12, }, /* PSRAM_D7 / LCD_D7 signal */
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#if MODULE_PERIPH_FMC_16BIT
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{ .pin = GPIO_PIN(PORT_E, 11), .af = GPIO_AF12, }, /* PSRAM_D8 / LCD_D8 signal */
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{ .pin = GPIO_PIN(PORT_E, 12), .af = GPIO_AF12, }, /* PSRAM_D9 / LCD_D9 signal */
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{ .pin = GPIO_PIN(PORT_E, 13), .af = GPIO_AF12, }, /* PSRAM_D10 / LCD_D10 signal */
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{ .pin = GPIO_PIN(PORT_E, 14), .af = GPIO_AF12, }, /* PSRAM_D11 / LCD_D11 signal */
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{ .pin = GPIO_PIN(PORT_E, 15), .af = GPIO_AF12, }, /* PSRAM_D12 / LCD_D12 signal */
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{ .pin = GPIO_PIN(PORT_D, 8), .af = GPIO_AF12, }, /* PSRAM_D13 / LCD_D13 signal */
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{ .pin = GPIO_PIN(PORT_D, 9), .af = GPIO_AF12, }, /* PSRAM_D14 / LCD_D14 signal */
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{ .pin = GPIO_PIN(PORT_D, 10), .af = GPIO_AF12, }, /* PSRAM_D15 / LCD_D15 signal */
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#endif
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},
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.nbl0_pin = { .pin = GPIO_PIN(PORT_E, 0), .af = GPIO_AF12, }, /* PSRAM_NBL0 signal (LB) */
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.nbl1_pin = { .pin = GPIO_PIN(PORT_E, 1), .af = GPIO_AF12, }, /* PSRAM_NBL1 signal (UB) */
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};
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/**
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* @brief FMC Bank configuration
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*
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* The board has a PSRAM IS66WV51216EBLL-70BLI with 8 MBit on-board.
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* It is organized in 512K x 16 bits and connected to bank 1, subbank 2
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* at address 0x64000000.
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*
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* The LCD display of the board is connected to bank 1, subbank1
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* at address 0x60000000.
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*/
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static const fmc_bank_conf_t fmc_bank_config[] = {
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/* bank 1, subbank 2 is used for PSRAM with asynchronuous
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* access in Mode 1, i.e. write timings are not used */
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{
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.bank = FMC_BANK_1,
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.mem_type = FMC_SRAM,
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.data_width = FMC_BUS_WIDTH_16BIT,
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.address = 0x64000000, /* Bank 1, subbank 2 is mapped to 0x64000000 */
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.size = MiB(1), /* Size in Mbyte, 512K x 16 bit */
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.nor_sram = {
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.sub_bank = 2,
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.ext_mode = false, /* Mode 1 used, no separate w_timing */
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/* timings for IS66WV51216EBLL-70BLI */
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.r_timing = { .addr_setup = 6, /* t_AA = 70 ns (6 HCLKs a 12.5 ns) */
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.data_setup = 2, /* t_SD = 30 ns (3 HCLKs a 12.5 ns) */
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.bus_turnaround = 1, }, /* 1 HCLK a 12.5 ns */
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},
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},
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};
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/**
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* @brief Number of configured FMC banks
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*/
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#define FMC_BANK_NUMOF ARRAY_SIZE(fmc_bank_config)
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/** @} */
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/**
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* @name I2C configuration
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*
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