The `SWJ_CFG` field of the `AFIO_MAPR` register is write only and values
read are undefined (random). Hence, using `AFIO->MAPR |= mask;` to
enable flags can corrupt the state of the `SWJ_CFG` (configure it to
an unintended value).
Two helper functions have been introduced:
- `afio_mapr_read()` reads the value, but sanitizes the `SWJ_CFG` field
to zero
- `afio_mapr_write()` writes the given value, but applies the `SWJ_CFG`
configured by the board before writing.
Finally, the `nucleo-f103rb` and `bluepill*`/`blackpill*` boards have
been updated to no longer specify `STM32F1_DISABLE_JTAG`, as this
is handled by the `SWJ_CFG` setting (which defaults to disabling JTAG).
In Engineering mode (BOOT0 off and BOOT2 on), only the Cortex-M4
core is running. It means that all clocks have to be setup
by the Cortex-M4 core.
In other modes, the clocks are setup by the Cortex-A7 and then should
not be setup by Cortex-M4.
stm32mp1_eng_mode pseudomodule have to be used in Engineering mode
to ensure clocks configuration with IS_USED(MODULE_STM32MP1_ENG_MODE)
macro.
This macro can also be used in periph_conf.h to define clock source
for each peripheral.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
APB1 bus clock is always enabled is not manageable by RCC register.
So avoid enabling it.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
