RIOT-OS/RIOT
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8764 Commits

Author SHA1 Message Date
Marian Buschsieweke
0dfd83938f
{cpu,drivers}/periph_gpio_ll: add missing include 
For `gpio_ll_print_conf()` we need to include `<stdio.h>`, when not
using `fmt.h`.
 2024-11-27 09:06:56 +01:00
Marian Buschsieweke
87ae06a33e
Merge pull request #21015 from benpicco/cpu/native-netdev_tap-new_api 
netdev_tap: port to `netdev_new_api`
 2024-11-22 06:29:10 +00:00
Marian Buschsieweke
33195d7965
cpu/sam{d21,d5x,l21}: Claim support for BlackMagic Probe 
Using `PROGRAMMER=bmp` has been proven to work reliably at least on
SAMD21, SAMD5x and SAML21.

Since using unsupported programmers is treated as a warning, this change
only reduces the noise in the shell a bit and is not a functional
change.

[1]: https://black-magic.org/supported-targets.html
 2024-11-21 17:20:48 +01:00
Benjamin Valentin
3ba131c0f2 netdev_tap: port to netdev_new_api 2024-11-21 11:45:33 +01:00
benpicco
2bce94a7c7
Merge pull request #21012 from benpicco/netdev_new_api-relax 
netdev_new_api: allow `.send()` to return > 0 to signal synchronos send
 2024-11-20 22:28:26 +00:00
Benjamin Valentin
4eb1c35fe3 cpu/sam0_eth: fix return values of sam0_eth_send() 2024-11-20 18:17:22 +01:00
benpicco
1938002526
Merge pull request #20926 from Enoch247/fix-stm32-periph-timer-spurious-irq 
cpu/stm32/periph/timer: prevent spurious IRQs
 2024-11-20 16:24:49 +00:00
Joshua DeWeese
f24fc69118 cpu/stm32/periph/timer: fix whitespace style 2024-11-19 21:50:23 -05:00
Marian Buschsieweke
387f970b50
Merge pull request #20999 from maribu/cpu/sam0_common/gpio_ll/fix-gpio_get_port 
cpu/sam0_common/periph_gpio_ll: fix gpio_get_port() and gpio_ll_query_conf()
 2024-11-18 19:10:44 +00:00
Marian Buschsieweke
0222b8c54c
cpu/sam0_common/periph_gpio_ll: fix gpio_query_conf() 
For the other MCUs, we take the input register state instead of the
output register state when the pin is configured as input. Let's do
the same here, as this is a lot more useful and intuitive.
 2024-11-18 14:27:14 +01:00
Marian Buschsieweke
72d0b2b180
cpu/sam0_common/periph_gpio_ll: fix gpio_get_port() 
It turns out that the legacy GPIO API and GPIO LL may disagree on what
the GPIO base address is: GPIO LL will use the IOBUS as base address
no matter what, the legacy GPIO API will use the APB as base address
unless `periph_gpio_fast_read` is used.

If the APIs disagree, we need to do impedance matching.
 2024-11-18 12:50:25 +01:00
Marian Buschsieweke
c636f34eac
Merge pull request #20998 from HavingaThijs/maskLengthByte 
cpu/cc2538: mask length byte before checking CRC
 2024-11-18 08:21:02 +00:00
HavingaThijs
0c72444f24 cpu/cc2538: mask length byte before checking CRC 2024-11-18 08:34:29 +01:00
Marian Buschsieweke
f5f6b41bf8
Merge pull request #20994 from maribu/cpu/sam0_common/periph_adc/errata-2.1.6 
cpu/sam0_common/periph_adc: add work around for errata 2.1.6
 2024-11-17 13:55:12 +00:00
Benjamin Valentin
08fc52b53a cpu/sam0_common: eth: collision should return -EBUSY 2024-11-15 14:18:58 +01:00
Marian Buschsieweke
a89c924682
cpu/sam0_common/periph_adc: add work around for errata 2.1.6 
This adds a delay between enabling the ADC and starting to sample
on the SAMD5x MCUs when the internal bandgap reference is used.

Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
 2024-11-14 22:44:23 +01:00
mguetschow
ec9afd28eb
Merge pull request #20972 from IsikcanYilmaz/pr/esp32_usb_serial_jtag_isr_flag_reset 
cpu/esp32/stdio_usb_serial_jtag: Fix to ESP32 stdio usb serial hanging if it receives data too quickly
 2024-11-12 08:45:34 +00:00
Isikcan Yilmaz
a21d302d08 cpu/esp32/stdio_usb_serial_jtag: clear all usb serial jtag flags and flush the tx fifo at the end of usb serial isrs 2024-11-11 11:20:46 +01:00
Marian Buschsieweke
1672c0e613
Merge pull request #20956 from HavingaThijs/cc2538_crc_bit 
cpu/cc2538: use RX FIFO count to determine CRC OK location
 2024-11-08 12:49:36 +00:00
Dylan Laduranty
6401abbd92
Merge pull request #20850 from dylad/pr/cpu/saml21/compat_headers 
cpu/saml21: add compatibily headers for vendor files migration
 2024-11-08 08:14:28 +00:00
Dylan Laduranty
a9cb19dcc5 cpu/samr30: create compatibility headers for vendor files migration 
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
 2024-11-07 21:25:03 +01:00
Dylan Laduranty
7d83c7a9d2 cpu/samr34: create compatibility headers for vendor files migration 
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
 2024-11-07 21:22:23 +01:00
Marian Buschsieweke
2b6f65a08a
build_system/xfa: change API to fix alignment 
This changes the API of xfa from

    XFA(array_name, prio) type element_name = INITIALIZER;

to

    XFA(type, array_name, prio) element_name = INITIALIZER;

this allows forcing natural alignment of the type, fixing failing tests
on `native64`.
 2024-11-07 16:30:01 +01:00
Thijs Havinga
81358aa7b3
cpu/cc2538: use RX FIFO count to determine CRC OK location 2024-11-06 14:41:37 +01:00
mguetschow
00e25adfe3
Merge pull request #20720 from netd-tud/chacha20-glue-code-implementation 
sys/psa_crypto: one-shot Chacha20 support
 2024-10-29 16:52:30 +00:00
Marian Buschsieweke
c2c2cc8592
drivers/periph_gpio: let gpio_read() return bool 
Since https://github.com/RIOT-OS/RIOT/pull/20935 gpio_write()
uses a `bool` instead of an `int`. This does the same treatment for
`gpio_read()`.

This does indeed add an instruction to `gpio_read()` implementations.
However, users caring about an instruction more are better served with
`gpio_ll_read()` anyway. And `gpio_read() == 1` is often seen in
newcomer's code, which would now work as expected.
 2024-10-23 13:24:09 +02:00
Benjamin Valentin
4627f66caa drivers/periph/gpio: make gpio_write() take a bool 2024-10-22 16:39:48 +02:00
Joshua DeWeese
4e357d410c cpu/stm32/periph/timer: prevnt spurious IRQs 
This patch hardens the STM32 timer driver against some possible causes
of spurious IRQs.
 2024-10-18 15:51:42 -04:00
Wunderbaeumchen
b9396c4739 sys/psa_crypto: chacha20 oneshot gluecode 2024-10-17 10:25:59 +02:00
AnnsAnn
db2a20c96c cpu/cortexm: fix spelling mistake 2024-10-16 16:04:10 +02:00
AnnsAnn
bd48d0bb82 cpu/esp32: improve build error messages 2024-10-16 16:02:32 +02:00
Marian Buschsieweke
702ad02b33
cpu/sam0_common/periph_dma: Fix API mismatch 
Match the signature of the implementation of the dma_prepare() with the
declaration to fix:

    /home/marian.buschsieweke@ml-pa.loc/Repos/software/RIOT/master/cpu/sam0_common/periph/dma.c:172:6: error: conflicting types for 'dma_prepare' due to enum/integer mismatch; have 'void(dma_t,  uint8_t,  const void *, void *, size_t,  uint8_t)' {aka 'void(unsigned int,  unsigned char,  const void *, void *, unsigned int,  unsigned char)'} [-Werror=enum-int-mismatch]
      172 | void dma_prepare(dma_t dma, uint8_t width, const void *src, void *dst,
          |      ^~~~~~~~~~~
    In file included from /home/marian.buschsieweke@ml-pa.loc/Repos/software/RIOT/master/cpu/samd5x/include/periph_cpu.h:26,
                     from /home/marian.buschsieweke@ml-pa.loc/Repos/software/RIOT/master/cpu/sam0_common/periph/dma.c:21:
    /home/marian.buschsieweke@ml-pa.loc/Repos/software/RIOT/master/cpu/sam0_common/include/periph_cpu_common.h:1186:6: note: previous declaration of 'dma_prepare' with type void(dma_t,  uint8_t,  const void *, void *, size_t,  dma_incr_t)' {aka 'void(unsigned int,  unsigned char,  const void *, void *, unsigned int,  dma_incr_t)'}
     1186 | void dma_prepare(dma_t dma, uint8_t width, const void *src, void *dst,
          |      ^~~~~~~~~~~
 2024-10-09 23:00:06 +02:00
Mikolai Gütschow
f0e6776d40
treewide: apply codespell corrections 2024-10-09 13:03:52 +02:00
Marian Buschsieweke
2ea8601b69
cpu/samd5x/periph_cph.h: drop non-UTF-8 chars 
There were some bogus chars in a comment. Let's drop them.
 2024-10-08 14:16:24 +02:00
benpicco
0e20bfd2b9
Merge pull request #20845 from thingsat/pr/add_can_to_board_nucleo-l432kc 
boards/nucleo-l432kc: enable CAN support
 2024-10-07 16:08:21 +00:00
Didier DONSEZ
84ec09f3cf boards/nucleo-l432kc: add configuration CAN peripheral 
Signed-off-by: Didier DONSEZ <didier.donsez@gmail.com>
 2024-10-07 17:35:10 +02:00
Marian Buschsieweke
20e218680c
cpu/samd5x/cpu.c: reformat code 
This formats the code to improve readability and apply the coding
convention. This is a whitespace only change that will not change
generated binaries.
 2024-09-17 22:07:46 +02:00
benpicco
ed9faa9f06
Merge pull request #20839 from mguetschow/nrf802154-rssi 
cpu/nrf52: fix RSSI calculation in nrf802154_radio
 2024-09-06 14:23:20 +00:00
Dylan Laduranty
fb8473a2ea cpu/saml21: create compatibility headers for vendor files migration 
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
 2024-09-04 11:38:07 +02:00
mariemC
7df7886a69 cpu/sam0_common/periph: fix rtt reset after hibernation 2024-08-29 17:08:54 +02:00
Mikolai Gütschow
076dcefb92
cpu/nrf52: fix RSSI calculation in nrf802154_radio 2024-08-28 12:39:15 +02:00
Michael Richardson
7140aef74e doc: note that timer_settime() comes from librt on some systems 2024-08-18 16:02:15 -04:00
chrysn
d5bd9d7812
Merge pull request #20816 from maribu/cpu/native/periph_timer/linkflags 
cpu/native/periph_timer: add missing -lrt to linker flags
 2024-08-17 14:57:26 +00:00
Marian Buschsieweke
29a00beaf1
cpu/native/periph_timer: add missing -lrt to linker flags 
This fixes https://github.com/RIOT-OS/RIOT/pull/20009#issuecomment-2294803168
 2024-08-17 13:52:57 +02:00
krzysztof-cabaj
2d52ebd136 cpu/stm32/f4: add ADC support for f439zi 2024-08-16 10:03:33 +02:00
benpicco
3d5582d563
Merge pull request #20811 from nmeum/pr/riscv_common-format-error-llvm 
riscv_common: Use unsiged long format specifier for printing CSR values
 2024-08-12 16:40:30 +00:00
Sören Tempel
e7325ec02a riscv_common: Use unsiged long format specifier for printing CSR values 
The read_csr macro returns the CSR value as a `unsigned long`. However,
the format specifier presently treats it as a `uint32_t`. This causes
a -Wformat error to be emitted by Clang 18:

	cpu/riscv_common/irq_arch.c:149:49: error: format specifies type 'unsigned int'
			   but the argument has type 'unsigned long' [-Werror,-Wformat]
	  149 |             printf("  mepc:   0x%" PRIx32 "\n", read_csr(mepc));
 2024-08-12 15:09:00 +02:00
Marian Buschsieweke
8839ccbe50
cpu/stm32: implement periph_gpio_ll_switch_dir 
This implements periph_gpio_ll_switch_dir for STM32 except for STM32F1,
which has a different register layout.
 2024-08-08 22:17:35 +02:00
Marian Buschsieweke
fc907f9251
cpu/msp430/periph_gpio: resolve conflict with GPIO LL 
In case both periph_gpio_irq and periph_gpio_ll_irq are used, the
periph_gpio_irq implementation now uses periph_gpio_ll_irq, so that
they can coexist.
 2024-08-02 13:41:37 +02:00
Marian Buschsieweke
355f2335d5
cpu/msp430: implement gpio_ll_irq 2024-08-02 13:41:37 +02:00