This converts the hard-coded UART driver to the new ways.
- allow the board to configure the RX & TX pins
- allow for more than one UART
- allow setting the baudrate
- implement poweron()/poweroff() functions
Currently the cpu/lpc2387 init code hard-codes a 16 MHz
external oscillator.
Instead, calculate the PLL multiplier based on the board define
and also allow to run without an external oscillator.
At the time of configuration, the pthread-reaper uses '164' bytes of
stack when 'idle' stack is only '160'. By having double it gives some
margin.
ps
pid | name | state Q | pri | stack ( used) | base addr | current
1 | idle | pending Q | 15 | 160 ( 128) | 0x4000007c | 0x4000009c
2 | main | running Q | 7 | 2560 ( 1232) | 0x4000011c | 0x4000095c
3 | pthread-reaper | bl rx _ | 0 | 320 ( 164) | 0x40000bac | 0x40000c48
| SUM | | | 3040 ( 1524)
A naive implementation may set a RTC alarm in 30s by calling
struct tm now;
rtc_get_time(&now);
now.tm_sec += 30;
rtc_set_alarm(&now, _cb, NULL);
This works for RTC implementations that use a RTT internally and call
mktime() to convert the struct tm to a unix timestamp, as mktime() will
normalize the struct in the process.
Call rtc_tm_normalize() when the RTC uses separate registers for time / date
components to ensure it is normalized.
This also modifies tests/periph_rtc to exercise this case.
- split up interrupt vector code from bootloader.c to vectors.c
- moved bootloader.c to arm7_init.c
- Use consistent naming:
- use lower case for everything but preprocessor stuff
- ISRs now named isr_foo()
Rational: the periph_common module is required by (most) other periph drivers
and also during startup of the CPU/MCU to run periph_init. The latter is only
required if other periph drivers are used, hence periph_common should be a
depency of periph_* modules and *not* of the CPU/MCU. This PR fixes that
by making periph_common a depency of periph_* and removing the explicit
include in the CPU/MCU implementation.
If the .noinit section starts at the beginning of the RAM,
a bootloader that is unaware of it will clear it.
Instead, move it behind the .bss section, hoping that a bootloader
will always use less .bss memory than RIOT proper.
- Previous cast was to a function pointer was not legal
- Using already present function pointer to store the IAP entry point to improve
readability. (Which also fixes the cast issue.)
- arm_reset was completely undocumented, even though technical details buried
deeply in the data sheet of the LPC2387 are involved in the code
- The attribute "naked" is misplaced, it should only be used when no C code
is present. However, the function consists of C code only
- The attribute "noreturn" has to be used in the declaration [1] of a function,
not in the implementation. Otherwise the caller is not informed and code using
the function will not be optimized.
[1]: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html
- Fixed documentation
- Use bitwise operation instead of multiplication and addition in `GPIO_PIN()`
- Allow GPIOs to be configured as input via `gpio_init()`
- Fixed bugs in `gpio_init_mux`:
- `0x01 << ((pin & 31) * 2)` was used before to generate the bitmask, but
this would shift by 62 to the left. Correct is `0x01 << ((pin & 15) * 2)`
(See [datasheet](https://www.nxp.com/docs/en/user-guide/UM10211.pdf) at
pages 156ff)
- Only one of the two bits was cleared previously
- Changed strategy to access GPIO pins:
- Previous strategy:
- Set all bits in FIOMASK except the one for the pin to control to
disable access to them
- Set/clear/read all pins in the target GPIO port (but access to all but
the target pin is ignored because of the applied FIOMASK)
- New strategy:
- Set/clear/read only the target pin
- Advantages:
- Only one access to a GPIO register instead of two
- Proven approach: Access to GPIOs on lpc2387 is mostly done by
accessing the GPIO registers directy (e.g. see the sht11 driver).
Those accesses never touch the FIOMASK register
- No unwanted side effects: Disabling all but one pin in a GPIO port
without undoing that seems not to be a good idea
At `lpc2387-mci.c:383` in `send_cmd()` an `assert()` enforces that parameter
`buff` is not `NULL`. At `lpc2387-mci.c:538` in `mci_initialize()` `send_cmd()`
was called with `buff==NULL`.
In commit 513b20ffd3 the SPI API was changed to
power up an configure the SPI bus on spi_acquire(). Sadly, the lpc2387 SPI
apparently needs to be reconfigured after each power up. This commit moves
the initialization code required after each power up from spi_init() to
spi_acquire().
- removed ISR_STACKSIZE define where unused (set to 0)
- removed thread_arch_isr_stack_usage(), thread_arch_isr_stack_start(),
and/or thread_arch_isr_stack_pointer() where not implemented
