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cpu/lpc2387: clean up the platform

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- move clock setup from boards/ to cpu/
 - reduce code duplication
This commit is contained in:
Benjamin Valentin 2019-09-14 14:49:48 +02:00 committed by Benjamin Valentin
parent ece313020f
commit e3b0874305
10 changed files with 149 additions and 192 deletions
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52
boards/avsextrem/board_init.c
View File

@ -23,58 +23,9 @@
*/
#include "cpu.h"
#define CL_CPU_DIV 4
/*---------------------------------------------------------------------------*/
static inline void
pllfeed(void)
void board_init(void)
{
PLLFEED = 0xAA;
PLLFEED = 0x55;
}
/*---------------------------------------------------------------------------*/
void init_clks1(void)
{
// Disconnect PLL
PLLCON &= ~0x0002;
pllfeed();
while (PLLSTAT & BIT25); /* wait until PLL is disconnected before
* disabling - deadlock otherwise */
// Disable PLL
PLLCON &= ~0x0001;
pllfeed();
while (PLLSTAT & BIT24); // wait until PLL is disabled
SCS |= 0x10; // main OSC between 15MHz and 24MHz (more stable in tests)
SCS |= 0x20; // Enable main OSC
while (!(SCS & 0x40)); // Wait until main OSC is usable
/* select main OSC, 16MHz, as the PLL clock source */
CLKSRCSEL = 0x0001;
// Setting Multiplier and Divider values
PLLCFG = 0x0008; // M=9 N=1 Fcco = 288 MHz
pllfeed();
// Enabling the PLL */
PLLCON = 0x0001;
pllfeed();
/* Set clock divider to 4 (value+1) */
CCLKCFG = CL_CPU_DIV - 1; // Fcpu = 72 MHz
}
/*---------------------------------------------------------------------------*/
void bl_init_ports(void)
{
gpio_init_ports();
/* UART0 */
PINSEL0 |= BIT4 + BIT6; // RxD0 and TxD0
PINSEL0 &= ~(BIT5 + BIT7);
@ -188,5 +139,4 @@ void bl_init_ports(void)
PINMODE1 |= (BIT7) | (BIT9) | (BIT11) | (BIT13); // no resistors
FIO2DIR &= ~(BIT11 + BIT12 + BIT13); //2.11 2.12 2.13 as input
PINMODE4 |= (BIT23) | (BIT25) | (BIT27); // no resistors
}

5
boards/avsextrem/include/board.h
View File

@ -48,11 +48,6 @@ extern "C" {
#define LED1_TOGGLE (FIO3PIN ^= LED1_MASK)
/** @} */
/**
* @brief Initialize the board's clock system
*/
void init_clks1(void);
#ifdef __cplusplus
}
#endif

75
boards/common/msba2/board_common_init.c
View File

@ -1,75 +0,0 @@
/*
* Copyright (C) 2008-2009, Freie Universitaet Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_msba2
* @{
* @file
* @brief MSB-A2 board initialization
*
* @author Heiko Will
* @author Kaspar Schleiser <kaspar@schleiser.de>
* @author Michael Baar <baar@inf.fu-berlin.de>
* @author Zakaria Kasmi <zkasmi@inf.fu-berlin.de>
* @note $Id$
*
* @}
*/
#include <string.h>
#include "board.h"
#include "msba2_common.h"
#include "cpu.h"
#define CL_CPU_DIV 4
#define WD_INTERVAL 10 /**< number of seconds before WD triggers */
/*---------------------------------------------------------------------------*/
/**
* @brief Enabling MAM and setting number of clocks used for Flash memory fetch
* @internal
*/
static void
init_mam(void)
{
MAMCR = 0x0000;
MAMTIM = 0x0003;
MAMCR = 0x0002;
}
/*---------------------------------------------------------------------------*/
void init_clks2(void)
{
/* Wait for the PLL to lock to set frequency */
while (!(PLLSTAT & BIT26));
/* Connect the PLL as the clock source */
PLLCON = 0x0003;
pllfeed();
/* Check connect bit status */
while (!(PLLSTAT & BIT25));
}
void watchdog_init(void)
{
WDCLKSEL = 0; /* clock source: RC oscillator */
WDMOD &= ~WDTOF; /* clear time-out flag */
WDTC = (F_RC_OSCILLATOR / 4) * WD_INTERVAL;
}
void bl_init_clks(void)
{
watchdog_init();
PCONP = PCRTC; /* switch off everything except RTC */
init_clks1();
init_clks2();
init_mam();
}
/*---------------------------------------------------------------------------*/

10
boards/common/msba2/include/msba2_common.h
View File

@ -28,16 +28,6 @@
extern "C" {
#endif
/**
* @brief Feed sequence for PLL register
*/
static inline void pllfeed(void)
{
PLLFEED = 0xAA;
PLLFEED = 0x55;
}
#ifdef __cplusplus
}
#endif

41
boards/msba2/board_init.c
View File

@ -29,12 +29,10 @@
#include "periph/init.h"
#include "stdio_base.h"
void bl_init_ports(void)
void board_init(void)
{
gpio_init_ports();
/* UART0 */
PINSEL0 |= BIT4 + BIT6; /* RxD0 and TxD0 */
PINSEL0 |= BIT4 + BIT6; /* RxD0 and TxD0 */
PINSEL0 &= ~(BIT5 + BIT7);
/* LEDS */
@ -43,39 +41,4 @@ void bl_init_ports(void)
LED0_OFF;
LED0_OFF;
/* initialize stdio prior to periph_init() to allow use of DEBUG() there */
stdio_init();
/* trigger static peripheral initialization */
periph_init();
}
void init_clks1(void)
{
/* Disconnect PLL */
PLLCON &= ~0x0002;
pllfeed();
/* Disable PLL */
PLLCON &= ~0x0001;
pllfeed();
SCS |= 0x20; /* Enable main OSC */
while (!(SCS & 0x40)); /* Wait until main OSC is usable */
/* select main OSC, 16MHz, as the PLL clock source */
CLKSRCSEL = 0x0001;
/* Setting Multiplier and Divider values */
PLLCFG = 0x0008; /* M=9 N=1 Fcco = 288 MHz */
pllfeed();
/* Enabling the PLL */
PLLCON = 0x0001;
pllfeed();
/* Set clock divider to 4 (value+1) */
CCLKCFG = CL_CPU_DIV - 1; /* Fcpu = 72 MHz */
}

5
boards/msba2/include/board.h
View File

@ -52,11 +52,6 @@ extern "C" {
#define XTIMER_OVERHEAD 7
/** @} */
/**
* @brief initialize the board's clock system
*/
void init_clks1(void);
#ifdef __cplusplus
}
#endif

10
cpu/arm7_common/arm7_init.c
View File

@ -58,17 +58,13 @@ _init_data(void)
void bootloader(void)
{
extern void bl_init_ports(void);
extern void bl_init_clks(void);
/* board specific setup of clocks */
bl_init_clks();
extern void cpu_init(void);
/* initialize bss and data */
_init_data();
/* board specific setup of i/o pins */
bl_init_ports();
/* cpu specific setup of clocks, peripherals */
cpu_init();
#ifdef MODULE_NEWLIB
extern void __libc_init_array(void);

113
cpu/lpc2387/clocks.c Normal file
View File

@ -0,0 +1,113 @@
/*
* Copyright (C) 2008-2009, Freie Universitaet Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_lpc2387
* @{
* @file
* @brief LPC2387 clock initialization
*
* @author Heiko Will
* @author Kaspar Schleiser <kaspar@schleiser.de>
* @author Michael Baar <baar@inf.fu-berlin.de>
* @author Zakaria Kasmi <zkasmi@inf.fu-berlin.de>
* @note $Id$
*
* @}
*/
#include <string.h>
#include "board.h"
#include "cpu.h"
#include "lpc2387.h"
#define CL_CPU_DIV 4
#define WD_INTERVAL 10 /**< number of seconds before WD triggers */
/**
* @brief Feed sequence for PLL register
*/
static inline void pllfeed(void)
{
PLLFEED = 0xAA;
PLLFEED = 0x55;
}
/**
* @brief Enabling MAM and setting number of clocks used for Flash memory fetch
* @internal
*/
static inline void init_mam(void)
{
MAMCR = 0x0000;
MAMTIM = 0x0003;
MAMCR = 0x0002;
}
static void init_clks1(void)
{
/* Disconnect PLL */
PLLCON &= ~0x0002;
pllfeed();
while (PLLSTAT & BIT25); /* wait until PLL is disconnected before
* disabling - deadlock otherwise */
/* Disable PLL */
PLLCON &= ~0x0001;
pllfeed();
while (PLLSTAT & BIT24); /* wait until PLL is disabled */
SCS |= 0x10; /* main OSC between 15MHz and 24MHz (more stable in tests) */
SCS |= 0x20; /* Enable main OSC */
while (!(SCS & 0x40)); /* Wait until main OSC is usable */
/* select main OSC, 16MHz, as the PLL clock source */
CLKSRCSEL = 0x0001;
/* Setting Multiplier and Divider values */
PLLCFG = 0x0008; /* M=9 N=1 Fcco = 288 MHz */
pllfeed();
/* Enabling the PLL */
PLLCON = 0x0001;
pllfeed();
/* Set clock divider to 4 (value+1) */
CCLKCFG = CL_CPU_DIV - 1; /* Fcpu = 72 MHz */
}
static void init_clks2(void)
{
/* Wait for the PLL to lock to set frequency */
while (!(PLLSTAT & BIT26));
/* Connect the PLL as the clock source */
PLLCON = 0x0003;
pllfeed();
/* Check connect bit status */
while (!(PLLSTAT & BIT25));
}
static void watchdog_init(void)
{
WDCLKSEL = 0; /* clock source: RC oscillator */
WDMOD &= ~WDTOF; /* clear time-out flag */
WDTC = (F_RC_OSCILLATOR / 4) * WD_INTERVAL;
}
void cpu_init_clks(void)
{
watchdog_init();
PCONP = PCRTC; /* switch off everything except RTC */
init_clks1();
init_clks2();
init_mam();
}

26
cpu/lpc2387/cpu.c
View File

@ -16,6 +16,9 @@
#include "irq.h"
#include "VIC.h"
#include "stdio_base.h"
#include "periph/init.h"
void lpc2387_pclk_scale(uint32_t source, uint32_t target, uint32_t *pclksel, uint32_t *prescale)
{
uint32_t pclkdiv;
@ -110,4 +113,27 @@ void arm_reset(void)
while(1) {}
}
/**
* @brief Initialize the CPU, set IRQ priorities, clocks
*/
void cpu_init(void)
{
extern void board_init(void);
/* configure CPU clock */
cpu_init_clks();
/* set up GPIOs */
gpio_init_ports();
/* board specific setup of i/o pins */
board_init();
/* initialize stdio prior to periph_init() to allow use of DEBUG() there */
stdio_init();
/* trigger static peripheral initialization */
periph_init();
}
/** @} */

4
cpu/lpc2387/include/cpu.h
View File

@ -33,6 +33,10 @@ extern uintptr_t __stack_start; /**< end of user stack memory space */
*/
void lpc2387_pclk_scale(uint32_t source, uint32_t target, uint32_t *pclksel, uint32_t *prescale);
/**
* @brief Initialize lpc2387 cpu clocks
*/
void cpu_init_clks(void);
/**
* @brief install lpc2387 irq