mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2025-01-17 05:12:57 +01:00
build: fix unused parameter errors
cpu, sam0_common: fix unused parameter in periph/spi cpu, kinetis_common: fix unused parameter in periph/spi cpu, cc2538: fix unused param in periph/i2c cpu, cc2538: fix unused param in periph/spi cpu, sam3: fix unused param in periph/spi cpu, stm32_common: fix unused param in periph/pm cpu, stm32f3: fix unused params in periph/i2c cpu, nrf5x_common: fix unused param in periph/gpio cpu, nrf5x_common: fix unused param in periph/spi cpu, lpc2387: fix unused params in periph/spi cpu, cc2538: fix unused params in radio/netdev cpu, cc2650: fix unused params in periph/uart cpu, lm4f120: fix unused param in periph/spi cpu, lm4f120: fix unused params in periph/timer cpu, lm4f120: fix unused params in periph/uart cpu, stm32_common: fix unused params in periph/dac cpu, stm32l0: fix unused params in periph/i2c cpu, msp430fxyz: fix unused params in periph/uart cpu, mips: fix unused params cpu, cc430: fix unused-params in periph/timer cpu, msp430fxyz: fix unused params in periph/spi drivers, cc2420: fix unused param cpu, mips32r2_common: fix unused params in periph/timer cpu, cc2538: fix unused-param in periph/i2c cpu, mips32r2_common: fix unused-param in periph/timer cpu, msp430fxyz: fix unused params in periph/timer cpu, atmega_common: fix unused params in periph/spi driver, nrfmin: fix unused params cpu, cc2538_rf: fix unused params driver, netdev_ieee802514: fix unused param cpu, mip_pic32m: fix unused params cpu, lpc2387: fix unused params in periph/pwm tests/driver_sdcard_spi: fix unused params cpu, sam3: fix unused param in periph/pwm tests/driver_dynamixel: fix unused params, and style issues cpu, cc430: fix unused param in periph/rtc cpu, atmega_common: fix unused params in periph/i2c
This commit is contained in:
parent
5ffe9ddaf5
commit
7309171303
@ -270,12 +270,14 @@ int i2c_write_regs(i2c_t dev, uint8_t address, uint8_t reg, const void *data, in
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void i2c_poweron(i2c_t dev)
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{
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assert(dev < I2C_NUMOF);
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(void) dev;
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power_twi_enable();
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}
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void i2c_poweroff(i2c_t dev)
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{
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assert(dev < I2C_NUMOF);
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(void) dev;
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power_twi_disable();
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}
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@ -49,6 +49,7 @@ void spi_init(spi_t bus)
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void spi_init_pins(spi_t bus)
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{
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(void)bus;
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/* set SPI pins as output */
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#if defined (CPU_ATMEGA2560) || defined (CPU_ATMEGA1281)
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DDRB |= ((1 << DDB2) | (1 << DDB1) | (1 << DDB0));
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@ -60,6 +61,7 @@ void spi_init_pins(spi_t bus)
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void)bus;
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(void)cs;
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/* lock the bus and power on the SPI peripheral */
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@ -79,6 +81,7 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_release(spi_t bus)
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{
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(void)bus;
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/* power off and release the bus */
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SPCR &= ~(1 << SPE);
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power_spi_disable();
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@ -88,6 +91,8 @@ void spi_release(spi_t bus)
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void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont,
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const void *out, void *in, size_t len)
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{
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(void)bus;
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const uint8_t *out_buf = out;
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uint8_t *in_buf = in;
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@ -163,6 +163,7 @@ static void recover_i2c_bus(void) {
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#ifdef MODULE_XTIMER
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static void _timer_cb(void *arg)
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{
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(void)arg;
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mutex_unlock(&i2c_wait_mutex);
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}
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#endif
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@ -312,6 +313,8 @@ int i2c_init_master(i2c_t dev, i2c_speed_t speed)
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int i2c_init_slave(i2c_t dev, uint8_t address)
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{
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(void) dev;
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(void) address;
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/* Slave mode is not (yet) supported. */
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return -1;
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}
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@ -100,6 +100,7 @@ void spi_init_pins(spi_t bus)
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void) cs;
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/* lock the bus */
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mutex_lock(&locks[bus]);
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/* power on device */
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@ -128,6 +128,10 @@ bool RFCORE_ASSERT_failure(const char *expr, const char *func, int line)
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#if (DEVELHELP || ENABLE_DEBUG)
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DEBUG_PRINT("RFCORE_ASSERT(%s) failed at line %u in %s()!\n", expr, line, func);
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DEBUG_PRINT(" RFCORE_SFR_RFERRF = 0x%02x\n", (unsigned int)RFCORE_SFR_RFERRF);
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#else
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(void)expr;
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(void)func;
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(void)line;
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#endif
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return false;
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@ -255,6 +255,8 @@ static int _set(netdev_t *netdev, netopt_t opt, const void *value, size_t value_
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static int _send(netdev_t *netdev, const struct iovec *vector, unsigned count)
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{
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(void) netdev;
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int pkt_len = 0;
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/* Flush TX FIFO once no transmission in progress */
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@ -295,6 +297,8 @@ static int _send(netdev_t *netdev, const struct iovec *vector, unsigned count)
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static int _recv(netdev_t *netdev, void *buf, size_t len, void *info)
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{
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(void) netdev;
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size_t pkt_len;
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if (buf == NULL) {
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@ -93,6 +93,8 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
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void uart_write(uart_t uart, const uint8_t *data, size_t len)
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{
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(void) uart;
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for (size_t i = 0; i < len; i++) {
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while (UART->FR & UART_FR_TXFF) {}
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UART->DR = data[i];
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@ -101,6 +103,8 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
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void uart_poweron(uart_t uart)
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{
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(void) uart;
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PRCM->UARTCLKGR = 1;
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PRCM->CLKLOADCTL = CLKLOADCTL_LOAD;
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while (!(PRCM->CLKLOADCTL & CLKLOADCTL_LOADDONE)) {}
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@ -110,6 +114,8 @@ void uart_poweron(uart_t uart)
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void uart_poweroff(uart_t uart)
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{
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(void) uart;
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UART->CTL = 0;
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PRCM->UARTCLKGR = 0;
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@ -135,6 +135,8 @@ int rtc_get_time(struct tm *localt)
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int rtc_set_alarm(struct tm *localt, rtc_alarm_cb_t cb, void *arg)
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{
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(void)arg;
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if (localt != NULL) {
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RTCAMIN = localt->tm_min;
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RTCAMIN |= BIT7;
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@ -90,16 +90,19 @@ int timer_clear(tim_t dev, int channel)
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unsigned int timer_read(tim_t dev)
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{
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(void)dev;
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return (unsigned int)TIMER_BASE->R;
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}
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void timer_start(tim_t dev)
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{
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(void)dev;
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TIMER_BASE->CTL |= CTL_MC_CONT;
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}
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void timer_stop(tim_t dev)
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{
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(void)dev;
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TIMER_BASE->CTL &= ~(CTL_MC_MASK);
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}
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@ -137,6 +137,7 @@ int spi_init_cs(spi_t bus, spi_cs_t cs)
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void) cs;
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/* lock and power on the bus */
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mutex_lock(&locks[bus]);
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poweron(bus);
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@ -68,6 +68,7 @@ void spi_init_pins(spi_t bus)
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void) cs;
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/* lock bus */
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mutex_lock(&locks[bus]);
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/* enable clock for SSI */
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@ -127,6 +127,8 @@ int timer_init(tim_t dev, unsigned long freq, timer_cb_t cb, void *arg)
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int timer_set_absolute(tim_t dev, int channel, unsigned int value)
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{
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(void) channel;
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unsigned int timer_base;
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unsigned int timer_side = TIMER_A;
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unsigned long long scaledv;
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@ -169,6 +171,8 @@ int timer_set_absolute(tim_t dev, int channel, unsigned int value)
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int timer_clear(tim_t dev, int channel)
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{
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(void) channel;
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unsigned int timer_intbit = TIMER_TIMA_TIMEOUT;
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unsigned int timer_base;
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@ -106,6 +106,8 @@ static int init_base(uart_t uart, uint32_t baudrate)
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void uart_write(uart_t uart, const uint8_t *data, size_t len)
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{
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(void) uart;
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for (size_t i = 0; i < len; i++) {
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ROM_UARTCharPut(UART0_BASE, (char)data[i]);
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}
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@ -113,11 +115,15 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
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void uart_poweron(uart_t uart)
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{
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(void) uart;
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ROM_UARTEnable(UART0_BASE);
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}
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void uart_poweroff(uart_t uart)
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{
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(void) uart;
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ROM_UARTDisable(UART0_BASE);
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}
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@ -85,12 +85,14 @@ uint32_t pwm_init(pwm_t dev, pwm_mode_t mode, uint32_t freq, uint16_t res)
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uint8_t pwm_channels(pwm_t dev)
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{
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(void)dev;
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assert(dev == PWM_DEV(0));
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return PWM_CHANNELS;
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}
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void pwm_set(pwm_t dev, uint8_t channel, uint16_t value)
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{
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(void)dev;
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assert((dev == PWM_DEV(0)) && (channel < 3));
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switch (channel) {
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@ -111,6 +113,7 @@ void pwm_set(pwm_t dev, uint8_t channel, uint16_t value)
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void pwm_poweron(pwm_t dev)
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{
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(void)dev;
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assert(dev == PWM_DEV(0));
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PCONP |= PCPWM1;
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PWM1TCR |= BIT0;
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@ -118,6 +121,7 @@ void pwm_poweron(pwm_t dev)
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void pwm_poweroff(pwm_t dev)
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{
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(void)dev;
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assert(dev == PWM_DEV(0));
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PWM1TCR &= ~(BIT0);
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PCONP &= ~(PCPWM1);
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@ -57,6 +57,8 @@ void spi_init(spi_t bus)
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void spi_init_pins(spi_t bus)
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{
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(void) bus;
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PINSEL3 |= (BIT8 | BIT9); /* SCLK */
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PINSEL3 |= (BIT14 | BIT15); /* MISO */
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PINSEL3 |= (BIT16 | BIT17); /* MOSI */
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@ -64,6 +66,9 @@ void spi_init_pins(spi_t bus)
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void) bus;
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(void) cs;
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uint32_t pclksel;
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uint32_t cpsr;
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@ -98,6 +103,7 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_release(spi_t bus)
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{
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(void) bus;
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/* disable, power off, and release the bus */
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SSP0CR1 &= ~(BIT1);
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PCONP &= ~(PCSSP0);
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@ -107,6 +113,8 @@ void spi_release(spi_t bus)
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void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont,
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const void *out, void *in, size_t len)
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{
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(void) bus;
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const uint8_t *out_buf = out;
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uint8_t *in_buf = in;
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@ -156,6 +156,7 @@ int _kill_r(struct _reent *r, pid_t pid, int sig)
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*/
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int _open_r(struct _reent *r, const char *name, int flags, int mode)
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{
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(void)r;
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return open(name, flags, mode);
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}
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@ -174,6 +175,7 @@ int _open_r(struct _reent *r, const char *name, int flags, int mode)
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*/
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_ssize_t _read_r(struct _reent *r, int fd, void *dest, size_t count)
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{
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(void)r;
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return read(fd,dest,count);
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}
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@ -192,6 +194,7 @@ _ssize_t _read_r(struct _reent *r, int fd, void *dest, size_t count)
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*/
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_ssize_t _write_r(struct _reent *r, int fd, const void *src, size_t count)
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{
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(void)r;
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int res = write(fd, src, count);
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return res;
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}
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@ -212,6 +215,7 @@ _ssize_t _write_r(struct _reent *r, int fd, const void *src, size_t count)
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*/
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int _close_r(struct _reent *r, int fd)
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{
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(void)r;
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int res = close(fd);
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return res;
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}
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@ -231,6 +235,7 @@ int _close_r(struct _reent *r, int fd)
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*/
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int _fcntl_r (struct _reent *r, int fd, int cmd, int arg)
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{
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(void)r;
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int res = fcntl(fd, cmd, arg);
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return res;
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}
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@ -257,6 +262,7 @@ int _fcntl_r (struct _reent *r, int fd, int cmd, int arg)
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*/
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_off_t _lseek_r(struct _reent *r, int fd, _off_t off, int whence)
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{
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(void)r;
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int res = lseek(fd, off, whence);
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return res;
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}
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@ -275,6 +281,7 @@ _off_t _lseek_r(struct _reent *r, int fd, _off_t off, int whence)
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*/
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int _fstat_r(struct _reent *r, int fd, struct stat *buf)
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{
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(void)r;
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int res = fstat(fd, buf);
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return res;
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}
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@ -290,6 +297,7 @@ int _fstat_r(struct _reent *r, int fd, struct stat *buf)
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*/
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int _unlink_r(struct _reent *r, const char *path)
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{
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(void)r;
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int res = unlink(path);
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return res;
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}
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@ -80,6 +80,8 @@ static volatile int spurious_int;
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*/
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int gettimeofday(struct timeval *__restrict __p, void *__restrict __tz)
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{
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(void)__tz;
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uint64_t now = counter * US_PER_MS;
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__p->tv_sec = div_u64_by_1000000(now);
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__p->tv_usec = now - (__p->tv_sec * US_PER_SEC);
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@ -91,6 +93,7 @@ int timer_init(tim_t dev, unsigned long freq, timer_cb_t cb, void *arg)
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{
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assert(dev == 0);
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(void)dev;
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(void)freq; /* Cannot adjust Frequency */
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timer_isr_ctx.cb = cb;
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@ -123,6 +126,8 @@ int timer_set(tim_t dev, int channel, unsigned int timeout)
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assert(dev == 0);
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assert(channel < CHANNELS);
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(void)dev;
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timeout >>= TIMER_ACCURACY_SHIFT;
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timeout <<= TIMER_ACCURACY_SHIFT;
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@ -138,6 +143,8 @@ int timer_set_absolute(tim_t dev, int channel, unsigned int value)
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assert(dev == 0);
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assert(channel < CHANNELS);
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(void)dev;
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value >>= TIMER_ACCURACY_SHIFT;
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value <<= TIMER_ACCURACY_SHIFT;
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@ -153,6 +160,8 @@ int timer_clear(tim_t dev, int channel)
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assert(dev == 0);
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assert(channel < CHANNELS);
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(void)dev;
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uint32_t status = irq_disable();
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compares[channel] = 0;
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irq_restore(status);
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@ -164,21 +173,26 @@ unsigned int timer_read(tim_t dev)
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{
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assert(dev == 0);
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(void)dev;
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return counter;
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}
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void timer_start(tim_t dev)
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{
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(void)dev;
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mips32_bc_c0(C0_CAUSE, CR_DC);
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}
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void timer_stop(tim_t dev)
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{
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(void)dev;
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mips32_bs_c0(C0_CAUSE, CR_DC);
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}
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void timer_irq_enable(tim_t dev)
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{
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(void)dev;
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#ifdef EIC_IRQ
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eic_irq_enable(EIC_IRQ_TIMER);
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#else
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@ -189,6 +203,7 @@ void timer_irq_enable(tim_t dev)
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void timer_irq_disable(tim_t dev)
|
||||
{
|
||||
(void)dev;
|
||||
#ifdef EIC_IRQ
|
||||
eic_irq_disable(EIC_IRQ_TIMER);
|
||||
#else
|
||||
|
@ -45,6 +45,9 @@ static PIC32_UART_T pic_uart[UART_NUMOF + 1];
|
||||
|
||||
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
|
||||
{
|
||||
(void)rx_cb;
|
||||
(void)arg;
|
||||
|
||||
assert(uart <= UART_NUMOF && uart != 0); /*No uart 0 on pic32*/
|
||||
|
||||
/* Pin Mux should be setup in board file */
|
||||
|
@ -14,6 +14,7 @@
|
||||
|
||||
void eic_irq_configure(int irq_num)
|
||||
{
|
||||
(void)irq_num;
|
||||
/* Only timer interrupt supported currently */
|
||||
assert(irq_num == EIC_IRQ_TIMER);
|
||||
|
||||
@ -26,6 +27,7 @@ void eic_irq_configure(int irq_num)
|
||||
|
||||
void eic_irq_enable(int irq_num)
|
||||
{
|
||||
(void)irq_num;
|
||||
/* Only timer interrupt supported currently */
|
||||
assert(irq_num == EIC_IRQ_TIMER);
|
||||
|
||||
@ -35,6 +37,7 @@ void eic_irq_enable(int irq_num)
|
||||
|
||||
void eic_irq_disable(int irq_num)
|
||||
{
|
||||
(void)irq_num;
|
||||
/* Only timer interrupt supported currently */
|
||||
assert(irq_num == EIC_IRQ_TIMER);
|
||||
|
||||
@ -44,6 +47,7 @@ void eic_irq_disable(int irq_num)
|
||||
|
||||
void eic_irq_ack(int irq_num)
|
||||
{
|
||||
(void)irq_num;
|
||||
/* Only timer interrupt supported currently */
|
||||
assert(irq_num == EIC_IRQ_TIMER);
|
||||
|
||||
|
@ -14,6 +14,7 @@
|
||||
|
||||
void eic_irq_configure(int irq_num)
|
||||
{
|
||||
(void)irq_num;
|
||||
/* Only timer interrupt supported currently */
|
||||
assert(irq_num == EIC_IRQ_TIMER);
|
||||
|
||||
@ -26,6 +27,7 @@ void eic_irq_configure(int irq_num)
|
||||
|
||||
void eic_irq_enable(int irq_num)
|
||||
{
|
||||
(void)irq_num;
|
||||
/* Only timer interrupt supported currently */
|
||||
assert(irq_num == EIC_IRQ_TIMER);
|
||||
|
||||
@ -35,6 +37,7 @@ void eic_irq_enable(int irq_num)
|
||||
|
||||
void eic_irq_disable(int irq_num)
|
||||
{
|
||||
(void)irq_num;
|
||||
/* Only timer interrupt supported currently */
|
||||
assert(irq_num == EIC_IRQ_TIMER);
|
||||
|
||||
@ -44,6 +47,7 @@ void eic_irq_disable(int irq_num)
|
||||
|
||||
void eic_irq_ack(int irq_num)
|
||||
{
|
||||
(void)irq_num;
|
||||
/* Only timer interrupt supported currently */
|
||||
assert(irq_num == EIC_IRQ_TIMER);
|
||||
|
||||
|
@ -59,6 +59,8 @@ void spi_init(spi_t bus)
|
||||
|
||||
void spi_init_pins(spi_t bus)
|
||||
{
|
||||
(void)bus;
|
||||
|
||||
gpio_periph_mode(SPI_PIN_MISO, true);
|
||||
gpio_periph_mode(SPI_PIN_MOSI, true);
|
||||
gpio_periph_mode(SPI_PIN_CLK, true);
|
||||
@ -66,6 +68,9 @@ void spi_init_pins(spi_t bus)
|
||||
|
||||
int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
{
|
||||
(void)bus;
|
||||
(void)cs;
|
||||
|
||||
if (clk == SPI_CLK_10MHZ) {
|
||||
return SPI_NOCLK;
|
||||
}
|
||||
@ -99,8 +104,9 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
return SPI_OK;
|
||||
}
|
||||
|
||||
void spi_release(spi_t dev)
|
||||
void spi_release(spi_t bus)
|
||||
{
|
||||
(void)bus;
|
||||
/* put SPI device back in reset state */
|
||||
#ifndef SPI_USE_USCI
|
||||
SPI_BASE->CTL |= (USART_CTL_SWRST);
|
||||
@ -115,6 +121,8 @@ void spi_release(spi_t dev)
|
||||
void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont,
|
||||
const void *out, void *in, size_t len)
|
||||
{
|
||||
(void)bus;
|
||||
|
||||
const uint8_t *out_buf = out;
|
||||
uint8_t *in_buf = in;
|
||||
|
||||
|
@ -90,16 +90,19 @@ int timer_clear(tim_t dev, int channel)
|
||||
|
||||
unsigned int timer_read(tim_t dev)
|
||||
{
|
||||
(void)dev;
|
||||
return (unsigned int)TIMER_BASE->R;
|
||||
}
|
||||
|
||||
void timer_start(tim_t dev)
|
||||
{
|
||||
(void)dev;
|
||||
TIMER_BASE->CTL |= TIMER_CTL_MC_CONT;
|
||||
}
|
||||
|
||||
void timer_stop(tim_t dev)
|
||||
{
|
||||
(void)dev;
|
||||
TIMER_BASE->CTL &= ~(TIMER_CTL_MC_MASK);
|
||||
}
|
||||
|
||||
|
@ -103,11 +103,13 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
|
||||
|
||||
void uart_poweron(uart_t uart)
|
||||
{
|
||||
(void)uart;
|
||||
UART_ME |= UART_ME_BITS;
|
||||
}
|
||||
|
||||
void uart_poweroff(uart_t uart)
|
||||
{
|
||||
(void)uart;
|
||||
UART_ME &= ~(UART_ME_BITS);
|
||||
}
|
||||
|
||||
|
@ -45,8 +45,10 @@ static gpio_isr_ctx_t exti_chan;
|
||||
static inline NRF_GPIO_Type* port(gpio_t pin)
|
||||
{
|
||||
#if (CPU_FAM_NRF51)
|
||||
(void) pin;
|
||||
return NRF_GPIO;
|
||||
#elif defined(CPU_MODEL_NRF52832XXAA)
|
||||
(void) pin;
|
||||
return NRF_P0;
|
||||
#else
|
||||
return (pin & PORT_BIT) ? NRF_P1 : NRF_P0;
|
||||
|
@ -61,6 +61,8 @@ void spi_init_pins(spi_t bus)
|
||||
|
||||
int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
{
|
||||
(void) cs;
|
||||
|
||||
mutex_lock(&locks[bus]);
|
||||
#ifdef CPU_FAM_NRF51
|
||||
/* power on the bus (NRF51 only) */
|
||||
|
@ -392,6 +392,7 @@ static int nrfmin_recv(netdev_t *dev, void *buf, size_t len, void *info)
|
||||
|
||||
static int nrfmin_init(netdev_t *dev)
|
||||
{
|
||||
(void)dev;
|
||||
uint8_t cpuid[CPUID_LEN];
|
||||
|
||||
/* check given device descriptor */
|
||||
@ -459,6 +460,7 @@ static void nrfmin_isr(netdev_t *dev)
|
||||
static int nrfmin_get(netdev_t *dev, netopt_t opt, void *val, size_t max_len)
|
||||
{
|
||||
(void)dev;
|
||||
(void)max_len;
|
||||
|
||||
switch (opt) {
|
||||
case NETOPT_CHANNEL:
|
||||
@ -512,6 +514,7 @@ static int nrfmin_get(netdev_t *dev, netopt_t opt, void *val, size_t max_len)
|
||||
static int nrfmin_set(netdev_t *dev, netopt_t opt, const void *val, size_t len)
|
||||
{
|
||||
(void)dev;
|
||||
(void)len;
|
||||
|
||||
switch (opt) {
|
||||
case NETOPT_CHANNEL:
|
||||
|
@ -114,6 +114,7 @@ void spi_init_pins(spi_t bus)
|
||||
|
||||
int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
{
|
||||
(void) cs;
|
||||
/* get exclusive access to the device */
|
||||
mutex_lock(&locks[bus]);
|
||||
/* power on the device */
|
||||
|
@ -95,6 +95,7 @@ uint32_t pwm_init(pwm_t dev, pwm_mode_t mode, uint32_t freq, uint16_t res)
|
||||
|
||||
uint8_t pwm_channels(pwm_t pwm)
|
||||
{
|
||||
(void)pwm;
|
||||
assert(pwm == PWM_DEV(0));
|
||||
return (uint8_t)PWM_CHAN_NUMOF;
|
||||
}
|
||||
@ -105,6 +106,7 @@ uint8_t pwm_channels(pwm_t pwm)
|
||||
*/
|
||||
void pwm_set(pwm_t pwm, uint8_t channel, uint16_t value)
|
||||
{
|
||||
(void)pwm;
|
||||
assert((pwm == PWM_DEV(0)) && (channel < PWM_CHAN_NUMOF));
|
||||
|
||||
/* clip and set new value */
|
||||
@ -114,6 +116,7 @@ void pwm_set(pwm_t pwm, uint8_t channel, uint16_t value)
|
||||
|
||||
void pwm_poweron(pwm_t pwm)
|
||||
{
|
||||
(void)pwm;
|
||||
assert(pwm == PWM_DEV(0));
|
||||
PMC->PMC_PCER1 = PMC_PCDR1_PID36;
|
||||
PWM->PWM_ENA = pwm_chan_mask;
|
||||
@ -121,6 +124,7 @@ void pwm_poweron(pwm_t pwm)
|
||||
|
||||
void pwm_poweroff(pwm_t pwm)
|
||||
{
|
||||
(void)pwm;
|
||||
assert(pwm == PWM_DEV(0));
|
||||
PWM->PWM_ENA = 0;
|
||||
PMC->PMC_PCDR1 = PMC_PCDR1_PID36;
|
||||
|
@ -64,6 +64,7 @@ void spi_init_pins(spi_t bus)
|
||||
|
||||
int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
{
|
||||
(void) cs;
|
||||
/* lock bus */
|
||||
mutex_lock(&locks[bus]);
|
||||
/* enable SPI device clock */
|
||||
|
@ -45,8 +45,10 @@ static inline DAC_TypeDef *dev(dac_t line)
|
||||
#if defined(DAC2)
|
||||
return (dac_config[line].chan > 1) ? DAC2 : DAC1;
|
||||
#elif defined (DAC1)
|
||||
(void) line;
|
||||
return DAC1;
|
||||
#else
|
||||
(void) line;
|
||||
return DAC;
|
||||
#endif
|
||||
}
|
||||
|
@ -66,6 +66,8 @@ void pm_set(unsigned mode)
|
||||
deep = 1;
|
||||
break;
|
||||
}
|
||||
#else
|
||||
(void) mode;
|
||||
#endif
|
||||
|
||||
cortexm_sleep(deep);
|
||||
|
@ -163,6 +163,12 @@ static void _i2c_init(I2C_TypeDef *i2c, uint32_t presc, uint32_t scll,
|
||||
uint32_t sclh, uint32_t sdadel, uint32_t scldel,
|
||||
uint32_t timing)
|
||||
{
|
||||
(void) presc;
|
||||
(void) scll;
|
||||
(void) sclh;
|
||||
(void) sdadel;
|
||||
(void) scldel;
|
||||
|
||||
/* disable device */
|
||||
i2c->CR1 &= ~(I2C_CR1_PE);
|
||||
|
||||
|
@ -176,6 +176,12 @@ static void _i2c_init(I2C_TypeDef *i2c, uint32_t presc, uint32_t scll,
|
||||
uint32_t sclh, uint32_t sdadel, uint32_t scldel,
|
||||
uint32_t timing)
|
||||
{
|
||||
(void) presc;
|
||||
(void) scll;
|
||||
(void) sclh;
|
||||
(void) sdadel;
|
||||
(void) scldel;
|
||||
|
||||
/* disable device */
|
||||
i2c->CR1 &= ~(I2C_CR1_PE);
|
||||
|
||||
|
@ -175,6 +175,8 @@ void cc2420_tx_exec(cc2420_t *dev)
|
||||
|
||||
int cc2420_rx(cc2420_t *dev, uint8_t *buf, size_t max_len, void *info)
|
||||
{
|
||||
(void)info;
|
||||
|
||||
uint8_t len;
|
||||
uint8_t crc_corr;
|
||||
|
||||
|
@ -30,6 +30,8 @@
|
||||
|
||||
static int _get_iid(netdev_ieee802154_t *dev, eui64_t *value, size_t max_len)
|
||||
{
|
||||
(void)max_len;
|
||||
|
||||
uint8_t *addr;
|
||||
uint16_t addr_len;
|
||||
|
||||
|
@ -71,15 +71,21 @@ static uint8_t dynamixel_buffer[128];
|
||||
static uart_half_duplex_t stream;
|
||||
|
||||
#ifdef DXL_DIR_PIN
|
||||
static void dir_init(uart_t uart) {
|
||||
static void dir_init(uart_t uart)
|
||||
{
|
||||
(void)uart;
|
||||
gpio_init(DXL_DIR_PIN, GPIO_OUT);
|
||||
}
|
||||
|
||||
static void dir_enable_tx(uart_t uart) {
|
||||
static void dir_enable_tx(uart_t uart)
|
||||
{
|
||||
(void)uart;
|
||||
gpio_set(DXL_DIR_PIN);
|
||||
}
|
||||
|
||||
static void dir_disable_tx(uart_t uart) {
|
||||
static void dir_disable_tx(uart_t uart)
|
||||
{
|
||||
(void)uart;
|
||||
gpio_clear(DXL_DIR_PIN);
|
||||
}
|
||||
#else
|
||||
@ -148,7 +154,8 @@ static void parse_reg(char *arg, int *reg8, int *reg16)
|
||||
printf("Error: Invalid register (%s)\n", arg);
|
||||
}
|
||||
|
||||
void print_registers(void) {
|
||||
void print_registers(void)
|
||||
{
|
||||
puts("available 8bits registers :");
|
||||
for (size_t i = 0 ; i < ARRAY_LEN(regs8) ; i++) {
|
||||
printf("\t%s\n", regs8[i].name);
|
||||
@ -160,7 +167,8 @@ void print_registers(void) {
|
||||
}
|
||||
}
|
||||
|
||||
static int cmd_init(int argc, char **argv) {
|
||||
static int cmd_init(int argc, char **argv)
|
||||
{
|
||||
int uart = -1;
|
||||
int baud = -1;
|
||||
uint32_t timeout = -1;
|
||||
@ -230,7 +238,8 @@ static int cmd_init(int argc, char **argv) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cmd_ping(int argc, char **argv) {
|
||||
static int cmd_ping(int argc, char **argv)
|
||||
{
|
||||
int id = -1;
|
||||
|
||||
if (argc != 2) {
|
||||
@ -253,7 +262,8 @@ static int cmd_ping(int argc, char **argv) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cmd_scan(int argc, char **argv) {
|
||||
static int cmd_scan(int argc, char **argv)
|
||||
{
|
||||
int min = -1;
|
||||
int max = -1;
|
||||
|
||||
@ -290,7 +300,8 @@ static int cmd_scan(int argc, char **argv) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cmd_read(int argc, char **argv) {
|
||||
static int cmd_read(int argc, char **argv)
|
||||
{
|
||||
int id = -1;
|
||||
int reg8 = -1;
|
||||
int reg16 = -1;
|
||||
@ -335,7 +346,8 @@ static int cmd_read(int argc, char **argv) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cmd_write(int argc, char **argv) {
|
||||
static int cmd_write(int argc, char **argv)
|
||||
{
|
||||
int id = -1;
|
||||
int reg8 = -1;
|
||||
int reg16 = -1;
|
||||
|
@ -42,6 +42,9 @@ char buffer[SD_HC_BLOCK_SIZE * MAX_BLOCKS_IN_BUFFER];
|
||||
|
||||
static int _init(int argc, char **argv)
|
||||
{
|
||||
(void)argc;
|
||||
(void)argv;
|
||||
|
||||
printf("Initializing SD-card at SPI_%i...", sdcard_spi_params[0].spi_dev);
|
||||
|
||||
if (sdcard_spi_init(card, &sdcard_spi_params[0]) != 0) {
|
||||
@ -57,6 +60,9 @@ static int _init(int argc, char **argv)
|
||||
|
||||
static int _cid(int argc, char **argv)
|
||||
{
|
||||
(void)argc;
|
||||
(void)argv;
|
||||
|
||||
puts("----------------------------------------");
|
||||
printf("MID: %d\n", card->cid.MID);
|
||||
printf("OID: %c%c\n", card->cid.OID[0], card->cid.OID[1]);
|
||||
@ -72,6 +78,9 @@ static int _cid(int argc, char **argv)
|
||||
|
||||
static int _csd(int argc, char **argv)
|
||||
{
|
||||
(void)argc;
|
||||
(void)argv;
|
||||
|
||||
if (card->csd_structure == SD_CSD_V1) {
|
||||
puts("CSD V1\n----------------------------------------");
|
||||
printf("CSD_STRUCTURE: 0x%0lx\n", (unsigned long)card->csd.v1.CSD_STRUCTURE);
|
||||
@ -137,6 +146,9 @@ static int _csd(int argc, char **argv)
|
||||
|
||||
static int _sds(int argc, char **argv)
|
||||
{
|
||||
(void)argc;
|
||||
(void)argv;
|
||||
|
||||
sd_status_t sds;
|
||||
|
||||
if (sdcard_spi_read_sds(card, &sds) == SD_RW_OK) {
|
||||
@ -164,6 +176,9 @@ static int _sds(int argc, char **argv)
|
||||
|
||||
static int _size(int argc, char **argv)
|
||||
{
|
||||
(void)argc;
|
||||
(void)argv;
|
||||
|
||||
uint64_t bytes = sdcard_spi_get_capacity(card);
|
||||
|
||||
uint32_t gib_int = bytes / (SDCARD_SPI_IEC_KIBI * SDCARD_SPI_IEC_KIBI * SDCARD_SPI_IEC_KIBI);
|
||||
@ -335,6 +350,9 @@ static int _copy(int argc, char **argv)
|
||||
|
||||
static int _sector_count(int argc, char **argv)
|
||||
{
|
||||
(void)argc;
|
||||
(void)argv;
|
||||
|
||||
printf("available sectors on card: %li\n", sdcard_spi_get_sector_count(card));
|
||||
return 0;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user