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Merge pull request #6558 from haukepetersen/opt_lpc2387_rmadc
cpu/lpc2387: remove (unused) legacy ADC driver
This commit is contained in:
Oleg Hahm
GitHub
commit
4b79950656
@ -1,54 +0,0 @@
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/*
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* Copyright 2008, Freie Universitaet Berlin (FUB). All rights reserved.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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#ifndef LPC2387ADC_H
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#define LPC2387ADC_H
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/**
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* @defgroup lpc2387_adc LPC2387 ADC
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* @ingroup lpc2387
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*
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* @{
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*/
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/**
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* @file
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* @brief LPC2387 ADC
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*
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* @author Thomas Hillebrandt <hillebra@inf.fu-berlin.de>
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* @version $Revision: 3249 $
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*
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* @note $Id: lpc2387-adc.h 3249 2011-03-11 09:44:46Z schmittb $
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*/
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#include <stdint.h>
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#include "adc_legacy.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define ADC_NUM (6)
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#define ADC_OFFSET (0x10)
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#define ADC_INDEX (4)
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#define ADC_DONE (0x80000000)
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#define ADC_OVERRUN (0x40000000)
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/**
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* @brief Initialize ADC.
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*/
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void adc_init_1(void);
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void adc_init_2(void);
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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#endif /* LPC2387ADC_H */
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@ -1,140 +0,0 @@
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/*
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* Copyright 2008, Freie Universitaet Berlin (FUB). All rights reserved.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @file
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* @ingroup lpc2387_adc
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* @brief LPC2387 ADC
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*
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* @author Thomas Hillebrandt <hillebra@inf.fu-berlin.de>
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* @version $Revision: 3250 $
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*
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* @note $Id: lpc2387-adc.c 3250 2011-03-11 09:45:44Z schmittb $
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*/
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// cpu
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#include "lpc2387.h"
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#include "lpc23xx.h"
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#include "lpc2387-adc.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#if ENABLE_DEBUG
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#include "xtimer.h"
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#endif
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/*---------------------------------------------------------------------------*/
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void
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adc_init(void)
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{
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// enable clock /Power for ADC
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PCONP |= BIT12;
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// peripheral Clock Selection for ADC
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PCLKSEL0 |= 0x03000000; // pclock = cclock/8
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// set A/D control register AD0CR
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AD0CR = (0x01 << 0) | /* SEL=1, select channel 0~7 on ADC0 */
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(0xff << 8) | /* CLKDIV = 1, ADC_CLK = PCLK/10 = 0.45 MHz */
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(0 << 16) | /* BURST = 0, no BURST, software controlled */
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(0 << 17) | /* CLKS = 0, 11 clocks/10 bits */
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(1 << 21) | /* PDN = 1, normal operation */
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(0 << 22) | /* TEST1:0 = 00 */
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(0 << 24) | /* START = 0 A/D conversion stops */
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(0 << 27); /* EDGE = 0 (CAP/MAT signal falling,trigger A/D conversion) */
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}
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/*---------------------------------------------------------------------------*/
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void
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adc_init_1(void)
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{
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// enable clock /Power for ADC
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PCONP |= BIT12;
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//PIN0.24 function select AD0.1
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PINSEL1 |= BIT16;
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// peripheral Clock Selection for ADC
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PCLKSEL0 |= 0x03000000; // pclock = cclock/8
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// set A/D control register AD0CR
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AD0CR = (0x01 << 0) | /* SEL=1, select channel 0~7 on ADC0 */
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(0x00 << 8) | /* CLKDIV = 1, ADC_CLK = PCLK/1 = 4.5 MHz */
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(0 << 16) | /* BURST = 0, no BURST, software controlled */
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(0 << 17) | /* CLKS = 0, 11 clocks/10 bits */
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(1 << 21) | /* PDN = 1, normal operation */
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(0 << 22) | /* TEST1:0 = 00 */
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(0 << 24) | /* START = 0 A/D conversion stops */
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(0 << 27); /* EDGE = 0 (CAP/MAT signal falling,trigger A/D conversion) */
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}
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/*---------------------------------------------------------------------------*/
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void adc_init_2(void)
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{
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// enable clock /Power for ADC
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PCONP |= BIT12;
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// PIN0.23 function select to AD0.0
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PINSEL1 |= BIT14;
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// peripheral Clock Selection for ADC
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PCLKSEL0 |= 0x03000000; // pclock = cclock/8
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// set A/D control register AD0CR
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AD0CR = (0x01 << 0) | /* SEL=1, select channel 0 on ADC0 */
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(0x00 << 8) | /* CLKDIV = 1, ADC_CLK = PCLK/1 = 4.5 MHz */
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(0 << 16) | /* BURST = 0, no BURST */
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(0 << 17) | /* CLKS = 0, 11 clocks/10 bits */
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(1 << 21) | /* PDN = 1, normal operation */
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(0 << 22) | /* TEST1:0 = 00 */
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(0 << 24) | /* START = 0 A/D conversion stops */
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(0 << 27); /* EDGE = 0 (CAP/MAT signal falling,trigger A/D conversion) */
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}
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/*---------------------------------------------------------------------------*/
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uint16_t adc_read(uint8_t channel)
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{
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#if ENABLE_DEBUG
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uint32_t t1, t2;
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#endif
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uint32_t regVal, adc_data;
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/* channel number is 0 through 7 */
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if (channel >= ADC_NUM) {
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channel = 0; /* reset channel number to 0 */
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}
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/* switch channel, start A/D convert */
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AD0CR &= 0xFFFFFF00;
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#if ENABLE_DEBUG
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t1 = _xtimer_now();
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#endif
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AD0CR |= (1 << 24) | (1 << channel);
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#if ENABLE_DEBUG
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t2 = _xtimer_now();
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#endif
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while (1) {
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/* read result of A/D conversion */
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regVal = *(volatile unsigned long *)(AD0_BASE_ADDR + ADC_OFFSET + ADC_INDEX * channel);
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/* wait until end of A/D convert */
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if (regVal & ADC_DONE) {
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break;
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}
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}
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AD0CR &= 0xF8FFFFFF; /* stop ADC now */
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if (regVal & ADC_OVERRUN) { /* save data when it's not overrun, otherwise, return zero */
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return 0;
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}
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adc_data = (regVal >> 6) & 0x3FF;
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DEBUG("%s, %d: %lu\n", RIOT_FILE_RELATIVE, __LINE__, t1);
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DEBUG("%s, %d: %lu\n", RIOT_FILE_RELATIVE, __LINE__, t2);
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return (uint16_t) adc_data; /* return A/D conversion value */
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}
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@ -1,52 +0,0 @@
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/*
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* Copyright 2012 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @defgroup drivers_adc ADC
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* @ingroup drivers
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* @brief Generic interface for ADC drivers
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*
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* @deprecated This interface is obsolete. Use the @ref drivers_periph_adc
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* interface in @ref drivers_periph instead.
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* @{
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*
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* @file
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* @brief Legacy ADC driver interface
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*
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* @author Oliver Hahm <oliver.hahm@inria.fr>
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*/
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#ifndef ADC_LEGACY_H
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#define ADC_LEGACY_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Initialize ADC.
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*/
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void adc_init(void);
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/**
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* @brief Read ADC value of selected channel.
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*
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* Valid channel numbers are from 0 to 2.
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*
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* @return ADC value of selected channel.
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*/
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uint16_t adc_read(uint8_t channel);
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#ifdef __cplusplus
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}
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#endif
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#endif /* ADC_LEGACY_H */
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/** @} */
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