The macros CONCAT(), MIN(), and MAX() are defined over and over again in
RIOT's code base. This de-duplicates the code by moving the macros to a
common place.
Allow two threads to share the same timer - provided they use distinct
sets of timer channels - without occasionally corrupting registers or
state flags.
There are STM32 families where all models use only the Synopsys DWC2 USB OTG core while others completely use only the USB Device FS core. For these families then either the driver `drivers/usbdev_synopsys_dwc2` or the driver `cpu/stm32/periph/usbdev` is used depending on the respective family. However, the STM32 families F1 and L4 use both cores. The correct driver must therefore be selected depending on the CPU line or CPU model.
As implmented, dma_resume assumed that transfers widths were 1 byte and
that the memory address incrmenting was always on and periphial address
incrementing always off. This resulted in memory corruption anytime
these assumptions were not true and a dma was resumed. The DMA module
allows intitiating transfers that did not meet these assumption.
This patch adds proper handling inside dma_resume to safely resume any
transfer. Clearifications and errors are added/fixed in the module's
header file. Also, a few constants are removed from the gobal namespace.
As it was, the calculation of DMA2's IRQ number was inccrorect for some
STM families. The implmentation alocates streams numbers 0 to 7 for the
first DMA controller and 8 and up for the second DMA controller. This
offset of +8 was not accounted for when IRQ's of the second DMA
controller was calculated. This patch corrects this.
There are two schemes for accessing the packet buffer area (PMA) from the CPU:
- 2 x 16 bit/word access scheme where two 16-bit half-words per word can be accessed. With this scheme the access can be half-word aligned and the PMA address offset corresponds therefore to the local USB IP address. The size of the PMA SRAM is usually 1024 byte.
- 1 x 16 bit/word access scheme where one 16-bit half word per word can be accessed. With this scheme the access can only be word-aligned and the PMA address offset to a half-word is therefore twice the local USB IP address. The size of the PMA SRAM is usually 512 byte.
Which access scheme is used depends on the STM32 model.
The addressing of the Packet buffer Memory Area (PMA) is done locally in the USB IP core in half-words with 16-bit. The `_ep_in_buf` and `_ep_out_buf` arrays which hold these USB IP local addresses in the PMA for initialized EPs therefore always use `uint16_t`.
If the MCU does not have an internal D+ pullup and there is no dedicated GPIO to simulate a USB disconnect, the D+ GPIO is temporarily configured as an output and pushed down to simulate a disconnect/connect cycle to allow the host to recognize the device. However, this requires an external pullup on D+ signal to work
If `RCC_CFGR_USBPRE` is defined, the USB device FS clock of 48 MHz is derived from the PLL clock. In this case the PLL clock must be configured and must be either 48 MHz or 72 MHz. If the PLL clock is 72 MHz it is pre-divided by 1.5, the PLL clock of 48 MHz is used directly.
For a number of STM32 MCUs with the USB-FS device interface the signals USB_DP and USB_DM are not defined as GPIO alternative function but as additional function. Additional functions are directly selected/enabled through peripheral registers hand have not to be configured. In this case, the configuration defines GIO_AF_UNDEF as alternative function.
Add tracing support via GPIOs to trace the basic state of the Ethernet
peripheral. The following signals are provided:
- One GPIO pin is toggled on entry of the Ethernet ISR
- On TX start an GPIO is set, on TX completion it is cleared
- On RX complete an GPIO is set, once this is passed to the upper layer
the GPIO is cleared again
In order to reduce the overhead, GPIO LL is used. By default the
on-board LEDs are used as tracing GPIOs. This makes it easy to debug
when the state machine gets stuck without the need to attach a scope or
logic analyzer.
A single character type resulted in way fewer TX descriptors being
available than allocated. Not only resulted this in wasting memory,
but also when more iolist chunks than descriptors are send, the
```C
assert(iolist_count(iolist) <= ETH_TX_DESCRIPTOR_COUNT);
```
does not trigger. As a result, old TX descriptors are being overwritten
in this case.
