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581 Commits

Author SHA1 Message Date
Gunar Schorcht
5b93c18414 cpu/stm32: clarify units in USB FIFO size definitions
Since the USB OTG FIFO sizes are partly defined in 32-bit words and partly in bytes, the documentation of the of the USB OTG FIFO size definitions is extended by the respective unit.
2023-04-16 22:59:11 +02:00
bors[bot]
6f0ac0c092
Merge #19460
19460: cpu/stm32/usbdev_fs: fix ep registration and EP_REG assignments r=gschorcht a=dylad

### Contribution description
This PR provides two fixes for the `usbdev_fs` driver:

- Fix endpoints registration
- Fix assignment of toggleable bits in EP_REG(x) registers

These bugs were encountered with the USBUS MSC implementation.

Regarding the endpoints registration:

For the `usbdev_fs` peripheral, IN and OUT endpoints of the same index must have the same type.
For instance, if EP1 OUT is a bulk endpoint, EP1 IN must either be unused or used as bulk too but it cannot be used as interrupt or isochronous.
With the previous check, the following registration pattern (EP OUT Bulk -> EP IN Interrupt -> EP IN Bulk) would assign both EP OUT Bulk and EP IN Interrupt to same endpoint index. So the configuration would be broken.
Applying the same registration pattern with this patch would now produce EP OUT Bulk -> 1 / EP IN Interrupt -> 2 / EP IN Bulk 1. Which is a working configuration for this IP.

and for the second fix:

EP_REG(x) registers have a total of 6 toggleable bits. Those bits can only be toggled if we write a one to it, otherwise writing a zero has no effect
This commit fixes all the access to these registers to prevent from modifying these bits when not needed.
Without this patch, the endpoint status (VALID / NACK / STALL) can be erroneously modify because bits are not cleared when assigning the new content to the register and thus make the bits toggle and change values.

### Testing procedure
This can be tested with tests/usbus_msc on any board using this `usbdev_fs` driver.
It is easier to test this PR with #19443 alongside. Then the following would be enough:
`CFLAGS='-DSECTOR_COUNT=64' USEMODULE='mtd_emulated' make -j8 BOARD=p-nucleo-wb55 -C tests/usbus_msc flash`

Otherwise this can also be tested by attaching a SPI<->SDCARD adapter.

### Issues/PRs references
None.

Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-09 16:03:55 +00:00
Dylan Laduranty
701242d38d cpu/stm32/usbdev_fs: fix EP_REG(x) assignment for toggleable bits
EP_REG(x) registers have a total of 6 toggleable bits. Those bits can only be toggled if we write a one to it, otherwise writing a zero has no effect
This commit fixes all the access to these registers to prevent from modifying these bits when not needed

Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-07 22:35:45 +02:00
Dylan Laduranty
164331eb0d cpu/stm32/usbdev_fs: fix endpoint registration mechanism
For the usbdev_fs peripheral, IN and OUT endpoints of the same index must have the same type.
For instance, if EP1 OUT is a bulk endpoint, EP1 IN must either be unused or used as bulk too but it cannot be used as interrupt or isochronous.
With the previous check, the following registration pattern (EP OUT Bulk -> EP IN Interrupt -> EP IN Bulk) would assign both EP OUT Bulk and EP IN Interrupt to same endpoint index. So the configuration would be broken.
Applying the same registration pattern with this patch would now produce EP OUT Bulk -> 1 / EP IN Interrupt -> 2 / EP IN Bulk 1. Which is a working configuration for this IP

Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-07 21:23:15 +02:00
Marian Buschsieweke
dd86da6c76
cpu/stm32/periph_gpio_ll: Fix misleading comments
The comments still claim STM32F1 support is missing, but this was
recently added.

Also, drop an empty line to fix `too many consecutive empty lines`
nitpick of the CI.
2023-04-06 08:31:48 +02:00
Marian Buschsieweke
8bfd74d004
cpu/stm32: Fix periph_gpio_ll_irq
Fixing a high impact typo that broke GPIO LL IRQ support on a bunch
of STM32 families.
2023-04-04 17:23:21 +02:00
Marian Buschsieweke
b2199bb744
cpu/stm32: Fix periph_spi operation in non-DMA mode
The driver previously failed to reliably clear the RXNE bit, resulting
in the next transfer to incorrectly read a stale register value. This
was noticed with the SD card SPI driver on an STM32F4, in which the
0xff byte of the previous byte transfer was returned instead of the
actual status byte, throwing the SD card driver off the rails.
2023-03-30 10:36:20 +02:00
bors[bot]
50cd32fbbf
Merge #19397 #19416 #19418 #19419
19397: drivers/usbdev_synopsys_dwc2: fix and reenable DMA mode r=benpicco a=gschorcht

### Contribution description

This PR fixes the DMA mode for all STM32 USB OTG HS cores (including that for STM32F4xx CID 1.xxx) and reenables it. It fixes remaining problems in issue #19359.

This PR includes also includes some changes that are needed to use the DMA mode:
- EP number is used as defined in CMSIS (if defined) for STM32
- `periph_usbdev_hs` feature is added in Kconfig
- `periph_usbdev_hs` feature is added in board definition of `stm32f429i-disc1`
- largest number of available EPs is used for STM32 instead of the smallest number (to be able to use all EPs of HS peripheral)
- `stm32f429i-disco` is removed from blacklist in `tests/usbus_cdc_ecm` since it uses the HS peripheral

### Testing procedure

The following tests should work
```python
USEMODULE=stdio_cdc_acm BOARD=stm32f429i-disc1 make -j8 -C tests/usbus_cdc_ecm flash
```
<details>
<summary>Test results</summary>

```python
[526755.875691] usb 1-2.2: new full-speed USB device number 106 using xhci_hcd
[526755.977853] usb 1-2.2: config 1 interface 3 altsetting 1 endpoint 0x84 has invalid maxpacket 512, setting to 64
[526755.977856] usb 1-2.2: config 1 interface 3 altsetting 1 endpoint 0x2 has invalid maxpacket 512, setting to 64
[526755.978762] usb 1-2.2: New USB device found, idVendor=1209, idProduct=7d01, bcdDevice= 1.00
[526755.978764] usb 1-2.2: New USB device strings: Mfr=3, Product=2, SerialNumber=4
[526755.978766] usb 1-2.2: Product: stm32f429i-disc1
[526755.978768] usb 1-2.2: Manufacturer: RIOT-os.org
[526755.978769] usb 1-2.2: SerialNumber: 7C156425A950A8EB
[526755.991190] cdc_acm 1-2.2:1.0: ttyACM1: USB ACM device
[526755.998131] cdc_ether 1-2.2:1.2 usb0: register 'cdc_ether' at usb-0000:00:14.0-2.2, CDC Ethernet Device, a6:f6:4a:85:1d:c9
[526756.044150] cdc_ether 1-2.2:1.2 enp0s20f0u2u2i2: renamed from usb0
```

</details>

```python
USEMODULE='stdio_cdc_acm periph_usbdev_hs_utmi' BOARD=stm32f723e-disco make -j8 -C tests/usbus_cdc_ecm flash
```
<details>
<summary>Test results</summary>

```python
[528733.480207] usb 1-4.3.4: reset high-speed USB device number 32 using xhci_hcd
[528733.707800] usb 1-4.4: new high-speed USB device number 111 using xhci_hcd
[528733.808257] usb 1-4.4: config 1 interface 0 altsetting 0 endpoint 0x81 has an invalid bInterval 255, changing to 11
[528733.808260] usb 1-4.4: config 1 interface 1 altsetting 0 bulk endpoint 0x1 has invalid maxpacket 64
[528733.808263] usb 1-4.4: config 1 interface 1 altsetting 0 bulk endpoint 0x82 has invalid maxpacket 64
[528733.808642] usb 1-4.4: New USB device found, idVendor=1209, idProduct=7d01, bcdDevice= 1.00
[528733.808645] usb 1-4.4: New USB device strings: Mfr=3, Product=2, SerialNumber=4
[528733.808647] usb 1-4.4: Product: stm32f723e-disco
[528733.808649] usb 1-4.4: Manufacturer: RIOT-os.org
[528733.808651] usb 1-4.4: SerialNumber: A6BAC4E1B1E0806B
[528733.811988] cdc_acm 1-4.4:1.0: ttyACM1: USB ACM device
[528733.814456] cdc_ether 1-4.4:1.2 usb0: register 'cdc_ether' at usb-0000:00:14.0-4.4, CDC Ethernet Device, e6:75:97:3a:74:ba
[528733.854371] cdc_ether 1-4.4:1.2 enp0s20f0u4u4i2: renamed from usb0
```

</details>

```python
USEMODULE='stdio_cdc_acm periph_usbdev_hs_ulpi' BOARD=stm32f746g-disco make -j8 -C tests/usbus_cdc_ecm flash
```
<details>
<summary>Test results</summary>

```python
[529000.944482] usb 1-4.3.4: reset high-speed USB device number 32 using xhci_hcd
[529003.728260] usb 1-4.4: new high-speed USB device number 114 using xhci_hcd
[529003.833107] usb 1-4.4: config 1 interface 0 altsetting 0 endpoint 0x81 has an invalid bInterval 255, changing to 11
[529003.833111] usb 1-4.4: config 1 interface 1 altsetting 0 bulk endpoint 0x1 has invalid maxpacket 64
[529003.833113] usb 1-4.4: config 1 interface 1 altsetting 0 bulk endpoint 0x82 has invalid maxpacket 64
[529003.833743] usb 1-4.4: New USB device found, idVendor=1209, idProduct=7d00, bcdDevice= 1.00
[529003.833747] usb 1-4.4: New USB device strings: Mfr=3, Product=2, SerialNumber=4
[529003.833749] usb 1-4.4: Product: stm32f746g-disco
[529003.833751] usb 1-4.4: Manufacturer: RIOT-os.org
[529003.833753] usb 1-4.4: SerialNumber: 66FE8934D1A363E0
[529003.837143] cdc_acm 1-4.4:1.0: ttyACM1: USB ACM device
[529003.839755] cdc_ether 1-4.4:1.2 usb0: register 'cdc_ether' at usb-0000:00:14.0-4.4, CDC Ethernet Device, 6a:88:1f:1f:b1:f0
[529003.879025] cdc_ether 1-4.4:1.2 enp0s20f0u4u4i2: renamed from usb0```
```
</details>

### Issues/PRs references

Fixes #19359


19416: cpu/rpx0xx/cmsis: Update vendor header files r=benpicco a=maribu

### Contribution description

Generated new vendor header files from upstream SVD files using:

    ./SVDConv "$PICO_SDK_DIR"/src/rp2040/hardware_regs/rp2040.svd \
        --generate=header --fields=macro --fields=enum

Note: The missing `--fields=struct` flag resulted in the header no longer containing bit-fields to represent different fields within registers. While this would generally ease writing code, the RP2040 has the unpleasant feature of corrupting the remaining bits of the register when a write access that is not word-sized occurs in the memory mapped I/O area. This could happen e.g. when a bit field is byte-sized and byte-aligned.
### Testing procedure

No binary changes (hopefully).

### Issues/PRs references

This adds a few additional vendor defines, notably for USB. If anyone were to implement USB, this would be a requirement.

19418: cpu/gd32v: fix gpio_read in periph_gpio r=benpicco a=gschorcht

### Contribution description

This PR fixes a bug in `gpio_read` which made `gpio_read` completely unusable!

A small bug with big consequences. In `gpio_read` the combined port | pin_num parameter `pin` was used instead of the pin number `pin_num` for the call of `_pin_is_input`. This caused the problem that for example instead of accessing GPIOA->CTL0 with address 0x40010800, address 0x60018c00 was accessed. As a result, a pin was randomly detected as input or output and thus a result was arbitrarily returned. Approx. 50% of all inputs always returned LOW.

I found this error by coincidence when I tried to find out why the BOOT0 button on a Sipeed Longan Nano is not usable as a button in RIOT.

### Testing procedure

Flash `tests/periph_gpio`
```
BOARD=sipeed-longan-nano make -j8 -C tests/periph_gpio flash
```
and use commands
```
init_in 0 8
read 0 8
```
Without this PR, the pin is always LOW. With the PR, the pin should be HIGH when the BOOT button is pressed.

### Issues/PRs references

19419: boards/sipeed-longan-nano: add BOOT as user button r=benpicco a=gschorcht

### Contribution description

This PR makes the BOOT button usable as a user button.

### Testing procedure

The test requires PR #19418 to work.

Flash and test:
```
BOARD=sipeed-longan-nano make -j8 -C tests/saul flash term
```
The output
```
Dev: BOOT	Type: SENSE_BTN
Data:	              0 
```
should change to
```
Dev: BOOT	Type: SENSE_BTN
Data:	              1 
```
when the BOOT button is pressed.

### Issues/PRs references

Depends on PR #19418 


Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-03-24 08:38:06 +00:00
Marian Buschsieweke
03dfa495ff
cpu/stm32: Implement GPIO LL IRQ support for STM32F1 2023-03-22 10:40:25 +01:00
Marian Buschsieweke
4a0c462ec3
cpu/stm32: Implement gpio_ll for STM32F1
This provides basic GPIO LL support. IRQ support will be added as
follow up.
2023-03-20 14:14:07 +01:00
Gunar Schorcht
1cd128b9db cpu/stm32: reenable DMA for periph_usbdev 2023-03-16 08:44:48 +01:00
Gunar Schorcht
c3fb8ae97a cpu/stm32: use largest number of available EPs
Use the largest instead of the smallest number of available EPs for this definition. This became necessary to be able to use all EPs of a USB OTG HS peripheral if enabled.
2023-03-16 07:47:18 +01:00
Gunar Schorcht
fc7b4ed06b cpu/stm32: use USB EP number when defined in CMSIS 2023-03-15 18:37:34 +01:00
bors[bot]
fd38db6b38
Merge #19371 #19382
19371: sys/usbus: check for the number of required and provided EPs in static configurations r=dylad a=gschorcht

### Contribution description

This PR provides a static check at compile time whether the number of EPs required in a static configuration does not exceed the number of EPs provided by the USB device.

#### Background

In issue #19359 the problem was reported that `usbus_cdc_ecm` didn't work together with `stdio_cdc_acm` on some STM32 boards. The reason for some of the boards was simply that the application tried to allocate more EPs than available and simply ignored this and just didn't work.

#### Solution

Since `auto_init_usb` uses a static configuration with exactly one USBUS stack instance and one USB device, at least in case `auto_init` is used a static check can be carried out to make sure that the number of EPs required by the application doesn't exceed the number of EPs provided by the USB device. For this purpose, each `usbus_*` module defines the number of IN and OUT EPs required by that module. Each USB device driver defines the number of EPs provided by USB device if it differs from the default of 8 EPs. During the auto initialization the total number of required IN and OUT EPs is then compared with the number of EPs provided by the USB device using a static assert.

### Testing procedure

1. Green CI
2. Compilation of
   ```python
   USEMODULE='stdio_cdc_acm' BOARD=nucleo-f439zi make -j8 -C tests/usbus_cdc_ecm
   ```
   should lead to compilation error
   ```python
   sys/auto_init/usb/auto_init_usb.c:81:1: error: static assertion failed: "Number of required IN endpoints exceeded"
    _Static_assert(USBUS_EP_IN_REQUIRED_NUMOF <= USBDEV_NUM_ENDPOINTS,
    ^~~~~~~~~~~~~~
   Makefile.base:146: recipe for target 'tests/usbus_cdc_ecm/bin/nucleo-f439zi/auto_init_usbus/auto_init_usb.o' failed
   ```
   while compilation of
   ```
   USEMODULE='stdio_cdc_acm' BOARD=nucleo-f767zi make -j8 -C tests/usbus_cdc_ecm
   ```
   should work.

### Issues/PRs references

Fixes issue #19359 partially.

19382: tests/pkg_nanors: use static allocation r=benpicco a=benpicco



Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Benjamin Valentin <benpicco@beuth-hochschule.de>
2023-03-15 08:41:57 +00:00
Joshua DeWeese
dea25437c7 cpu/stm32/periph/timer: fix clobered IRQ flag
The STM32 periph_timer driver reads the timer's status flags, then
clears them all. It is possible that a timer interrupt could occur
between reading the flag and clearing it. This would lead to a lost
interrupt.

The timer's status flags can be cleared by software, but can only be set
by the hardware. This patch takes advantage of this by only clearing the
flags it knows are set. The rest of the flags are set, which doesn't
actually change their state.
2023-03-13 14:01:48 -04:00
Gunar Schorcht
760b80f068 cpu/stm32: move number of EP definition to periph_cpu.h 2023-03-12 13:15:44 +01:00
bors[bot]
513676f6e0
Merge #17086
17086: usbdev: Add dedicated stall functions r=benpicco a=bergzand

### Contribution description

This PR adds dedicated stall functions for usbdev peripherals. Two
functions are added. The first function (usbdev_ep_stall) to enable and
disable the stall condition on generic endpoints. The second function is
a dedicated function to set the stall condition on endpoint zero in both
directions. This status can only be set and should automatically be
cleared by the usbdev implementation (or hardware) after a new setup
request is received from the host.

### Testing procedure

- examples/usbus_minimal should still enumerate correctly on the host side.
- #17085 can be used to demonstrate the ep0_stall function with the `tests/usbus_cdc_acm_stdio/` test

### Issues/PRs references

None

Co-authored-by: Koen Zandberg <koen@bergzand.net>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2023-03-10 00:12:40 +00:00
Gunar Schorcht
86808b690e cpu/stm32: Add stall functions to usbdev_fs 2023-03-09 17:21:56 +01:00
Joshua DeWeese
eeb359e80c cpu/stm32/periph/timer: fix execution flow
The implmentation of `timer_set_absolute()` has The following problems.
First, it attempts to restore the auto reload register (ARR) to it's
default if the ARR was previosly set by `timer_set_periodic()` by
comparing it to the channel's capture compare (CC) register _after_ it
has already set the CC register. Secondly, it clears spurious IRQs
_after_ the CC register has been set. If the value being set is equal to
the timer's current count (or the two become equal before the supurios
IRQ clearing happens), this could cause a legitimate IRQ to be cleared.

The implmentation of `timer_set()` has the same error in handling the
ARR as described above.

This patch reorders the operations of both functions to do:

1. handle ARR
2. clear spurious IRQs
3. set channel's CC
4. enable IRQ

Additionally, the calulation of `value` in `timer_set()` is moved
earlier in the function's exec path as a pedantic measure.
2023-03-07 11:52:16 -05:00
Joshua DeWeese
6488fe7cb3 cpu/stm32/periph/timer: remove unneeded header
I see no reason this header should be included. It does not exist in
RIOT's source tree. This patch removes the include.
2023-03-07 11:25:23 -05:00
Fabian Hüßler
26363e9da4 cpu/stm32/periph/i2c_1: export PERIPH_I2C_MAX_BYTES_PER_FRAME 2023-02-14 17:39:42 +01:00
Joshua DeWeese
289814edcf cpu/stm32/periph/timer: don't stop counter
If a timer's channel was set with a really small realtive duration from
now, such that it would be missed (underflowed), the driver would stop
the timer, potentially causing missed ticks. It was stopped to ensure
that the channel's output-compare register could be set to the current
counter value, before re-enabling the timer's counter. This is a
condition that will ensure that the underflow won't happen again and the
interrupt will fire, at the cost of losing some ticks for very high
speed clocks.

This patch replaces the logic that stopped the timer. Instead it uses a
register provided by the timer hardware to trigger timer interrupts via
software.
2023-02-08 14:08:56 -05:00
Benjamin Valentin
124b849503 cpu: call early_init() 2023-01-08 22:26:12 +01:00
Marian Buschsieweke
86fdbd7054
core/lib: Add macros/utils.h header
The macros CONCAT(), MIN(), and MAX() are defined over and over again in
RIOT's code base. This de-duplicates the code by moving the macros to a
common place.
2023-01-07 09:47:44 +01:00
Marian Buschsieweke
b8cc222e76
cpu/stm32/periph_timer: implement timer_set()
The fallback implementation of timer_set() in `drivers/periph_common`
is known to fail on short relative sets. This adds a robust
implementation.
2023-01-03 15:51:06 +01:00
Marian Buschsieweke
20fc71dd65
cpu/stm32/periph_timer: fix spurious IRQs 2022-11-24 22:34:10 +01:00
Marian Buschsieweke
93c5755649
cpu/stm32/periph_timer: fix race conditions
Allow two threads to share the same timer - provided they use distinct
sets of timer channels - without occasionally corrupting registers or
state flags.
2022-11-24 22:34:03 +01:00
krzysztof-cabaj
afbb568306 cpu/stm32/l4: add ADC support for l496zg 2022-11-21 05:52:02 -05:00
benpicco
2f122769c3
Merge pull request #18921 from benpicco/cpu/stm32-bkup_heap
cpu/stm32: add unused backup RAM as extra heap
2022-11-18 15:48:36 +01:00
Benjamin Valentin
6f05daceb3 cpu/stm32: add unused backup RAM as extra heap 2022-11-18 12:19:10 +01:00
Gunar Schorcht
4b7578b2eb pkg/tinyusb: fix USB speed selection for STM32 2022-11-17 14:07:38 +01:00
benpicco
b33688dec4
Merge pull request #18919 from gschorcht/cpu/stm32/fix_ram_len_stm32f4{2,3}{7,9}
cpu/stm32: fix RAM_LEN for F427, F429, F437, F439 models
2022-11-16 11:32:13 +01:00
Gunar Schorcht
7b99a5152f cpu/stm32: fix RAM_LEN for F427, F429, F437, F439 models
These models have 256 kByte RAM, but the upper 64 kByte are used as CCM data RAM accessible at 0x1000:0000. The access to 0x2003:xxxx leads to a hard fault.
2022-11-15 22:29:34 +01:00
Marian Buschsieweke
35149bd1c2
Merge pull request #18797 from MrKevinWeiss/pr/fixstmclk
cpu/stm32: Fix stm clock configuration
2022-11-15 11:39:25 +01:00
benpicco
384e3ca534
Merge pull request #18847 from krzysztof-cabaj/nucleo-f207zg-ADC
boards/nucleo-f207zg:  support for ADC
2022-11-05 01:55:30 +01:00
krzysztof-cabaj
aa426bd3aa cpu/stm32/f2: add ADC support for f207zg 2022-11-04 18:02:28 -04:00
Gunar Schorcht
31efa61eda cpu/stm32: improvement of USB driver selection
There are STM32 families where all models use only the Synopsys DWC2 USB OTG core while others completely use only the USB Device FS core. For these families then either the driver `drivers/usbdev_synopsys_dwc2` or the driver `cpu/stm32/periph/usbdev` is used depending on the respective family. However, the STM32 families F1 and L4 use both cores. The correct driver must therefore be selected depending on the CPU line or CPU model.
2022-11-03 13:52:01 +01:00
MrKevinWeiss
28aed3cb97
cpu/stm32/kconfig: rework clock tree
This splits up the clock configs.
It allows CPU_FAM based file sourcing and also common CPU_FAMs.
The dependancies are also included in wildcards would be used for the CPU_FAM macro.
This should be much more readable.
This also takes into account the HSE speeds in order to match the make/header resolution.
Some hidden symbols were added to make sorting many CPU_SERIES dependencies easier.
2022-11-03 11:37:33 +01:00
MrKevinWeiss
ba4843b5f4
cpu/stm32/Kconfig: Fix help indent 2022-11-03 11:37:32 +01:00
MrKevinWeiss
641d539092
cpu/stm: Fix clock settings F303* 2022-11-03 11:37:31 +01:00
MrKevinWeiss
17cce015d4
treewide/stm32: Make CLOCK_HS* configurable 2022-11-03 11:37:28 +01:00
benpicco
ed1d8e0a3d
Merge pull request #18785 from maribu/boards/blxxxpill/periph_conf
boards/common/blxxxpill: Fix pin conflicts in periph_conf
2022-10-27 21:22:10 +02:00
benpicco
578d328ff4
Merge pull request #18711 from Enoch247/cpu-stm32-dma-fixes
cpu/stm32: fix periph_dma
2022-10-27 14:36:10 +02:00
Marian Buschsieweke
5ddc332b52
cpu/stm32/periph_pwm: support pin remap for F1
Add support to route timer peripheral to alternative pins for the
STM32F1.
2022-10-27 14:28:06 +02:00
Marian Buschsieweke
b6845cef79
cpu/stm32/periph_qdec: support pin remap for F1
Add support to route peripheral to alternative pins for the STM32F1
family.
2022-10-27 14:28:06 +02:00
Joshua DeWeese
4e2c63ce8c cpu/stm32/periph/dma: make dma_prepare() generic
This patch makes dma_prepare() handle register names a bit more
generically.
2022-10-26 09:36:45 -04:00
Joshua DeWeese
c888c103c2 cpu/stm32/periph/dma: fix dma_resume
As implmented, dma_resume assumed that transfers widths were 1 byte and
that the memory address incrmenting was always on and periphial address
incrementing always off. This resulted in memory corruption anytime
these assumptions were not true and a dma was resumed. The DMA module
allows intitiating transfers that did not meet these assumption.

This patch adds proper handling inside dma_resume to safely resume any
transfer. Clearifications and errors are added/fixed in the module's
header file. Also, a few constants are removed from the gobal namespace.
2022-10-26 09:36:45 -04:00
Joshua DeWeese
264a7c8ef9 cpu/stm32/periph/dma: fix DMA2 on STMF3 families
As it was, the calculation of DMA2's IRQ number was inccrorect for some
STM families. The implmentation alocates streams numbers 0 to 7 for the
first DMA controller and 8 and up for the second DMA controller. This
offset of +8 was not accounted for when IRQ's of the second DMA
controller was calculated. This patch corrects this.
2022-10-26 09:36:44 -04:00
Gunar Schorcht
9c8ec851ce cpu/stm32: define CFG_TUSB_RHPORT{0,1}_MODE dependent on used USB ports 2022-10-21 11:43:55 +02:00
Gunar Schorcht
1dfe79fe7c drivers/usbdev_synopsys_dwc2: use DWC2_USB_OTG_FS_TOTAL_FIFO_SIZE
Use `DWC2_USB_OTG_FS_TOTAL_FIFO_SIZE` instead of `USB_OTG_FS_TOTAL_FIFO_SIZE` since the latter is only defined in the vendor headers for STM32 MCUs. The STM32-specific problem that `USB_OTG_FS_TOTAL_FIFO_SIZE` is not defined in the vendor headers for all STM32 families has therefore been moved from the driver to the STM32-specific USB device header.
2022-10-17 20:03:57 +02:00