Leandro Lanzieri
110793be0c
cpu/lpc23xx: Add Kconfig symbols
2020-07-16 19:03:38 +02:00
Leandro Lanzieri
c71c2b79a7
cpu/arm7_common: Add Kconfig symbols
...
HAS_ARCH_ARM features now is moved to Kconfig.features as it is being
used by multiple architectures.
2020-07-16 19:03:38 +02:00
a20d663086
Merge pull request #14470 from leandrolanzieri/pr/kconfig/lpc1768_boards_symbols
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boards/lpc1768-based: Model features in Kconfig
2020-07-16 18:59:55 +02:00
d0fb8d727a
Merge pull request #14539 from aabadie/pr/cpu/lpc2387_rename
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cpu/lpc2387: rename to lpc23xx
2020-07-16 18:38:47 +02:00
Leandro Lanzieri
38636a8089
cpu/saml1x: Add Kconfig symbols
2020-07-16 18:09:59 +02:00
Leandro Lanzieri
84de2d8f7b
cpu/saml1x: Specify CPU_FAM only in Makefile.features
2020-07-16 18:09:58 +02:00
e246e7ed2a
Merge pull request #14538 from leandrolanzieri/pr/kconfig/native_symbols
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boards/native: Model features in Kconfig
2020-07-16 18:04:42 +02:00
dea506a719
cpu/stm32wb: define missing IMR bit in CMSIS
2020-07-16 17:35:50 +02:00
1a095b36fa
cpu/stm32: adapt UART driver for stm32l4r5 cpu line
2020-07-16 17:35:49 +02:00
8e87dedbce
cpu/stm32: remove not needed CMSIS vendor headers
2020-07-16 17:35:49 +02:00
f21440b176
cpu/stm32: use CMSIS headers from the stm32cmsis package
2020-07-16 17:35:48 +02:00
1f0a3a6bae
cpu/cortexm_common: add special case for SVC interrupt configuration
...
by default stm32f0/l0/l1 families simply call the interrupt enum SVC_IRQn
2020-07-16 17:35:48 +02:00
def5f80998
Merge pull request #14477 from leandrolanzieri/pr/kconfig/sam3_boards_symbols
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boards/sam3-based: Model features in Kconfig
2020-07-16 17:07:03 +02:00
0a699e87c7
cpu/lpc23xx: rename remaining occurrences of lpc2387
2020-07-16 17:01:10 +02:00
46a053e674
cpu/lpc23xx: rename Doxygen group
2020-07-16 17:01:10 +02:00
829b16b472
cpu/lpc23xx: rename lpc2387 to lpc23xx
2020-07-16 17:01:10 +02:00
a4129d0f8f
Merge pull request #14483 from leandrolanzieri/pr/kconfig/samd5x_based_symbols
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boards/same54-xpro: Model features in Kconfig
2020-07-16 16:38:21 +02:00
Leandro Lanzieri
8e5c0f3f84
cpu/lpc1768: Add Kconfig symbols
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Also specify CPU_FAM in Makefile.features
2020-07-16 15:39:02 +02:00
Leandro Lanzieri
44be83e4bb
cpu/sam3: Add Kconfig symbols
2020-07-16 15:35:23 +02:00
Martine Lenders
ea8e867611
Merge pull request #14534 from bergzand/pr/cortexm/irq_during_idle
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cortexm_common: disable IRQ during thread_sched_idle
2020-07-16 15:35:14 +02:00
Leandro Lanzieri
1c9a95e955
cpu/samd5x: Add Kconfig symbols
2020-07-16 15:33:29 +02:00
15110af51c
Merge pull request #14475 from leandrolanzieri/pr/kconfig/mips32r2_boards_symbols
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boards/mips32r2-based: Model features in Kconfig
2020-07-16 15:14:29 +02:00
Benjamin Valentin
f53ae74269
cpu/kinetis: set CPU_HAS_BITBAND
2020-07-16 14:44:28 +02:00
Benjamin Valentin
8f36c88b93
cpu/stm32: set CPU_HAS_BITBAND
2020-07-16 14:44:28 +02:00
Benjamin Valentin
b716419462
cpu/efm32: set CPU_HAS_BITBAND
2020-07-16 14:44:28 +02:00
Benjamin Valentin
95ec5890b0
cortexm_common: fix bit-banding check
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Not all MCUs ≥ Cortex-M3 provide the Bit-Banding feature.
It is up to the manufacturer to implement it.
Instead, rely on the CPU_HAS_BITBAND being set in `periph_cpu.h`.
2020-07-16 14:44:28 +02:00
Leandro Lanzieri
64970ab131
cpu/native: Add Kconfig symbols
2020-07-16 13:53:45 +02:00
Leandro Lanzieri
52b31b5fce
cpu/lm4f120: Add Kconfig symbols
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Also specify CPU_FAM in Makefile.features
2020-07-16 13:23:30 +02:00
Leandro Lanzieri
710c21805d
cpu/mips_pic32mz: Add Kconfig symbols
2020-07-16 13:20:05 +02:00
Leandro Lanzieri
6091c31bd6
cpu/mips_pic32mx: Add Kconfig symbols
2020-07-16 13:20:05 +02:00
Leandro Lanzieri
c1b25655fd
cpu/mips_pic32_common: Add Kconfig symbols
2020-07-16 13:20:04 +02:00
Leandro Lanzieri
ea3166e08e
cpu/mips32r2_common: Add Kconfig symbols
...
Also this moves the specification of CPU_ARCH to the common folder
2020-07-16 13:20:01 +02:00
8046a74e50
cpu/stm32: model features in Kconfig
2020-07-16 11:34:02 +02:00
055c43c878
cpu/stm32: enable flashpage feature for stm32f031k6
2020-07-16 11:15:30 +02:00
eec7aa2e42
cortexm_common: disable IRQ during thread_sched_idle
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A race condition is present where an IRQ is serviced between the
priority increase of the PENDSV and the sleep. When the IRQ
is serviced before the WFI sleep, the core will sleep until the next
IRQ and the thread activated by the IRQ will not be scheduled until
a new IRQ triggers.
This commit wraps an IRQ disable and restore around the priority
modification and sleep to prevent interrupts from being serviced until
the WFI call returns.
2020-07-16 11:11:15 +02:00
Leandro Lanzieri
6a9c28aa72
cpu/nrf52: Add Kconfig symbols
2020-07-16 10:23:49 +02:00
Leandro Lanzieri
83252e8f0d
cpu/nrf51: Add Kconfig symbols
2020-07-16 10:23:49 +02:00
Leandro Lanzieri
31b288443a
cpu/nrfx_common: Add Kconfig symbols
2020-07-16 10:23:48 +02:00
7fd25f21c9
Merge pull request #14426 from maribu/stm32f4_uart_init
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cpu/stm32: Fix garbage on UART init
2020-07-15 21:14:42 +02:00
Marian Buschsieweke
0ed7ead587
cpu/native: Workaround for libstdcpp for FreeBSD
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On FreeBSD, libstdc++ is known to not work with -m32. Thus, we don't provide
it feature libstdcpp there.
2020-07-15 20:29:02 +02:00
Francisco
1167867d02
Merge pull request #14362 from maribu/msp430-irq-inline
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cpu/msp430_common: Update to inline-able IRQ API
2020-07-15 15:34:04 +02:00
Marian Buschsieweke
1a8defd209
cpu/msp430_common: Refactor cpu.{c,h}
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Drop `__enable_irq()` and `__disable_irq()` and replace single remaining
call of them with the standard IRQ API, as this is now equally fast.
2020-07-15 13:09:11 +02:00
Marian Buschsieweke
aec9eb7f6a
cpu/stm32: Fix uart_init()
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- Make use of the fact that gpio_init_af() does not need prior call to
gpio_init() for all STM32 families anymore and drop call to gpio_init()
- Initialize the UART periph first, before initializing the pins
- While uninitialized, the UART periph will send signal LOW to TXD. This
results in a start bit being picked up by the other side.
- Instead, we do not connect the UART periph to the pins until it is
initialized, so that the TXD level will already be HIGH when the pins
are attached.
- This results in no more garbage being send during initialization
2020-07-15 12:12:46 +02:00
Marian Buschsieweke
73c9161517
cpu/stm32: Fix gpio_init() / gpio_int_af()
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- Do not set an intermediate mode, prepare correct mode settings in a temporary
variable
- Consistently enabled the GPIO periph in gpio_init_af()
- Previously, STM32 F1 did not require a separate call to gpio_init() prior
to a call of gpio_init_af(), but other STM32 families did
- Now, gpio_init_af() can be used without gpio_init() consistently
- STM32 F1: Do not touch ODR for non input pins
- For input pins, this enables / disabled pull up resistors. For outputs,
this register should remain untouched (according to API doc)
2020-07-15 12:12:45 +02:00
Marian Buschsieweke
cf482c5d46
build system: Add libstdcpp feature and doc
...
- Add libstdcpp feature to indicate a platform is providing a libstdc++
implementation ready for use
- The existing cpp feature now only indicates a working C++ toolchain without
libstdc++. (E.g. still useful for the Arduino compatibility layer.)
- Added libstdcpp as required feature were needed
- Added some documentation on C++ on RIOT
2020-07-15 11:45:22 +02:00
Marian Buschsieweke
91a294aa45
cpu/cortexm_common: Drop LTO workaround for Cortex M thread_arch.c
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The `ldr r1, =sched_active_thread` instruction couldn't be assembled with
LTO, as the no immediate offset could be found to construct the address of
`sched_active_thread`. This commit instructs the assembler to generate a
literate pool which can be used to construct the address. While this issue
was only triggered during LTO, it theoretically could also pop up without LTO
due to unrelated changes. Thus, it is a good idea to create the literate pool
even without LTO enabled.
2020-07-15 10:37:15 +02:00
Marian Buschsieweke
0feebcb094
cpu/cortexm_common: Drop #7776 's LTO workaround
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The workaround from #7776 is no longer needed with recent toolchains, e.g. such
as the toolchain in the riot/riotbuild docker image.
2020-07-15 10:37:15 +02:00
Benjamin Valentin
48340f971f
cpu/sam0_common: flashpage: clean up helper function
2020-07-14 20:50:50 +02:00
hugues
0926a04b08
cpu/stm32/periph/pwm: useless static var and a semicolon removed
2020-07-14 01:41:16 +02:00
Thomas Stilwell
754d790b3f
boards: efm32 boards: add support for LETIMER
2020-07-10 20:44:03 -05:00
Thomas Stilwell
37a6cc66f5
cpu/efm32/timer: add pm blockers
2020-07-10 20:44:03 -05:00
Thomas Stilwell
651a3bf423
cpu/efm32/timer: add support for LETIMER
2020-07-10 20:44:03 -05:00
988638715f
cpu/nrf5x_common: remove inappropriate rtc dependency resolution
2020-07-10 21:58:03 +02:00
Gilles DOFFE
892370121d
cpu/stm32/qdec: test null callback pointer ( #14125 )
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cpu/stm32/qdec: test if callback pointer is set
Callback pointer is not tested and could result in a hard fault
if the pointer is NULL.
Thus only activate interrupt if a callback provided.
Signed-off-by: Gilles DOFFE <g.doffe@gmail.com>
2020-07-10 15:05:53 +02:00
hugues
304d3f9e8d
cpu/stm32/periph/pwm: some bugfixes...
2020-07-10 13:47:45 +02:00
hugues
d069c6e787
cpu/stm32/periph/pwm: CCMR1 was defined a second time instead of CCMR2
2020-07-10 13:47:45 +02:00
hugues
a5da5953b2
cpu/stm32/periph/pwm: multiple devices PWM_RIGHT mode bugfix
2020-07-10 13:47:09 +02:00
Gunar Schorcht
fb47f094d3
cpu/esp32: support multiple heaps for newlib
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Several unsused DRAM sections are added to the heap.
2020-07-10 08:42:12 +02:00
hugues
16e454ccaf
cpu/stm32/periph/pwm: some bugfixes...
2020-07-09 23:49:00 +02:00
benpicco
30ebabb84e
Merge pull request #14007 from benpicco/cpu/sam0_common-pwm
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cpu/sam0_common: move PWM to common code, add support for saml21, samd5x
2020-07-09 10:01:08 +02:00
Bas Stottelaar
1d97783175
cpu/efm32: DCDC is available on Series 2 as well
2020-07-08 21:54:57 +02:00
Bas Stottelaar
1105f60a23
cpu/efm32: make series defines explicit
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The EFM32 uses the provided _SILICON_LABS_32B_SERIES_0 and
_SILICON_LABS_32B_SERIES_1 definitions to enable or disable certain
code. With the introduction of new MCUs, there is also the
_SILICON_LABS_32B_SERIES_2 definition.
This PR ensures that the defines are explicit, and that #else
statements don't target the wrong series.
2020-07-08 21:54:57 +02:00
Benjamin Valentin
bce7d25f10
cpu/sam0_common: add PWM support for saml2x, samd5x
2020-07-08 21:51:12 +02:00
benpicco
63a0014456
Merge pull request #14467 from benpicco/fix_file_permission
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treewide: fix file permissions
2020-07-08 18:30:01 +02:00
Benjamin Valentin
9d836888c2
treewide: fix file permissions
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C files should not be executable.
2020-07-08 17:32:36 +02:00
benpicco
99553e882c
Merge pull request #14461 from hugueslarrive/iss14361
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Fix bad assertion in cpu/stm32/periph/pwm.c
2020-07-08 16:42:08 +02:00
hugues
11e847c9af
cpu/stm32: fix off-by-one error in clock frequency assert
2020-07-08 14:17:14 +02:00
d02d54b76a
Merge pull request #14455 from benpicco/fe310-heap_markers
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cpu/fe310: use common names for heap markers
2020-07-08 14:14:38 +02:00
Benjamin Valentin
0ddca68de9
cpu/fe310: use common names for heap markers
...
Other archs use `_sheap` and `_eheap` to mark the start and end of
the heap.
fe310 uses `_heap_start` and `_heap_end`, so platform independent
code that wants to make use of this will needlessly fail.
For compatibility with common code, name them the same on fe310.
2020-07-07 17:25:00 +02:00
Leandro Lanzieri
7a2e4c819d
cpu/esp8266: Add Kconfig symbols
2020-07-07 16:27:43 +02:00
Leandro Lanzieri
0b0a03bef9
cpu/esp32: Add Kconfig symbols
2020-07-07 16:27:35 +02:00
Leandro Lanzieri
e6b698c69b
cpu/esp_common: Add Kconfig symbols
2020-07-07 16:27:34 +02:00
Jean Pierre Dudey
3003cf737a
boards/common/esp32: move ESP features to cpu/esp_common
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>All of them are features of each ESP SoC and have not to be configured by the
board definition.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2020-07-07 16:02:23 +02:00
Martine Lenders
60469026cf
Merge pull request #14434 from maribu/irq_cleanup
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cpu/cortexm_common: Fix cpu_switch_context_exit()
2020-07-04 11:42:54 +02:00
Marian Buschsieweke
056100c1ca
cpu/cortexm_common: Fix cpu_switch_context_exit()
...
- Use `irq_enable()` over `bl irq_enable`, as `irq_enable()` is an inline
function and not a C function any more
- Drop `__attribute__((naked))` qualifier
- It must be used with the declaration of the function, but there it is
missing. (And it cannot be added there, as this function would need to
be implemented as "naked" by every platform; which is impossible for
platforms not supporting `__attribute__((naked))`.)
- Only functions consisting completely of basic asm may be marked as naked.
But both the assembly used to trigger the SVC interrupt as well as the
assembly used in `irq_enable()` are extended asm, not basic asm
- Use ` UNREACHABLE();` over a custom asm construct
2020-07-03 12:48:42 +02:00
Leandro Lanzieri
215e77f2ad
cpu/kinetis: Add Kconfig symbols
2020-07-02 14:41:41 +02:00
Leandro Lanzieri
6ea04d146b
cpu/kinetis: Provide features based on CPU series
...
Also, rename CPU_FAMILY to the standard CPU_FAM.
2020-07-02 14:41:39 +02:00
Francisco
772b638d2a
Merge pull request #14405 from aabadie/pr/cpu/mips_no_binfile
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cpu/mips: disable BINFILE generation
2020-07-01 10:21:41 +02:00
Francisco
41888674a4
Merge pull request #14385 from aabadie/pr/make/appdeps_export
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boards/mips: remove use of APPDEPS, un-export globally APPDEPS
2020-07-01 09:13:35 +02:00
b3e566bcd8
cpu/mips: disable BINFILE generation
2020-07-01 08:08:23 +02:00
Peter Kietzmann
2250c67240
Merge pull request #14388 from leandrolanzieri/pr/kconfig/ezr32wg_board_symbols
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boards/slwstk6220a: Model features provided in Kconfig
2020-06-30 18:24:44 +02:00
Francisco
325b7a8d8e
Merge pull request #13631 from benpicco/cpu/sam0_common/spi-deinit
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drivers/periph/spi: add periph_spi_reconfigure feature & implementation for sam0
2020-06-30 15:34:53 +02:00
Gunar Schorcht
028c0d4b3c
Merge pull request #14353 from fjmolinas/pr_reorder_makefiles_cleanup
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Makefile: use normal conditionals
2020-06-30 09:59:02 +02:00
Francisco Molina
e98341da93
Makefile: use normal conditionals
2020-06-29 22:40:29 +02:00
Leandro Lanzieri
339432583c
cpu/ezr32wg: Add Kconfig symbols
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Also define CPU_FAM in Makefile.features
2020-06-29 14:01:01 +02:00
ffa28e415a
cpu/mips_pic32_common: add cpu_model specific assembly symbols dependency
2020-06-28 12:13:32 +02:00
Gunar Schorcht
e247ced04c
cpu/esp: add feature arch_esp for all ESP SoCs
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There are common features that can be used by ESP32 as well as ESP8266, for example the `esp_wifi` module. To be able to test for any ESP SoC, feature `arch_esp` is introduced.
2020-06-27 11:30:59 +02:00
Marian Buschsieweke
414e17b437
Merge pull request #14360 from aabadie/pr/cpu/fe310_inline_irq
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cpu/fe310: migrate to inlined irq API
2020-06-26 13:00:22 +02:00
279f2aebed
Merge pull request #14224 from kaspar030/cortexm_remove_idle_thread
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core: make idle thread optional
2020-06-26 11:04:19 +02:00
Francisco
a46adc3d44
Merge pull request #13742 from benemorius/pr/kinetis-pm_layered
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cpu/kinetis: implement power modes for pm_layered
2020-06-26 10:51:12 +02:00
3d9421571c
cpu/fe310: migrate to inlined irq API
...
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2020-06-26 10:48:56 +02:00
Marian Buschsieweke
c5c83cfe3c
cpu/msp430_common: Update to inline-able IRQ API
...
- Updated to inline-able IRQ API
- Improved robustness of functions
- Added memory barrier to prevent the compiler from moving code outside of
a critical section guarded by irq_disable() ... irq_restore()
- Reduced overhead of `irq_disable()`
- After clearing the global interrupt enable (GIE) bit, IRQs remain enabled
for up to one CPU cycle
- The previous implementation just added a nop to fill that cycle
- This implementation uses the cycle for masking the return value
- Reduced overhead of `irq_restore()`
- Now only one CPU cycle is needed
- `irq_disable()`, `irq_restore()`, and `irq_enable()` work now in constant time
2020-06-25 21:32:17 +02:00
0ff9e554eb
cpu/cortexm: implement sched_arch_idle() and disable idle thread
2020-06-25 16:02:28 +02:00
Francisco
903ad1e888
Merge pull request #14354 from miri64/drivers/cleanup/rm-NETOPT_IPV6_IID
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netdev: remove NETOPT_IPV6_IID support for network devices
2020-06-25 15:53:33 +02:00
Francisco
c0d171a0a2
Merge pull request #14343 from leandrolanzieri/pr/kconfig/cc2538_based_symbols
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boards/cc2538-based: Model features in Kconfig
2020-06-25 13:20:58 +02:00
Martine S. Lenders
78fc1e7654
nrfmin: remove NETOPT_IPV6_IID support
...
This option is handled in the `gnrc_netif`-layer without any access to
the driver's option since 7ae90564d9
2020-06-25 10:51:05 +02:00
Leandro Lanzieri
75f487d9ec
Merge pull request #14344 from fjmolinas/pr_mips_uhi_dep
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cpu/mips32r2_common: include newlib_syscalls_mips_uhi in Makefile.dep
2020-06-24 16:30:04 +02:00
Bas Stottelaar
21f9afdb5b
Merge pull request #14318 from benpicco/cpu/stm32-TIMER_CHANNELS
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cpu/stm32: use TIMER_CHANNEL_NUMOF for consistency
2020-06-24 15:32:22 +02:00
Francisco Molina
bdfda031c5
cpu/mips32r2_common: include newlib_syscalls_mips_uhi in Makefile.dep
2020-06-24 15:29:42 +02:00
Leandro Lanzieri
7d543fe091
cpu/cc2538: Add Kconfig symbols
...
Also specify CPU_FAM in Makefile.features
2020-06-24 15:15:43 +02:00
Francisco
b49bd9ffe5
Merge pull request #14276 from jue89/fix/samr30-xpro_ztimer_rtt_underflow
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cpu/saml21: adjust RTT_MIN_OFFSET
2020-06-24 13:41:06 +02:00
Leandro Lanzieri
cd3b1515a0
Merge pull request #14338 from aabadie/pr/cpu/fe310_kconfig
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cpu/fe310: boards/hifive1*: model features in Kconfig
2020-06-24 13:34:40 +02:00
Benjamin Valentin
06cdd30fcb
cpu/stm32: use TIMER_CHANNEL_NUMOF for consistency
2020-06-24 12:58:38 +02:00
Kevin "Tristate Tom" Weiss
2d5901dd69
Merge pull request #14340 from leandrolanzieri/pr/kconfig/msp430_boards_symbols
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boards/msp430-based: Model features in Kconfig
2020-06-24 12:53:42 +02:00
b36b2ee748
cpu/fe310: add Kconfig configuration
2020-06-24 11:13:45 +02:00
Francisco
816d7c4d28
Merge pull request #14206 from leandrolanzieri/pr/kconfig/atmega256rfr2_based_boards
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boards/atmega256rfr2-based: Model features in Kconfig
2020-06-24 11:06:04 +02:00
benpicco
cdacdd79e6
Merge pull request #14319 from benpicco/cpu/ezr32wg/TIMER_CHANNELS
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cpu/ezr32wg: define TIMER_CHANNEL_NUMOF
2020-06-24 09:52:29 +02:00
Leandro Lanzieri
4abc4e7de7
cpu/msp430fxyz: Add Kconfig symbols
...
Also specify CPU_FAM in Makefile.features
2020-06-24 09:28:19 +02:00
Leandro Lanzieri
a73c03ed0c
cpu/cc430: Add Kconfig symbols
...
Also specify CPU_FAM in Makefile.features
2020-06-24 09:27:02 +02:00
Leandro Lanzieri
c86bf5074d
cpu/msp430_common: Add Kconfig symbols
...
Also specify CPU_ARCH and CPU_CORE in Makefile.features.
2020-06-24 09:26:05 +02:00
Francisco
48bdd7018a
Merge pull request #14302 from fjmolinas/pr_sam0_rtt_opt
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cpu/sam0_common/rt%: use READREQUEST when accessing CLOCK/COUNT regs
2020-06-24 08:42:03 +02:00
Bas Stottelaar
6774f7e412
Merge pull request #14337 from benpicco/TIMER_CHANNEL_NUMOF
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use TIMER_CHANNEL_NUMOF instead of TIMER_CHANNELS
2020-06-24 01:19:17 +02:00
Benjamin Valentin
97343af69d
cpu/ezr32wg: define TIMER_CHANNEL_NUMOF
2020-06-24 00:48:21 +02:00
Benjamin Valentin
96273b4df0
cpu/atmega_common: use TIMER_CHANNEL_NUMOF
2020-06-24 00:45:35 +02:00
Benjamin Valentin
51135a50fc
cpu/sam3: use TIMER_CHANNEL_NUMOF
2020-06-24 00:45:35 +02:00
Benjamin Valentin
c8ff026640
cpu/sam0_common: use TIMER_CHANNEL_NUMOF
2020-06-24 00:45:35 +02:00
Benjamin Valentin
3af4d38735
cpu/lpc2387: use TIMER_CHANNEL_NUMOF
2020-06-24 00:45:35 +02:00
Benjamin Valentin
5da1a9e577
cpu/esp*: use TIMER_CHANNEL_NUMOF
2020-06-24 00:45:35 +02:00
Francisco
a73b61e30b
Merge pull request #14320 from benpicco/cpu/sam0_common-gpio_gclk
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cpu/sam0_common: GPIO always default to MAIN clock for EXTI, make configurable
2020-06-23 22:48:45 +02:00
Leandro Lanzieri
cc6a4929f4
cpu/atmega256rfr2: Add Kconfig symbols
2020-06-23 14:37:26 +02:00
Francisco
f63066974c
Merge pull request #14195 from leandrolanzieri/pr/kconfig/atmega32u4_boards_symbols
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boards/arduino-leonardo: Model features in Kconfig
2020-06-23 14:08:27 +02:00
Juergen Fitschen
cc22324bd4
cpu/saml21: adjust RTT_MIN_OFFSET
2020-06-23 11:59:56 +02:00
d7c1510b0f
cortexm_common: Remove read in ICSR register operations
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All bits in the ICSR register in the cortexm system control block are
either read-only or don't have an effect when writing a zero. A
read-modify-write cycle is thus not required when writing bit flags in
the register. This commit removes the reads in the read-modify-store
patterns for this register.
2020-06-23 11:53:53 +02:00
25c609f2d3
Merge pull request #12101 from OTAkeys/pr/fix_i2c_release
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cpu/stm32_common: disable i2c in release
2020-06-23 10:21:15 +02:00
Leandro Lanzieri
1ea5fc6f06
cpu/atmega32u4: Add CPU-specific Kconfig symbols
2020-06-23 09:57:22 +02:00
Leandro Lanzieri
ed0743ddb3
cpu/atmega1281: Add Kconfig symbols
2020-06-22 17:09:03 +02:00
Leandro Lanzieri
a5dedf3c91
cpu/atmega1284p: Add Kconfig symbols
2020-06-22 17:08:59 +02:00
Leandro Lanzieri
6c184376d0
cpu/atmega128rfa1: Add Kconfig symbols
2020-06-22 16:10:40 +02:00
Leandro Lanzieri
873badcd76
cpu/atmega_common: Add ATmega128 family Kconfig symbol
2020-06-22 15:19:35 +02:00
Peter Kietzmann
332ae60e04
Merge pull request #14211 from leandrolanzieri/pr/kconfig/atmega2560_boards_symbols
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boards/arduino-mega2560: Model features in Kconfig
2020-06-22 15:04:43 +02:00
Thomas Stilwell
ae7ec96731
cpu/kinetis: implement power modes for pm_layered
2020-06-21 21:51:16 -05:00
Bas Stottelaar
1bd0e32cb9
cpu/kinetis: remove reference of RTC_NUMOF.
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These defines were globally removed in #12673 .
2020-06-21 21:29:23 +02:00
Benjamin Valentin
3e91914831
cpu/sam0_common: spi: implement the periph_spi_reconfigure feature
2020-06-21 21:19:17 +02:00
benpicco
27da7c2797
Merge pull request #14323 from bergzand/pr/kinetis/spi_scalar_array_size
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kinetis/spi_scalar: Add local ARRAY_SIZE define
2020-06-21 18:00:08 +02:00
c2a7d23277
kinetis/spi_scalar: Add local ARRAY_SIZE define
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The spi scalar calculation tool for the kinetis family is stand-alone
and doesn't use the RIOT headers. It doesn't include the ARRAY_SIZE
macro from the RIOT headers. This commit adds a local definition of the
ARRAY_SIZE macro
2020-06-21 17:09:32 +02:00
Benjamin Valentin
93b43e5753
cpu/samd5x: make SAM0_GCLK_TIMER configurable
2020-06-20 00:25:54 +02:00
Benjamin Valentin
fba3aab2f3
cpu/samd5x: rename GCLK defines
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Now that the GCLK defines are not always at a fixed frequency, rename
them to better reflect this.
2020-06-20 00:25:54 +02:00
Benjamin Valentin
17304d390c
cpu/samd5x: use MHZ() macro
2020-06-20 00:25:53 +02:00
Benjamin Valentin
b5f407f9a4
cpu/samd5x: enable buck voltage regulator when possible
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When an external oscillator is used and the internal fast oscillators
are off, we can enable the buck converter if the board supports it.
2020-06-20 00:25:53 +02:00
Benjamin Valentin
849c76578a
cpu/samd5x: allow to use XOSC as clock source
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Allow to run the main clock and all peripheral clocks off XOSC.
This is necessary if we want to use the buck voltage regulator.
2020-06-20 00:10:08 +02:00
benpicco
a30d229b12
Merge pull request #14166 from aabadie/pr/cpu/stm32g4
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cpu/stm32g4: add support + add nucleo-g474re board
2020-06-19 17:05:15 +02:00
Cenk Gündoğan
209248f3b2
Merge pull request #14310 from leandrolanzieri/pr/kconfig/efm32_boards_symbols
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boards/efm32-based: Model features in Kconfig
2020-06-19 15:02:51 +02:00
f546c6238b
cpu/stm32: add support for stm32g4
2020-06-19 14:18:17 +02:00
Francisco Molina
bdda25c534
cpu/sam0_common/rt%: issue READREQUEST to access CLOCK/COUNT regs
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read-synchronized register will stall immediatly when read, instead
issue READREQUEST and wait for sync to be unset.
2020-06-19 14:10:31 +02:00
Benjamin Valentin
c0203ad35c
cpu/sam0_common: GPIO default to MAIN clock for EXTI, make configurable
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Currently only samd21 used the 32 kHz clock for EXTI which makes it miss fast events.
All newer members of the family use the MAIN clock.
While touching this, also make the clock source configurable to this can be overwritten,
e.g. in the board config if desired.
2020-06-19 13:27:48 +02:00
Francisco
a970163812
Merge pull request #14312 from benpicco/cpu/sam0_common/periph/uart-rxonly
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cpu/sam0_common: UART: allow RX only configuration
2020-06-19 11:44:10 +02:00
benpicco
c3314e1a0c
Merge pull request #14303 from fjmolinas/pr_sam0_unified_rtt
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cpu/sam0: unified rtt configuration
2020-06-19 11:30:06 +02:00
Francisco Molina
ff24aa61f3
cpu/sam0_common/periph/rtt: uncrustify
2020-06-19 09:16:24 +02:00
Francisco Molina
15bbd95b6a
cpu/sam0_common/rtt: add configurable RTT_FREQUENCY
2020-06-19 09:16:24 +02:00
Francisco Molina
36baec4512
cpu/samd5x: add unified rtt configuration
2020-06-19 09:16:23 +02:00
Francisco Molina
f41b43e263
cpu/saml21: add unified rtt configuration
2020-06-19 09:16:23 +02:00
Francisco Molina
bcfe4bac0b
cpu/saml1x: add unified rtt configuration
2020-06-19 09:16:22 +02:00
Francisco Molina
eefb3fa555
cpu/samd21: add unified rtt configuration
2020-06-19 09:16:22 +02:00
Benjamin Valentin
5c3ae77df9
cpu/sam0_common: UART: allow RX only configuration
2020-06-19 00:33:50 +02:00
Leandro Lanzieri
8cc1fa4ce1
cpu/efm32: Add Kconfig symbols
2020-06-18 16:39:54 +02:00
Leandro Lanzieri
bb021f9e8e
cpu/efm32/efr32mg1p: Add Kconfig symbols
2020-06-18 16:39:53 +02:00
Leandro Lanzieri
d578adf845
cpu/efm32/efr32mg12p: Add Kconfig symbols
2020-06-18 16:39:53 +02:00
Leandro Lanzieri
89342b3aa8
cpu/efm32/efm32pg1b: Add Kconfig symbols
2020-06-18 16:39:53 +02:00
Leandro Lanzieri
777571a9e9
cpu/efm32/efm32pg12b: Add Kconfig symbols
2020-06-18 16:39:52 +02:00
Leandro Lanzieri
45c6d27cb5
cpu/efm32/efm32lg: Add Kconfig symbols
2020-06-18 16:39:52 +02:00
Leandro Lanzieri
4f3ec84c42
cpu/efm32/efm32gg: Add Kconfig symbols
2020-06-18 16:39:49 +02:00
Dylan Laduranty
00b14cce27
Merge pull request #14106 from benpicco/cpu/saml1x/pm_deep_flag
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cpu/saml1x: pm: set deep flag
2020-06-17 22:02:34 +02:00
Dylan Laduranty
6bf0a41399
Merge pull request #13600 from benpicco/sam0-gpio
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cpu/sam0_common: GPIO IRQ optimizations
2020-06-17 21:23:19 +02:00
Leandro Lanzieri
67ab640caf
cpu/atmega2560: Add Kconfig symbols
2020-06-17 12:44:30 +02:00
Francisco
112ff81f3e
Merge pull request #14176 from leandrolanzieri/pr/kconfig/atmega_boards_symbols
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boards/atmega328p-based: Model features in Kconfig
2020-06-17 12:22:31 +02:00
07c78efc83
Merge pull request #14285 from fjmolinas/pr_uart_nb_race
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sam0/stm32: fix possible uart_nonblocking deadlock
2020-06-17 12:14:25 +02:00
Francisco
4c05c0207f
Merge pull request #14300 from benpicco/cpu/sam0_common/uart_txinv
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cpu/sam0_common: UART: implement inverted RX & TX
2020-06-17 11:44:46 +02:00
Leandro Lanzieri
981aecf9cc
cpu/atmega328p: Add Kconfig symbols
2020-06-17 10:52:24 +02:00
Leandro Lanzieri
19bdb11548
cpu/atmega_common: Add Kconfig symbols
2020-06-17 10:52:23 +02:00
Francisco
5bb8c4b303
Merge pull request #14296 from leandrolanzieri/pr/cpu/adapt_kconfig_classification
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cpu/kconfig: Rename CPU classification symbols
2020-06-17 10:26:20 +02:00
Bas Stottelaar
219f631d20
Merge pull request #14233 from benemorius/pr/efm32-lfrco-jitter
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cpu/efm32: disable default LFRCO options that break LEUART > 1800 baud
2020-06-17 10:23:49 +02:00
Francisco Molina
80d682becd
cpu/sam0: avoid deadlock on nonblocking write
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If a write to a full tsrb is attempted with disabled interrupts
or in a interrupt then a deadlock will occure. To avoid this make
space in the ringbuffer by synchronously writing to uart.
2020-06-17 10:01:21 +02:00
Francisco Molina
09f0fd4526
cpu/stm32: avoid deadlock on nonblocking write
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If a write to a full tsrb is attempted with disabled interrupts
or in a interrupt then a deadlock will occure. To avoid this make
space in the ringbuffer by synchrnously writing to uart.
2020-06-17 10:01:21 +02:00
Francisco Molina
0b8adb2d27
cpu/sam0-stm32/uart: rename tx buf size to UART_TXBUF_SIZE
2020-06-17 10:01:20 +02:00
Francisco Molina
dd331c91d3
cpu/stm32/uart: enable irq for non blocking uart
2020-06-17 10:01:19 +02:00
Thomas Stilwell
e987abe9fc
cpu/efm32: disable default LFRCO options that break LEUART > 1800 baud
2020-06-17 01:47:29 -05:00
Benjamin Valentin
585dc15f99
cpu/sam0_common: UART: implement inverted RX & TX
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The UART TX and TX lines on SAMD5x and SAML1x can be inverted.
However, the flags don't do exactly what one would expect.
See errata 2.18.5: SERCOM-UART: TXINV and RXINV Bits Reference:
> The TXINV and RXINV bits in the CTRLA register have inverted functionality.
>
> Workaround:
> In software interpret the TXINV bit as a functionality of RXINV, and conversely,
> interpret the RXINV bit as a functionality of TXINV.
2020-06-16 22:55:37 +02:00
Dylan Laduranty
5e625adcf5
Merge pull request #12132 from ant9000/pr/saml21_usbdev_48mhz_clock
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cpu/saml21: enable 48mhz clock for usbdev
2020-06-16 21:02:41 +02:00
Leandro Lanzieri
d87f0cc66b
cpu/kconfig: Rename CPU classification symbols
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This removes the `CPU_FAMILY` and `CPU_SERIES` common CPU symbols and
adds `CPU_FAM` instead.
2020-06-16 14:27:27 +02:00
Leandro Lanzieri
2c4c04d11b
cpu/cortexm_common: Unify Kconfig and Makefile arch identifiers
2020-06-16 12:05:41 +02:00
Leandro Lanzieri
5dc29886b3
cpu/kinetis: Include CPU information in Makefile.features
2020-06-16 12:05:41 +02:00
Leandro Lanzieri
649017f0b2
cpu/cortexm_common: Rename arch_cortexm feature to cpu_core_cortexm
2020-06-16 12:05:41 +02:00
Leandro Lanzieri
4d65bc8e0a
cpu: Rename CPU_ARCH to CPU_CORE
2020-06-16 12:05:40 +02:00
Francisco
b041221905
Merge pull request #13825 from kaspar030/cortexm_free_svc
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cpu/cortexm: "free" SVC
2020-06-16 10:31:09 +02:00
Antonio Galea
3076ee837d
cpu/saml21: add clock configuration for usbdev
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Co-authored-by: dylad <dylan.laduranty@mesotic.com>
2020-06-15 11:52:13 +02:00
benpicco
1992f57765
Merge pull request #14261 from bergzand/pr/sam0_common/spi_dma
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sam0_common: Make SPI peripheral DMA compatible
2020-06-14 18:25:37 +02:00
60f4502e6c
cpu/sam0_common: Make SPI peripheral DMA compatible
2020-06-14 14:56:20 +02:00
22c8788b58
sam0_common/dma: Rename len to num
2020-06-14 11:51:36 +02:00
02b2b58358
sam0_common: Add additional documentation on DMA usage
2020-06-14 11:48:43 +02:00
7a8566c391
sam0_common/dma: Mark src parameter as const
2020-06-13 21:02:04 +02:00
benpicco
74299a2b03
Merge pull request #14260 from bergzand/pr/sam0_common/dma_periph
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sam0_common: Add DMA peripheral driver
2020-06-12 21:18:31 +02:00
ec1d575e7c
cpu/saml1x: Add DMA peripheral to init
2020-06-12 20:04:05 +02:00
4ef0b85495
cpu/saml21: Add DMA peripheral to init
2020-06-12 20:04:05 +02:00
73c8911e62
cpu/samd5x: Add DMA peripheral to init
2020-06-12 20:04:05 +02:00
5dc1d87f74
cpu/samd21: add DMA peripheral to init
2020-06-12 20:04:05 +02:00
6be1b27bbb
sam0_common: Add DMA peripheral driver
2020-06-12 20:04:05 +02:00
benpicco
8ed8775c8e
Merge pull request #14269 from benpicco/cpu/sam0_common/timer_drop_prescaler
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cpu/sam0_common: drop prescaler from timer config
2020-06-12 14:16:59 +02:00
ac8e27aab6
Merge pull request #14247 from fjmolinas/pr_stm32f1_nb
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cpu/stm32: add non blocking uart
2020-06-11 21:40:27 +02:00
Benjamin Valentin
54b57bd97f
cpu/sam0_common: drop prescaler from timer config
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since c05984b341
2020-06-11 19:29:43 +02:00
Akshai M
6450d9989e
gnrc/pktbuf : Set Kconfig defaults and conditions
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Set Kconfig defaults for CPU and conditions to avoid
conflict with CFLAGS
Co-authored-by: Leandro Lanzieri <leandro.lanzieri@haw-hamburg.de>
2020-06-11 14:47:27 +05:30
