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Commit Graph

6669 Commits

Author SHA1 Message Date
50cf93c719
Merge pull request #15718 from bergzand/pr/rv32i/fe310_rv32i_refactor
riscv_common: Refactor common fe310 code to riscv_common
2021-02-08 10:27:41 +01:00
2692957c0e
riscv_common: Refactor common fe310 code to riscv_common 2021-02-05 09:32:19 +01:00
b666b78602
Merge pull request #15914 from fjmolinas/pr_stm32_flashpage_fix_per
cpu/stm32/flashpage: reset PER after erase
2021-02-03 10:21:04 +01:00
Francisco
3b2a55a923
Merge pull request #15865 from benpicco/pm_layered-default
cpu: make pm_layered a DEFAULT_MODULE
2021-02-03 08:17:29 +01:00
Francisco Molina
3d68406c5b
cpu/stm32/flashpage: reset PER after erase 2021-02-02 11:42:09 +01:00
Benjamin Valentin
4095eac9f2 cpu: mips32r2_common: set BITARITHM_HAS_CLZ
The MIPS ISA implements CLZ:

https://ti.tuwien.ac.at/cps/teaching/courses/cavo/files/MIPS32-IS.pdf

For `tests/periph_gpio` this shaves off 20 bytes on `6lowpan-clicker`.
2021-02-02 11:14:38 +01:00
Benjamin Valentin
c788fe130f cpu/mips_pic32_common: GPIO: use bitarithm_test_and_clear() 2021-02-02 11:14:37 +01:00
benpicco
837b55fc17
Merge pull request #15420 from bergzand/pr/stm32f4/flashpage_support
stm32f{2,4,7}: Initial flashpage support
2021-02-01 19:23:51 +01:00
b6e80bf487
stm32f4: Initial flashpage support 2021-02-01 18:23:05 +01:00
benpicco
efd8afd3ab
Merge pull request #15899 from OTAkeys/pr/stm32-fix-exti
cpu/stm32/gpio: fix EXTI flag clearing
2021-02-01 18:22:25 +01:00
Leandro Lanzieri
fcafb89671
Merge pull request #15893 from benpicco/cpu/kinetis-float
cpu/kinetis: enable floating point support
2021-02-01 15:48:35 +01:00
Francisco
b9ebeccff2
Merge pull request #15895 from bergzand/pr/stm32/expose_ram
stm32: Resolve RAM size to bytes
2021-02-01 14:09:24 +01:00
Vincent Dupont
3e8e109e8b cpu/stm32/gpio: fix EXTI flag clearing
In case a non-gpio EXTI (>= 16) is pending, the isr_exti() used to clear
the flag and try to call a callback, which was out-of-bouds, thus
generating a hard fault.
This fixes it by masking the pending_isr variables with 0xFFFF.
2021-02-01 13:30:48 +01:00
Benjamin Valentin
2ffd7b4261 cpu/kinetis: enable floating point support
I think this CPU was added before RIOT had support for the FPU on
Cortex-M4F, this should now have been long fixed.

Advertise the FPU on these CPUs.
2021-02-01 12:18:13 +01:00
118643ab2d
stm32: Resolve RAM size to bytes
The ram size is exposed as macro value and available for use in code.
For the stm32 it has a value in kilobytes suffixed with 'k'. This is
less than optimal for usage in arithmetic. This commit modifies the
value to bytes so that it can be used in preprocessor magic
2021-02-01 10:53:40 +01:00
benpicco
e87874ae54
Merge pull request #15689 from iosabi/qn908x_spi
cpu/qn908x: Implement blocking SPI support
2021-01-31 18:35:13 +01:00
iosabi
dfdd076125 cpu/qn908x: Implement blocking SPI support.
This patch implements the basic support the last of the FLEXCOMM modes,
Serial Peripheral Interface, in a simple blocking mode with busy wait,
which is enough to test all the SPI functionality end-to-end.

Tested reading and writing registers on a SPI peripheral, and checked
with the oscilloscope that the frequencies were as expected.

Results from `tests/periph_spi`:

```
> init 0 0 2 -1 0
SPI_DEV(0) initialized: mode: 0, clk: 2, cs_port: -1, cs_pin: 0
> bench

 1 - write 1000 times 1 byte:			16002	16009
 2 - write 1000 times 2 byte:			18001	18008
 3 - write 1000 times 100 byte:		802000	802007
 4 - write 1000 times 1 byte to register:	24003	24010
 5 - write 1000 times 2 byte to register:	26001	26008
 6 - write 1000 times 100 byte to register:	810001	810008
 7 - read 1000 times 2 byte:			23003	23009
 8 - read 1000 times 100 byte:		807002	807009
 9 - read 1000 times 2 byte from register:	32002	32009
10 - read 1000 times 100 byte from register:	816002	816009
11 - transfer 1000 times 2 byte:		23003	23009
12 - transfer 1000 times 100 byte:		807003	807010
13 - transfer 1000 times 2 byte to register:	32003	32009
14 - transfer 1000 times 100 byte to register:816002	816009
15 - acquire/release 1000 times:		7222	7228
-- - SUM:					5059250	5059351

```
2021-01-31 16:27:20 +00:00
iosabi
e085232da4 cpu/qn908x: Fix BOARD_HAS_ADC_PA06_CAP usage.
The macro was moved from Kconfig to the periph_cpu.h which means that
the macro name needed to be updated to BOARD_HAS_ADC_PA06_CAP instead
of CONFIG_BOARD_HAS_ADC_PA06_CAP.
2021-01-30 23:30:43 +00:00
iosabi
965ebaa15b cpu/qn908x: Implement ADC support
The ADC in the QN908x cpu offers multiple options for ADC conversion
using up to 8 external pins, one external reference pin and some
internal signals like a 1.2V reference, Vss, Vcc and an internal
temperature monitor.

This patch implements support for sampling ADC values from the ADC lines
defined in the board configuration. Some configurations are really
always present and don't require a board configuration, like the Vcc or
internal temperature monitor but to coexist with other board ADC line
options they are only set as part of the board configuration.
2021-01-30 17:25:09 +00:00
Hauke Petersen
deafa9074a cpu/nrf/radio/nrfble: request HFXO clock source 2021-01-29 11:10:15 +01:00
Hauke Petersen
11a914ed8a cpu/nrf/radio/nrfmin: request HFXO clock source 2021-01-29 11:10:15 +01:00
Hauke Petersen
cea6d8dd2d cpu/nrf/radio/nrf802154: request HFXO clock source 2021-01-29 11:10:15 +01:00
Hauke Petersen
9d1692c45a cpu/nrf5x: allow to request/release HFXO clk src 2021-01-29 11:10:15 +01:00
Dylan Laduranty
1d0dbb4626
Merge pull request #15846 from benpicco/cpu/sam0_common-spi_fixes
cpu/sam0_common: SPI: MOSI only operation & fix for adafruit-itsybitsy-m4
2021-01-28 09:26:28 +01:00
Benjamin Valentin
f12a82e4f9 cpu/stm32: use common pm_off() function
The code is identical to the one found in sys/pm_layered/pm.c
2021-01-27 14:07:22 +01:00
Benjamin Valentin
9c1455d55f cpu: make pm_layered a DEFAULT_MODULE
Allow to disable pm_layered in the bootloader to save some ROM.
2021-01-27 13:21:20 +01:00
ce97e9d8ce
Merge pull request #15859 from fjmolinas/pr_newlib_feature
treewide: model newlib as a FEATURE
2021-01-27 10:06:08 +01:00
Francisco Molina
63a2a6ce1b
treewide: model newlib as a FEATURE 2021-01-27 09:24:25 +01:00
Benjamin Valentin
31bf0c5257 cpu/sam0_common: SPI: only mux MISO on spi_acquire() 2021-01-26 21:42:06 +01:00
Benjamin Valentin
b894b280f4 cpu/samd21: update doc.txt with supported MCUs
SAMD10, SAMD20, SAMD21, SAMR21 all belong to the same family/generation
of Atmel MCUs, they are all supported by `cpu/samd21`.
2021-01-26 19:23:52 +01:00
benpicco
98726ded6d
Merge pull request #14662 from benpicco/cpu/samd20
cpu/samd21: add support for SAMD20 & SAM D20 Xplained Pro board
2021-01-26 19:14:36 +01:00
b3ffb690b1
Merge pull request #15857 from bergzand/pr/fe310/remove_nanostubs
cpu/fe310: Use newlib_syscalls_default stub implementations
2021-01-26 14:50:24 +01:00
128423edc6
cpu/fe310: Use newlib_syscalls_default stub implementations
This switches the fe310 to use the common newlib_syscalls_default
implementation.
2021-01-26 13:42:52 +01:00
Marian Buschsieweke
38188017a8
Merge pull request #15610 from maribu/stm32-ethernet-rx-timestamp
drivers/stm32_eth: add RX timestamps
2021-01-26 13:32:19 +01:00
Marian Buschsieweke
62aa3d103f
cpu/stm32/periph_eth: RX Timestamps 2021-01-26 10:44:04 +01:00
Francisco
de9f29cf42
Merge pull request #15835 from leandrolanzieri/pr/makefile/fix_default_modules_in_usemodules
Makefile.include: avoid recursive expansion of USEMODULE
2021-01-25 21:50:03 +01:00
87cd41a6d1
Merge pull request #15657 from aabadie/pr/cpu/stm32_merge_clock_headers
cpu/stm32: merge clock source selection headers
2021-01-25 13:57:05 +01:00
49a3592f92
Merge pull request #15849 from benpicco/cpu/stm32f7-adc
cpu/stm32: add periph_adc for STM32F7
2021-01-25 13:12:22 +01:00
5fef40ab5a
cpu/stm32/clk: cleanup common clock configuration 2021-01-25 11:46:35 +01:00
dfed1b0567
cpu/stm32: merge g0 and g4 clock configuration headers 2021-01-25 11:46:34 +01:00
0aadf367cc
cpu/stm32: rework common clock source selection header 2021-01-25 11:46:34 +01:00
Francisco
947c63666e
Merge pull request #15834 from leandrolanzieri/pr/cpu/stm32/kconfig_features_conflict_fix
cpu/stm32/kconfig: fix rtt/rtc error symbol
2021-01-25 10:15:32 +01:00
Leandro Lanzieri
2e2dcd5c27
cpu/msp430: move default module to Makefile.default 2021-01-25 09:17:00 +01:00
AravindKarri
63252d17c0 cpu/stm32/adc_f4: add support for stm32f7 2021-01-24 22:30:49 +01:00
Benjamin Valentin
00a467e86d cpu/sam0_common: SPI: allow to only configure MOSI/CLK
Some slave devices (e.g. LED strips) don't have a back-channel and
will only need MOSI and CLK.
2021-01-24 17:51:44 +01:00
Leandro Lanzieri
e5aca465bd
cpu/stm32/kconfig: fix rtt:rtc error symbol
It only exists conflict between the usage of RTC and RTT on the F1
family, but the error symbol was being set for all of them. This fixes
the issue.
2021-01-23 09:59:03 +01:00
b57b3d490d
cpu/fe310: Allow using immediates for ecall arguments
The mv instruction (which is usually implemented as `add rd, x0, r1`) is
changed to `add rd, x0, %input`. This can either be used as a load
immediate or as an move.

The code size grows by two bytes. This because GCC does not compress the
li instruction to the compressed version (even though this is possible).
2021-01-22 20:49:52 +01:00
896227ab08
cpu/fe310: Add used registers to clobbers 2021-01-22 20:49:17 +01:00
benpicco
46337efd93
Merge pull request #15783 from maribu/stm32_eth_fix_error_handling
cpu/stm32/periph_eth: fix error handling in send()
2021-01-22 20:25:25 +01:00
benpicco
4c403d6559
Merge pull request #15788 from bergzand/pr/core/inline_thread_yield_higher
core/thread: Allow for inline thread_yield_higher
2021-01-22 20:25:11 +01:00