Gunar Schorcht
e8af4f6d7a
boards/p-l496g-cell02: fix UART_DEV(2) configuration
2023-05-10 12:21:11 +02:00
fdacb1a118
boards/stm32: adapt I2C configuration where needed
2022-03-23 10:10:08 +01:00
796e127df9
boards/stm32: replace GPIO_UNDEF with SPI_CS_UNDEF
2022-01-06 12:34:09 +01:00
046394db91
p-l496g-cell02: add usbdev feature
2021-12-01 10:15:19 +01:00
39e06babf5
boards/stm32: use generic clk_conf.h header
2020-10-27 08:44:56 +01:00
9dd20c0ccb
cpu: boards: stm32l4/wb: use IS_USED for clock where possible
2020-09-08 18:42:42 +02:00
79e6d9df85
boards/stm32l4*: adapt to new clock configuration
2020-09-08 18:42:42 +02:00
95057a8aef
boards/stm32l4: rename common clock config header
2020-09-08 18:42:41 +02:00
2f3f1e0da2
p-l496g-cell02: remove obsolete spi_divtable include
2020-08-18 16:55:12 +02:00
7b9f435f70
boards/stm32l4: use common spi_divtable where possible
2020-08-07 12:25:18 +02:00
9cc338d29e
boards/nucleo-l4*: use shared clock configuration
2020-04-07 17:42:56 +02:00
Dylan Laduranty
a33e61e997
boards/stm32: update to use generic uart_hw_fc module
2020-03-10 14:34:11 +01:00
Yannick Gicquel
d37adee32d
boards/stm32-based: allow SPI signals routed on multiple alternate functions
...
There is no hardware limitation for custom boards based on STM32 to uses
SPI bus with signals coming from different PORT and alternate functions.
This patch allow alternate's function definition per pin basis, thus enable
the support of SPI bus signals routed on differents PORT.
Signed-off-by: Yannick Gicquel <ygicquel@gmail.com>
2019-10-25 06:27:41 +02:00
d1fef4803e
boards: add basic support for b-l496g-cell02
2019-08-09 08:26:17 +02:00
