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boards/stm32l4: use common spi_divtable where possible

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This commit is contained in:
Alexandre Abadie 2020-08-07 12:25:18 +02:00
parent b2c8270a40
commit 7b9f435f70
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GPG Key ID: 1C919A403CAE1405
7 changed files with 7 additions and 140 deletions
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21
boards/b-l475e-iot01a/include/periph_conf.h
View File

@ -21,6 +21,7 @@
#include "periph_cpu.h"
#include "l4/cfg_clock_80_1.h"
#include "cfg_spi_divtable.h"
#include "cfg_rtt_default.h"
#ifdef __cplusplus
@ -132,28 +133,8 @@ static const pwm_conf_t pwm_config[] = {
/**
* @name SPI configuration
*
* @note The spi_divtable is auto-generated from
* `cpu/stm32_common/dist/spi_divtable/spi_divtable.c`
* @{
*/
static const uint8_t spi_divtable[2][5] = {
{ /* for APB1 @ 20000000Hz */
7, /* -> 78125Hz */
5, /* -> 312500Hz */
3, /* -> 1250000Hz */
1, /* -> 5000000Hz */
0 /* -> 10000000Hz */
},
{ /* for APB2 @ 40000000Hz */
7, /* -> 156250Hz */
6, /* -> 312500Hz */
4, /* -> 1250000Hz */
2, /* -> 5000000Hz */
1 /* -> 10000000Hz */
}
};
static const spi_conf_t spi_config[] = {
{
.dev = SPI1,

21
boards/nucleo-l412kb/include/periph_conf.h
View File

@ -25,6 +25,7 @@
#include "periph_cpu.h"
#include "l4/cfg_clock_80_1.h"
#include "cfg_spi_divtable.h"
#include "cfg_i2c1_pb6_pb7.h"
#include "cfg_timer_tim2.h"
#include "cfg_rtt_default.h"
@ -93,28 +94,8 @@ static const pwm_conf_t pwm_config[] = {
/**
* @name SPI configuration
*
* @note The spi_divtable is auto-generated from
* `cpu/stm32_common/dist/spi_divtable/spi_divtable.c`
* @{
*/
static const uint8_t spi_divtable[2][5] = {
{ /* for APB1 @ 20000000Hz */
7, /* -> 78125Hz */
5, /* -> 312500Hz */
3, /* -> 1250000Hz */
1, /* -> 5000000Hz */
0 /* -> 10000000Hz */
},
{ /* for APB2 @ 40000000Hz */
7, /* -> 156250Hz */
6, /* -> 312500Hz */
4, /* -> 1250000Hz */
2, /* -> 5000000Hz */
1 /* -> 10000000Hz */
}
};
static const spi_conf_t spi_config[] = {
{
.dev = SPI1,

21
boards/nucleo-l432kc/include/periph_conf.h
View File

@ -23,6 +23,7 @@
#include "periph_cpu.h"
#include "l4/cfg_clock_80_1.h"
#include "cfg_spi_divtable.h"
#include "cfg_i2c1_pb6_pb7.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2.h"
@ -90,28 +91,8 @@ static const pwm_conf_t pwm_config[] = {
/**
* @name SPI configuration
*
* @note The spi_divtable is auto-generated from
* `cpu/stm32_common/dist/spi_divtable/spi_divtable.c`
* @{
*/
static const uint8_t spi_divtable[2][5] = {
{ /* for APB1 @ 20000000Hz */
7, /* -> 78125Hz */
5, /* -> 312500Hz */
3, /* -> 1250000Hz */
1, /* -> 5000000Hz */
0 /* -> 10000000Hz */
},
{ /* for APB2 @ 40000000Hz */
7, /* -> 156250Hz */
6, /* -> 312500Hz */
4, /* -> 1250000Hz */
2, /* -> 5000000Hz */
1 /* -> 10000000Hz */
}
};
static const spi_conf_t spi_config[] = {
{
.dev = SPI1,

21
boards/nucleo-l433rc/include/periph_conf.h
View File

@ -21,6 +21,7 @@
#include "periph_cpu.h"
#include "l4/cfg_clock_80_1.h"
#include "cfg_spi_divtable.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2.h"
@ -91,28 +92,8 @@ static const pwm_conf_t pwm_config[] = {
/**
* @name SPI configuration
*
* @note The spi_divtable is auto-generated from
* `cpu/stm32_common/dist/spi_divtable/spi_divtable.c`
* @{
*/
static const uint8_t spi_divtable[2][5] = {
{ /* for APB1 @ 20000000Hz */
7, /* -> 78125Hz */
5, /* -> 312500Hz */
3, /* -> 1250000Hz */
1, /* -> 5000000Hz */
0 /* -> 10000000Hz */
},
{ /* for APB2 @ 40000000Hz */
7, /* -> 156250Hz */
6, /* -> 312500Hz */
4, /* -> 1250000Hz */
2, /* -> 5000000Hz */
1 /* -> 10000000Hz */
}
};
static const spi_conf_t spi_config[] = {
{
.dev = SPI2,

21
boards/nucleo-l476rg/include/periph_conf.h
View File

@ -25,6 +25,7 @@
#include "periph_cpu.h"
#include "l4/cfg_clock_80_1.h"
#include "cfg_spi_divtable.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_rtt_default.h"
@ -175,28 +176,8 @@ static const pwm_conf_t pwm_config[] = {
/**
* @name SPI configuration
*
* @note The spi_divtable is auto-generated from
* `cpu/stm32_common/dist/spi_divtable/spi_divtable.c`
* @{
*/
static const uint8_t spi_divtable[2][5] = {
{ /* for APB1 @ 20000000Hz */
7, /* -> 78125Hz */
5, /* -> 312500Hz */
3, /* -> 1250000Hz */
1, /* -> 5000000Hz */
0 /* -> 10000000Hz */
},
{ /* for APB2 @ 40000000Hz */
7, /* -> 156250Hz */
6, /* -> 312500Hz */
4, /* -> 1250000Hz */
2, /* -> 5000000Hz */
1 /* -> 10000000Hz */
}
};
static const spi_conf_t spi_config[] = {
{
.dev = SPI1,

21
boards/nucleo-l496zg/include/periph_conf.h
View File

@ -21,6 +21,7 @@
#include "periph_cpu.h"
#include "l4/cfg_clock_80_1.h"
#include "cfg_spi_divtable.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_rtt_default.h"
@ -129,28 +130,8 @@ static const pwm_conf_t pwm_config[] = {
/**
* @name SPI configuration
*
* @note The spi_divtable is auto-generated from
* `cpu/stm32_common/dist/spi_divtable/spi_divtable.c`
* @{
*/
static const uint8_t spi_divtable[2][5] = {
{ /* for APB1 @ 20000000Hz */
7, /* -> 78125Hz */
5, /* -> 312500Hz */
3, /* -> 1250000Hz */
1, /* -> 5000000Hz */
0 /* -> 10000000Hz */
},
{ /* for APB2 @ 40000000Hz */
7, /* -> 156250Hz */
6, /* -> 312500Hz */
4, /* -> 1250000Hz */
2, /* -> 5000000Hz */
1 /* -> 10000000Hz */
}
};
static const spi_conf_t spi_config[] = {
{
.dev = SPI1,

21
boards/p-l496g-cell02/include/periph_conf.h
View File

@ -21,6 +21,7 @@
#include "periph_cpu.h"
#include "l4/cfg_clock_80_1.h"
#include "cfg_spi_divtable.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2.h"
@ -121,28 +122,8 @@ static const i2c_conf_t i2c_config[] = {
/**
* @name SPI configuration
*
* @note The spi_divtable is auto-generated from
* `cpu/stm32_common/dist/spi_divtable/spi_divtable.c`
* @{
*/
static const uint8_t spi_divtable[2][5] = {
{ /* for APB1 @ 20000000Hz */
7, /* -> 78125Hz */
5, /* -> 312500Hz */
3, /* -> 1250000Hz */
1, /* -> 5000000Hz */
0 /* -> 10000000Hz */
},
{ /* for APB2 @ 40000000Hz */
7, /* -> 156250Hz */
6, /* -> 312500Hz */
4, /* -> 1250000Hz */
2, /* -> 5000000Hz */
1 /* -> 10000000Hz */
}
};
static const spi_conf_t spi_config[] = {
{
.dev = SPI1,