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Commit Graph

458 Commits

Author SHA1 Message Date
Marian Buschsieweke
b6a7815b48
cpu/sam0_common: implement periph_timer_query_freqs 2023-12-07 16:18:09 +01:00
Benjamin Valentin
1e9b1992df cpu/sam0_common: fix adc_continuous_sample() 2023-12-01 19:45:54 +01:00
benpicco
c93a5b84a3
Merge pull request #20020 from gompper/periph/freqm
drivers/include/periph: add FREQM peripheral driver
2023-11-27 16:06:52 +00:00
Urs Gompper
f352609c5e cpu/sam0_common: added peripheral FREQM configuration declaration 2023-11-23 21:00:16 +01:00
Urs Gompper
4c97a27826 cpu/sam0_common: implement freqm peripheral 2023-11-23 20:37:51 +01:00
Benjamin Valentin
5abdc7eb5f cpu/sam0_common: adc_continuous: fix uninitialized access 2023-11-10 18:35:09 +01:00
Benjamin Valentin
b289d69b4f cpu/sam0_common: implement periph_adc_continous 2023-11-10 12:10:49 +01:00
Marian Buschsieweke
edc43201db
tree-wide: fix typos in doc and comments
This should not change any generated binary
2023-10-16 12:17:48 +02:00
Gunar Schorcht
6ab9277234 cpu/sam0_common: add SDMMC support 2023-09-23 19:26:30 +02:00
Benjamin Valentin
4ebf58d47a cpu/sam0_common: gpio: warn if EXTI line is re-used 2023-09-04 16:03:40 +02:00
bors[bot]
2a4496b32a
Merge #19539 #19815 #19860 #19886
19539: drivers/periph_sdmmc: define a High-level SDIO/SD/MMC API and low-level SDMMC periperal driver interface r=benpicco a=gschorcht

### Contribution description

This PR provides a SDIO/SD/MMC Device API (SDMMC). It implements a SD host controller driver that provides a high-level functions using a low-level SDIO/SD/MMC peripheral driver for accessing

- MultiMediaCards (MMC) and Embedded MultiMediaCards (eMMC)
- SD Memory Cards (SD Cards) with Standard Capacity (SDSC), High Capacity (SDHC) or Extended Capacity (SDXC).

It supports:

- 1-bit, 4-bit and 8-bit data bus width
- Default Speed and High Speed
- Auto-CLK

The SDIO/SD/MMC device API (SDMMC) is divided into two parts:

1. The high-level API that implements the SD Host Controller driver and allows
   - to inititialize and identify different types of cards,
   - to access them either blockwise or bytewise,
   - to get information about the used card, and
   - to send single commands or application specific commands to the card.

2. The low-level SDIO/SD/MMC peripheral driver implements the low-level functions required by the high-level device API. It has to be implemented for each MCU.

### Limitations:

- Only one card per SDIO/SD/MMC device is supported.
- eMMCs specific features are not supported.
- UHS-I, UHS-II and UHS-III are not supported.

### Testing procedure

PR #19540, PR #19760 or PR #19786 is needed to test this PR.

### Issues/PRs references

Prerequisite for PR #19540
Prerequisite for PR #19760
Prerequisite for PR #19786

19815: cpu/sam0_common/periph/sdhc: busy waiting and clock fixes r=benpicco a=benpicco



19860: drivers/ft5x06: fix vendor ID for FT6xx6 and FTxxxx register addresses r=benpicco a=gschorcht

### Contribution description

This PR provides a fix of the vendor ID for FT6xx6 touch panel driver ICs and a fix of register addresses for FTxxxx.

According to the [Application Note for FT6x06 CTPM](https://cdn-shop.adafruit.com/datasheets/FT6x06_AN_public_ver0.1.3.pdf), the vendor ID of FT6x06 touch panel driver ICs is `0x11` instead of `0xcd`. Although there are no information found in the Web about the FT6x36, the FT6336U touch panel of a ESP32-S3 WT32 SC01 Plus is also working with `0x11` as vendor ID so that it seems that FT6x36 is also using `0x11` as vendor ID.

Figured out with a `stm32f723e-disco` board (revision D03). Without this PR, `tests/drivers/ft5x06` gives:
```
+------------Initializing------------+
[ft5x06] init: invalid vendor ID: '0x11' (expected: 0xcd)
[Error] Initialization failed
```
With this PR it works as expected.
```
+------------Initializing------------+
Initialization successful
main(): This is RIOT! (Version: 2023.10-devel-96-gbb9011-drivers/ft5x06_fix_vendor_id)
FT5x06 test application

+------------Initializing------------+
[ft5x06] init: configuring touchscreen interrupt
Initialization successful
1 touch detected
[ft5x06] read gesture_id '0x00'
Touch 1 - X: 151, Y:138
[ft5x06] read gesture_id '0x00'
```

Some background information found in the Web:

- According to the [STM32CubeF7](c20e6dd15b/Drivers/BSP/STM32F723E-Discovery/stm32f723e_discovery_ts.c (L24-L27)) the FRIDA LCD panel mounted on the `stm32f723e-disco` board either uses FT6x36 (prior revision D) or FT3x67 (revision D). However, the FT5x06 driver type for the card is defined as FT6x06, which does not seem correct: bb9011c3fb/boards/stm32f723e-disco/include/board.h (L59)
- According to the [STM32CubeF7](c20e6dd15b/Drivers/BSP/Components/ft6x06/ft6x06.h (L269-L270)), the vendor ID for FT6x36 should be `0xcd`. However, the FT6336U on ESP32-S3 WT32 SC01 Plus works with vendor ID `0x11`.
- The [Adafruit FT6206 library](95118cd983/Adafruit_FT6206.h (L28)) uses `0x11` as vendor id.
- The `stm32l496g-disco` board uses a FT6236 which has vendor ID `0xcd`.

So the information available on the web is confusing. Maybe, a better solution would be to accept `0x11` as well as `0xcd` as vendor ID for FT6xxx touch panels. Unfortunately, there are no documents available on the registers directly from FocalTech 😟 so it seems to be more speculation than knowledge.

### Testing procedure


### Issues/PRs references



19886: cpu/efm32: fix DAC configuration r=benpicco a=gschorcht

### Contribution description

The EFM32 MCU allows the reference voltage to be configured per DAC device, not per DAC channel. Also, the DAC reference voltage was defined in the configuration but not used anywhere.

At the moment we have only defined one board (`stwstk6220a`) that uses the DAC, so changing the configuration interface shouldn't be critical.

### Testing procedure

`tests/periph/dac` should still work for the `stwstk6220a`
```
BOARD=slwstk6220a make -j8 -C tests/periph/dac flash
```
I don't have a `stwstk6220a` board (EFM32 Series 0) so that I can't test it. I could only test it for the `sltb009a` board (EFM32 Series 1) with the change for VDAC in PR #19887.

### Issues/PRs references


Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2023-08-23 16:55:09 +00:00
Marian Buschsieweke
a4bf63e483
cpu/sam0_common: fix vendor header files
Drop type qualifiers in front of anonymous bit fields (padding for
reserved bits) for compatibility with `clang++`. A four line bash
script was added to ease fixing new vendor header files.
2023-07-18 12:24:07 +02:00
Benjamin Valentin
84ceea33d0 cpu/sam0_common/periph/sdhc: always use 25 MHz 2023-07-11 12:46:36 +02:00
Benjamin Valentin
0f555f061f cpu/sam0_common/periph/sdhc: disable clock when SD card is idle 2023-07-11 12:46:36 +02:00
Benjamin Valentin
bfe98a5885 cpu/sam0_common/periph/sdhc: fix clock generation 2023-07-11 12:46:36 +02:00
Gunar Schorcht
7899e8002e cpu/sam0_common/periph/sdhc: busy wait implementation 2023-07-11 12:46:36 +02:00
Benjamin Valentin
2a255ff3e8 cpu/sam0_eth: interrupt based link detection/auto-negotiation 2023-06-14 14:21:52 +02:00
Benjamin Valentin
04b895ce8a cpu/sam0_eth: use 64 bit bus 2023-06-05 11:42:55 +02:00
Benjamin Valentin
6b70459f77 cpu/sam0_eth: report link status 2023-06-05 11:42:55 +02:00
Benjamin Valentin
385d260069 cpu/sam0_eth: disable PHY when MAC is sleeping
- idle         13.88 mA
 - MAC off      11.48 mA
 - MAC+PHY off  10.73 mA
2023-05-31 14:08:50 +02:00
bors[bot]
f10426709c
Merge #19677 #19683
19677: boards/nucleo-l432k: provide three periph_timer instances r=maribu a=maribu

### Contribution description

- `cpu/stm32/periph_timer`: Generalize to also work with timers that do not have 4 channels
- `boards/common/stm32`: Add timer config for three timers based on TIM2, TIM15, and TIM16 (the three general-purpose timers of the STM32L4)
- `boards/nucleo-l432kc`: Make use of the new timer config


19683: cpu/sam0_eth: clean up init() r=maribu a=benpicco





Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2023-05-30 20:01:21 +00:00
Marian Buschsieweke
51127f674a
drivers/periph/rtc: improve doc on rtc_set_alarm
- point out behavior on denormalized time stamps
- use errno codes to indicate errors (and adapt the few instances of
  actual error handling to use them)
2023-05-30 17:41:36 +02:00
Benjamin Valentin
faf8be39c6 cpu/sam0_eth: clean up init()
- don't enable PHY twice
 - properly set NCFGR register
 - sam0_read_phy() does not return a signed value
2023-05-30 15:41:24 +02:00
d2433454b5
cpu/stm32: cpu/sam0_common: rename internal i2c _start function 2023-05-14 21:08:26 +02:00
Dylan Laduranty
b4b41bc899 sam0/usbdev: partial revert of #17086
Reverting theses changes from #17086 because it breaks SAM0 usbdev in master

Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-03-13 13:49:42 +01:00
10578c7895
cpu/sam0_common: Add stall functions to usbdev 2023-02-28 11:00:06 +01:00
bors[bot]
0dfc05c77c
Merge #19165 #19303
19165: cpu/sam0_common: adc: implement 16 bit mode by oversampling r=dylad a=benpicco



19303: dist/tools/insufficient_memory: Minor improvements r=benpicco a=maribu

### Contribution description

`create_makefile.sh`:
- address all shellcheck warnings
- make script POSIX shell compatible
- use nproc to set the number of parallel jobs to increase throughput
- print error messages when building fails
- run `make info-boards-supported` with `EXTERNAL_BOARD_DIRS=""` to avoid adding out-of-tree boards to `Makefile.ci`.
- classify output as "not supported" also when used features are blacklisted, not only when required features are missing

`add_insufficient_memory_board.sh`:
- classify output as "not supported" also when used features are blacklisted, not only when required features are missing

### Testing procedure

Run the script; it should still work.

### Issues/PRs references

None

Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-02-23 23:58:02 +00:00
Benjamin Valentin
470bee59a7 cpu/sam0_common: implement 16 bit mode by oversampling 2023-02-23 22:17:48 +01:00
Hendrik van Essen
9b0cf96ecd cpu/sam0_common: add PERIPH_I2C_MAX_BYTES_PER_FRAME due to I2C limitations 2023-02-15 11:56:21 +01:00
Benjamin Valentin
bfe2391148 cpu/sam0_common: fix static checks in periph_cpu_common.h 2023-01-18 01:54:34 +01:00
Benjamin Valentin
9dcb3991d2 cpu/sam0_common: move adc_res_t to common code 2023-01-17 17:18:07 +01:00
Marian Buschsieweke
86fdbd7054
core/lib: Add macros/utils.h header
The macros CONCAT(), MIN(), and MAX() are defined over and over again in
RIOT's code base. This de-duplicates the code by moving the macros to a
common place.
2023-01-07 09:47:44 +01:00
Teufelchen1
2629e81b3b cpu/sam0_common/periph: Fix compilation with LLVM 2022-12-19 15:19:51 +01:00
Antonio Galea
ee76e21c33 sam0_common: use size_t len for I2C transfers, as declared (fixes #19008) 2022-12-04 16:57:00 +01:00
Juergen Fitschen
268bdfec29 sam0/rtc_rtt: don't block until set_alarm has been propagated to periph
rtc_set_alarm() / rtt_set_alarm() are heavily used by ztimer during ISR. This will reduce time spent during ISR drastically. We trust that the peripheral is able to propagate the alarm asynchronously.
2022-11-16 17:02:19 +01:00
Juergen Fitschen
9c6f07f80a sam0/rtc_rtt: optimize pm_unblock/pm_block ping-pong during set alarm 2022-11-16 16:54:29 +01:00
Jue
24461b43f8 cpu/sam0/spi: generalize pm_layered interaction
In DMA mode SPI transfers are carried out by HW. We need to block certain pm modes during transfer.
2022-11-03 14:53:44 +01:00
Jue
db9263eeca cpu/sam0/rtc_rtt: integrate pm_layered 2022-11-03 14:53:43 +01:00
Jue
cc4e880aa8 cpu/sam0/rtc: remove overflow IRQ
Due to the RIOT_EPOCH of 2020 this overflow will happen in year 2084. It would be scary if IoT devices are still around then.

We can save RAM and ROM. Furthermore, this overflow handling should block BACKUP power mode in order to keep track of the reference year.
2022-11-03 14:52:38 +01:00
Jue
5866262122 cpu/sam0/usbdev: generalize pm_layered interaction
periph_cpu.h should define the required pm modes.
Additionally, some CPUs require a certain pm mode in USB IDLE mode.
2022-11-03 14:27:47 +01:00
Jue
220be1da7e cpu/sam0/gpio: integrate pm_layered 2022-11-03 14:27:47 +01:00
Jue
ae9190da30 cpu/sam0/uart: integrate pm_layered 2022-11-03 14:27:47 +01:00
Jue
aa5ad12f37 cpu/sam0/uart: skip uart_write() if uart isn't active
Otherwise we get stuck in an endless loop ...
2022-11-03 14:27:47 +01:00
Jue
cf5e207d62 cpu/sam0/uart: enable peripheral clock before accessing regs 2022-11-03 14:27:47 +01:00
Jue
4f25c1017d cpu/sam0/timer: integrate pm_layered 2022-11-03 14:27:47 +01:00
Benjamin Valentin
5843ff4127 cpu/sam0_common: ADC keep muxpos as legacy define 2022-10-04 15:45:25 +02:00
Benjamin Valentin
a7c0bf5341 cpu/sam0_common: adc: drop pin from adc_conf_chan_t 2022-09-27 19:36:10 +02:00
benpicco
baf1687951
Merge pull request #18146 from benpicco/cpu/sam0_common/adc-diffmode
cpu/sam0_common: adc: add support for differential mode
2022-09-27 17:34:07 +02:00
Benjamin Valentin
838a5e4bd3 netdev_drivers: make sure to signal LINK_UP at least once 2022-09-16 22:57:28 +02:00
Benjamin Valentin
66153a47cf treewide: fix typos 2022-09-15 23:31:40 +02:00