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cpu/sam0_eth: clean up init()
- don't enable PHY twice - properly set NCFGR register - sam0_read_phy() does not return a signed value
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84a3078a93
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@ -159,7 +159,7 @@ static void _init_desc_buf(void)
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GMAC->TBQB.reg = (uint32_t) tx_desc;
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}
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int sam0_read_phy(uint8_t phy, uint8_t addr)
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unsigned sam0_read_phy(uint8_t phy, uint8_t addr)
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{
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GMAC->MAN.reg = GMAC_MAN_REGA(addr) | GMAC_MAN_PHYA(phy)
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| GMAC_MAN_CLTTO | GMAC_MAN_WTN(0x2)
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@ -353,9 +353,6 @@ int sam0_eth_init(void)
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memset(rx_desc, 0, sizeof(rx_desc));
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memset(tx_desc, 0, sizeof(tx_desc));
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/* Enable PHY */
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gpio_set(sam_gmac_config[0].rst_pin);
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/* Initialize buffers descriptor */
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_init_desc_buf();
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/* Disable RX and TX */
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@ -373,9 +370,9 @@ int sam0_eth_init(void)
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/* Set TxBase-100-FD by default */
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/* TODO: implement auto negotiation */
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GMAC->NCFGR.reg |= (GMAC_NCFGR_SPD | GMAC_NCFGR_FD | GMAC_NCFGR_MTIHEN |
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GMAC_NCFGR_RXCOEN | GMAC_NCFGR_MAXFS | GMAC_NCFGR_CAF |
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GMAC_NCFGR_LFERD | GMAC_NCFGR_RFCS | GMAC_NCFGR_CLK(3));
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GMAC->NCFGR.reg = GMAC_NCFGR_SPD | GMAC_NCFGR_FD | GMAC_NCFGR_MTIHEN
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| GMAC_NCFGR_RXCOEN | GMAC_NCFGR_MAXFS | GMAC_NCFGR_CAF
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| GMAC_NCFGR_LFERD | GMAC_NCFGR_RFCS | GMAC_NCFGR_CLK(3);
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/* Enable all multicast addresses */
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GMAC->HRB.reg = 0xffffffff;
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