a858c980c4
cpu/stm32: fix remaining occurence of stm32f1 cpu family
2020-05-30 18:59:36 +02:00
2448b26a8b
cpu/stm32: fix issue with cpu feature name
2020-05-30 18:59:01 +02:00
Gabriel Moyano
52ddeeedb0
cpu/stm32: add qdec support for CPU_FAM_STM32F1
2020-05-29 21:11:54 +02:00
e35914612e
cpu/stm32: restore timer structure in vendor headers
2020-05-29 18:22:00 +02:00
2dc0ec00a1
cpu/stm32: adapt timer driver to common CMSIS timer structure
2020-05-29 18:22:00 +02:00
Benjamin Valentin
7c8f44a368
cpu/stm32: filter availability of RNG by CPU not by board.
...
The old limitation is not valid anymore, we can evaluate $(CPU_MODEL)
here directly.
The output of
make -C tests/periph_hwrng info-boards-supported | wc -w
remains the same.
2020-05-29 18:01:12 +02:00
Benjamin Valentin
e957f339d3
cpu/stm32: don't include usbdev_stm32.h in periph_cpu_common.h
...
`usbdev_stm32.h` will pull in `usb.h` which causes an error if
`USB_H_USER_IS_RIOT_INTERNAL` is not set.
Turns out this include is not needed, so just drop it.
2020-05-29 17:42:19 +02:00
benpicco
d0a5e0527b
Merge pull request #14168 from leandrolanzieri/pr/dist/buildsystem_check_features_provided
...
sam0_common: Move feature to Makefile.features and add buildsystem check
2020-05-29 17:27:07 +02:00
Leandro Lanzieri
106ab65d7b
cpu/saml21: Check CPU_MODEL to provide periph_hwrng
2020-05-29 16:19:00 +02:00
Leandro Lanzieri
12470f0ed2
cpu/sam0_common: Move periph_timer_periodic feature to Makefile.features
2020-05-29 11:13:59 +02:00
benpicco
49aef1b678
Merge pull request #13902 from benpicco/periph_timer_periodic
...
periph/timer: add timer_set_periodic()
2020-05-28 18:03:32 +02:00
Benjamin Valentin
c000a77658
cpu/atmega_common: implement timer_set_periodic()
2020-05-28 17:37:42 +02:00
Benjamin Valentin
8486e8c6d1
cpu/sam0_common: implement timer_set_periodic()
2020-05-28 17:37:42 +02:00
Benjamin Valentin
41a961be22
cpu/lpc2387: timer: implement timer_set_periodic()
2020-05-28 17:37:41 +02:00
benpicco
2183fb9273
Merge pull request #14155 from maribu/atmega_timer_cleanup
...
cpu/atmega*: Clean up timer configs
2020-05-28 17:33:31 +02:00
Marian Buschsieweke
fb722b1be7
cpu/atmega_common/periph_timer: Fix style
2020-05-28 16:27:08 +02:00
Marian Buschsieweke
dfa6863275
cpu/atmega{1281,2560}: Relocate default timer config
2020-05-28 16:27:08 +02:00
Marian Buschsieweke
044a3f9a4c
cpu/atmega1284p: Relocate default timer config
2020-05-28 16:27:07 +02:00
Marian Buschsieweke
200afc46fa
cpu/atmega328p: Relocate default timer config
2020-05-28 16:27:07 +02:00
Marian Buschsieweke
a950d6bbb6
cpu/atmega{128rfa1,256rfr2}: Relocate default timer config
2020-05-28 16:27:07 +02:00
Marian Buschsieweke
9138e48746
cpu/atmega32u4: Relocate default timer config
2020-05-28 16:27:06 +02:00
José Alamos
917cc66e48
Merge pull request #14162 from jia200x/pr/kconfig/cortex
...
Kconfig/armv7_m/cortexm: declare CPU_ARCH and CPU_CORE symbols
2020-05-28 14:59:37 +02:00
Leandro Lanzieri
be8289bd8d
cpu/cortexm_common: Add Kconfig symbols
...
This declares the architecture and core specific Kconfig symbols and the
features provided by it are selected.
2020-05-28 14:11:21 +02:00
Benjamin Valentin
7c11ae9dcc
cpu/lpc2387: use TIMER_CHANNELS for consistency
2020-05-28 13:24:06 +02:00
Benjamin Valentin
ec7ae668e2
cpu/sam0_common: define TIMER_CHANNELS
2020-05-28 13:24:06 +02:00
benpicco
8a2b089cd5
Merge pull request #14098 from maribu/atmega-timer
...
cpu/atmega_common: Fix periph_timer
2020-05-28 13:23:22 +02:00
Marian Buschsieweke
99bd1c318c
cpu/atmega_common/periph_timer: Add timer_set
...
Added a low level implementation of timer_set() that allows setting relative
timeouts as short as 0. This results in tests/periph_timer_short_relative_set
no passing.
2020-05-28 11:46:02 +02:00
Leandro Lanzieri
9d4582547f
cpu/Kconfig: Add a common symbol for the CPU Core
2020-05-28 10:08:34 +02:00
3244b26ab4
Merge pull request #14141 from aabadie/pr/cpu/stm32_fam_short
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cpu/stm32: use shorten name in CPU_FAM variable
2020-05-27 08:40:01 +02:00
8593176e29
Merge pull request #14140 from aabadie/pr/cpu/stm32_uid_base
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cpu/stm32: get the cpuid address from the UID_BASE constant defined in CMSIS
2020-05-27 08:39:35 +02:00
af8c4a32f6
Merge pull request #14147 from aabadie/pr/cpu/stm32f1_gpio_cleanup
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cpu/stm32f1: restore default gpio struct in CMSIS + adapt driver
2020-05-27 08:39:17 +02:00
31c6a225b2
Merge pull request #14145 from aabadie/pr/cpu/stm32_cleanup_exti
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cpu/stm32: restore default attribute names in exti structure for l4 and wb
2020-05-26 18:34:36 +02:00
cc9219c96e
cpu/stm32f1: adapt gpio driver and usage to CMSIS struct
2020-05-26 18:10:04 +02:00
Peter Kietzmann
4831300a6a
Merge pull request #14111 from leandrolanzieri/pr/cpu/kinetis/cleanup_dependencies
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cpu/kinetis: Move dependencies to Makefile.dep
2020-05-26 17:31:09 +02:00
c40f0a79bf
cpu/stm32: adapt rtc driver to default CMSIS exti structure
2020-05-26 17:29:37 +02:00
09c1afe9c5
cpu/stm32l4/wb: restore exti structure in vendor headers
2020-05-26 17:24:59 +02:00
97942ddbe6
cpu/stm32: adapt gpio driver to default CMSIS exti structure
2020-05-26 17:24:58 +02:00
Francisco
3ef40f3321
Merge pull request #14085 from maribu/atmega_irq
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cpu/atmega_common: Update to inlineable IRQ API
2020-05-26 16:33:07 +02:00
1a8f4d4f25
cpu/stm32f1: restore gpio struct to default in CMSIS header
2020-05-26 16:26:20 +02:00
61d3afcb63
cpu/stm32: remove hardcoded cpuid addr for f1
2020-05-26 15:44:50 +02:00
d78c955e50
cpu/stm32: remove hardcoded cpuid addr for f0
2020-05-26 15:44:50 +02:00
98a30ddadf
cpu/stm32: remove not needed periph_cpu.h for f3
2020-05-26 15:44:50 +02:00
4e33cebb3d
cpu/stm32: remove not needed periph_cpu.h for f7
2020-05-26 15:44:50 +02:00
bf01940ec7
cpu/stm32: use UID_BASE when possible
2020-05-26 15:44:50 +02:00
2313b85a8d
cpu/stm32: use UID_BASE from CMSIS when not defined
2020-05-26 15:44:50 +02:00
Marian Buschsieweke
9e566370bf
cpu/atmega_common: Fixed irq_arch implementation
...
The inline assembly implementation was badly in need of improvement.
- irq_disable() took 2 CPU cycles more than needed
- The current interrupt state was stored in a temporary register and
afterwards copied to the target register, rather than storing it in the
target register right away
- The lower bits of the state were cleared (as they have no meaning for the
interrupt status), but the API purposely never required such things from
implementations.
- irq_restore() took 5 CPU cycles. This was reduced to 3 CPU cycles (or 2 CPU
cycles in the best case)
2020-05-26 15:19:14 +02:00
7bfdd7718f
cpu/stm32: introduce CPU_FAM_SHORT variable
...
This variable contains the short cpu family name: f1, f2, etc.
2020-05-26 12:27:12 +02:00
8959274165
cpu/stm32: update vendor headers for f1
2020-05-26 11:43:45 +02:00
1e4da87aad
cpu/stm32: update vendor headers for f0
2020-05-26 11:43:44 +02:00
4f96cdbfcd
cpu/stm32: update stm32f334 vendor header
2020-05-26 11:43:44 +02:00
8a5ea2638b
cpu/stm32: update stm32f2 vendor headers
2020-05-26 11:43:44 +02:00
4f30f27e9d
cpu/stm32: update stm32f72x vendor headers
2020-05-26 11:43:37 +02:00
benpicco
3a30db4029
Merge pull request #13895 from gschorcht/cpu/esp32/fix_i2c_gpio_32_33
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cpu/esp32: fix GPIO32 and GPIO 33 as I2C pins
2020-05-25 22:37:35 +02:00
benpicco
a5836a6b27
Merge pull request #14128 from btcven/2020_05_24-cc13x2-i2c
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cc26xx_cc13xx: add periph_i2c implementation
2020-05-25 22:35:55 +02:00
benpicco
4f295a439b
Merge pull request #14131 from aabadie/pr/cpu/stmclk_cleanup
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cpu/stm32: move stmclk in its own module, remove useless ifdefs
2020-05-25 20:42:11 +02:00
46c4803eba
cpu/stm32: remove useless ifdef around DMA definitions
2020-05-25 13:23:20 +02:00
Jean Pierre Dudey
0f3393d61a
cpu/cc26x0: move i2c code to cc26xx_cc13xx
...
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-24 12:44:09 -05:00
Juergen Fitschen
df90176b1f
cpu/sam0_common/spi: move clk pin muxing into spi_acquire / spi_release
...
When the SPI peripheral is disabled, the output lines will become HIGH-Z.
If the clk pin is not pulled HIGH or LOW, connected SPI slaves will start drawing current expectedly.
2020-05-23 13:54:39 +02:00
63a79ae6e4
cpu/stm32: move stmclk in its own module, remove useless ifdefs
2020-05-22 21:21:08 +02:00
Benjamin Valentin
7803cc053c
cpu/stm32: rtc_f1.c: remove executable bit
2020-05-21 11:43:25 +02:00
138c0c2a54
stm32/dma: Remove superfluous asserts from DMA hot path
...
This commit removes a number of assert statements that should already
have been hit before. This is the reason that the assert in the
acquire function is left.
2020-05-21 11:34:54 +02:00
6793e7473b
stm32/dma: Move clear flags to acquire
2020-05-21 11:34:53 +02:00
977d227213
stm32/dma: Move FCR configuration to acquire function
...
The FCR register content might change during mem-to-mem DMA transfers,
Forcing it back in the acquire should be sufficient to ensure proper
operations.
2020-05-21 11:34:52 +02:00
d7b1b7fc7c
stm32/dma: Move one-time config to init function
2020-05-21 11:34:46 +02:00
767329ef25
Merge pull request #14021 from aabadie/pr/cpu/stm32_unique
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cpu/stm32: refactor to use a single directory
2020-05-21 11:05:38 +02:00
Leandro Lanzieri
2ad14e4242
cpu/kinetis: Move dependencies to Makefile.dep
2020-05-20 19:46:13 +02:00
Leandro Lanzieri
9f41acaac6
cpu/native: Move dependencies to Makefile.dep
2020-05-20 18:24:39 +02:00
Benjamin Valentin
e1ca9102d5
cpu/saml1x: pm: set deep flag
...
STANDBY mode is considered Deep Sleep on all other sam0 platforms.
Set it here too to be consistent.
2020-05-20 17:17:11 +02:00
b6d2231d6d
cpu/stm32: adapt Doxygen documentation
2020-05-20 13:39:11 +02:00
c50afaaf1b
cpu/stm32: remove redundant variables computations
2020-05-20 13:39:10 +02:00
36f6de3ce6
cpu/stm32: unify riotboot specific configuration
2020-05-20 13:39:10 +02:00
81e3e46fc5
cpu/stm32: remove old stm32xx_line.mk
2020-05-20 13:39:10 +02:00
5870e5d647
cpu/stm32: unify stm32_line.mk files
2020-05-20 13:39:10 +02:00
7d4b29530a
cpu/stm32*: remove old and unused stm32 dirs
2020-05-20 13:39:10 +02:00
5c810d8535
cpu/stm32: introduce unique directory for stm32 cpus
2020-05-20 13:39:10 +02:00
Vincent Dupont
8d9cc3f7e6
Merge pull request #14100 from OTAkeys/fix/exti_pr_clear_issue_upstream
...
cpu/stm32_common: fix issue while clearing EXTI->PR reg
2020-05-19 15:08:52 +02:00
b15c4ef418
Merge pull request #14069 from benpicco/cpu/nrf52-cleanup
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cpu/nrf52: update & fix vendor files, derive flash settings
2020-05-19 10:55:50 +02:00
Marian Buschsieweke
067a9c38ae
cpu/atmega_common: Fix race in periph_timer
...
As AVR is an 8 bit platform, special care needs to be taken when accessing 16
bit registers in an atomic fashion. This commit as just this care.
2020-05-18 21:22:31 +02:00
benpicco
9f707bf121
Merge pull request #14057 from bergzand/pr/nrf52/dma_spi
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nrf52: Implement EasyDMA-based SPI peripheral implemenation
2020-05-18 19:42:33 +02:00
16ff94b4fe
nrf5x: remove common nrf5x spi peripheral driver
2020-05-18 19:18:28 +02:00
99a59c5dbd
nrf5x: Extend gpio with exti channel retrieval
2020-05-18 19:17:29 +02:00
720ccad7dd
nrf52: Add EasyDMA-based SPI periph driver
2020-05-18 19:16:17 +02:00
1139c0737f
nrf52: add common SPI/I2C IRQ code
2020-05-18 19:14:56 +02:00
Abdulkerim Altuntas
578bd31908
cpu/stm32_common: fix issue while clearing EXTI->PR reg
...
Since the "EXTI->PR" is an "rc_w1" type of register, we need to be
careful when clearing our interrupt flag in the register. When there
are multiple interrupt flags set in the register, the "|=" operation
will mistakenly clear all pending interrupts instead of just ours.
2020-05-18 18:36:27 +02:00
Marian Buschsieweke
ba5844098d
cpu/atmega_common: Make irq_arch inline-able
...
- Moved irq_arch.c to irq_arch.h and marked all functions as
`__attribute__((always_inline)) static inline`
2020-05-17 18:41:11 +02:00
benpicco
cc44992abe
Merge pull request #12827 from maribu/atmega_pwm
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cpu/atmega_common/periph/pwm: Minor fix & cleanup
2020-05-16 22:26:58 +02:00
Marian Buschsieweke
506288791d
cpu/atmega_common/periph/pwm: Minor fix & cleanup
...
- On pwm_poweron, the PWM resolution was not restored. (A custom resolution was
only usable if, PWM channel 0 is not used. That configuration is not common,
so this bug was likely never triggered)
- Disabled a work around to prevent flickering:
- Previously, PWM was disconnected on level 0% and 100%
- This increases the run time of `pwm_set()`
- It prevents using the PWM for wave form generation via DDS, as the wave
noticeably jumps when reaching 0% or 100%
- Slightly reduces memory requirements: 2 Bytes of RAM, 112 Bytes of ROM
- Tested with avr-gcc 9.2.0 and LTO enabled
2020-05-16 20:43:31 +02:00
Benjamin Valentin
bdf40d5ffa
cpu/nrf52: fix NRF52811 vendor file
...
That `system_nrf52811.h` include must be removed.
2020-05-16 19:22:14 +02:00
Benjamin Valentin
d8a5f87aee
cpu/nrf52: update vendor files
2020-05-16 19:21:56 +02:00
benpicco
22b2f3664f
Merge pull request #14089 from maribu/atmega_cpu_cleanup
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cpu/atmega{_common,32u4}: Cleanup
2020-05-16 19:17:29 +02:00
Benjamin Valentin
e26ed32cd6
cpu/arm7_common: simplify irq_restore()
...
We do not manipulate the CPSR register outside of irq_%, so we can just
restore it's previous value and don't have to fiddle with the IRQ MASK bit.
See https://www.keil.com/pack/doc/CMSIS/Core_A/html/group__CMSIS__CPSR.html
2020-05-15 13:43:04 +02:00
Benjamin Valentin
8d0e902d38
cpu/arm7_common: add inlined header only def for irq_%
2020-05-15 13:43:04 +02:00
Marian Buschsieweke
2f3961690e
cpu/atmega_common: Add feature PUF_SRAM
...
The feature is implemented in `cpu/atmega_common`, so we can just enable it for
all ATmega boards.
2020-05-15 11:31:23 +02:00
Marian Buschsieweke
355b01ce98
cpu/atmega_common: Moved atmega_state to cpu.c
...
The global state flags should never have bin in irq_arch.c but in cpu.c. This
is not fixed.
2020-05-15 11:24:29 +02:00
Marian Buschsieweke
4d1a5b9256
cpu/atmega_common: Drop legacy include
...
Drop `#include "irq.h"` in `cpu.h`, which was there for a legacy work around.
A bunch of missing includes of `irq.h` materialized due to this and were
fixed.
2020-05-15 11:24:28 +02:00
Marian Buschsieweke
70f24edd03
cpu/atmega32u4: Clean up
...
- Drop duplicated `cpu.c` and `cpu_conf.h`: Those are already provided by
`cpu/atmega_common`.
- The higher values for default stack size of `cpu_conf.h` in
`cpu/atmega_common` results in three tests no longer fitting the available RAM
==> Updated the Makefile.ci to skip linking of those tests for the Arduino
Leonardo
2020-05-15 11:23:05 +02:00
3b0510f9bc
Merge pull request #14077 from maribu/esp32-external-board
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cpu/esp*: Allow compilation with external boards
2020-05-14 21:16:54 +02:00
Francisco
1f9d299492
Merge pull request #13196 from HendrikVE/shell-readline-refactor
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sys/shell: refactor readline function
2020-05-14 15:32:45 +02:00
Marian Buschsieweke
fc28ba5c08
cpu/esp8266: Allow compilation with external boards
...
Replace `$(RIOTBOARD)/$(BOARD)` with `$(BOARDDIR)`, which also works for
external boards.
2020-05-14 13:35:51 +02:00
Marian Buschsieweke
1dbcdd3d4b
cpu/esp32: Allow compilation with external boards
...
Replace `$(RIOTBOARD)/$(BOARD)` with `$(BOARDDIR)`, which also works for
external boards.
2020-05-14 13:32:19 +02:00
Kees Bakker
5ef4b1843a
Merge pull request #14032 from benpicco/cpu/sam0_common-rtc_cleanup
2020-05-13 22:54:31 +02:00
da2230df48
Merge pull request #13999 from fjmolinas/pr_cortexm_inline_irq
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cpu/cortexm_common: add inlined header only def for irq_%
2020-05-12 21:15:57 +02:00
8761c47e43
nrf51: move common SPI implementation
2020-05-12 19:15:25 +02:00
Benjamin Valentin
d34551e8da
cpu/nrf52: use vendor defines for flash size
...
We don't need to define FLASHPAGE_SIZE and FLASHPAGE_NUMOF ourself if
the BPROT peripheral is present.
Now why nrf52840 doesn't have it, I don't know, but for nrf52832 and
nrf23811 the values in BPROT_REGIONS_SIZE and BPROT_REGIONS_NUM match
the values manually provided here before.
2020-05-12 18:10:15 +02:00
Gunar Schorcht
fef3c101b7
Revert "cpu/esp_common: fix dependency of flash target on ELF file"
...
This reverts commit d0cc955394
2020-05-12 18:07:48 +02:00
Francisco Molina
b5e4224a6f
cpu/cortexm_common: remove special cortexm_sleep handle for stm32l152re
...
__set_PRIMASK(state) had been directly inlined to avoid a hardfault that
occured when branching after waking up from sleep with DBG_STANDBY,
DBG_STOP or DBG_SLEEP set in DBG_CR.
The hardfault occured when returning from the branch to irq_restore,
since the function is now inlined the branch does not happen either.
Refer to #14015 for more details.
2020-05-12 16:37:34 +02:00
Francisco Molina
4ad3164599
cpu/cortexm_common/irq_arch: fix irq_enable return type
2020-05-12 16:37:34 +02:00
Francisco Molina
cb5cbe7431
cpu/cortexm_common: add inlined header only def for irq_%
...
irq_% are not inlined by the compiler which leads to it branching
to a function that actually implement a single machine instruction.
Inlining these functions makes the call more efficient as well as
saving some bytes in ROM.
2020-05-12 16:37:34 +02:00
Benjamin Valentin
20a044c956
cpu/nrf52: fix nrf52811 interrupt vector table
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SPI1 and TWI0 share the same IRQ, not SPI1 and TWI1
2020-05-12 15:10:06 +02:00
Benjamin Valentin
d53bc7bf73
cpu/nrf52: add peripherals.h vendor files
...
Those make our lives much easier.
2020-05-12 14:52:06 +02:00
Benjamin Valentin
fb2f2c456f
cpu/nrf52: add nrf52811 vendor files
2020-05-12 14:49:26 +02:00
Philipp Blum
35dcf637f2
cpu/nrf52: add support for nrf52811
2020-05-10 17:10:33 +02:00
benpicco
0bbc86a379
Merge pull request #14041 from gschorcht/cpu/esp/fix_make_flash_dependency
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cpu/esp_common: fix the dependency of the flash image on the ELF file
2020-05-08 11:55:14 +02:00
Gunar Schorcht
d0cc955394
cpu/esp_common: fix dependency of flash target on ELF file
...
Flashing an ESP board first requires the creation of a flash image from the ELF file. This is realized in the `preflash` target. However, the `preflash` target only depends on the variable `BUILD_BEFORE_FLASH` but on the ELF file. Therefore, the variable `BUILD_BEFORE_FLASH` must be set to the ELF file to ensure that when using multiple make processes, the compilation of the ELF file is completed before the flash image is created.
2020-05-08 11:03:39 +02:00
Marian Buschsieweke
0fe24e1c8b
Merge pull request #13903 from benpicco/cpu/lpc2387/timer_pclk_scale
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cpu/lpc2387: timer: use lpc2387_pclk_scale()
2020-05-07 22:04:14 +02:00
fabian18
a3a1c160ee
mtd: Change API to return 0 on success
...
Returning the number of bytes written/read could return a negative integer
because a uint32_t is expected for the length in read()/write() operations.
2020-05-06 20:24:27 +02:00
Francisco Molina
bd3eff3537
cpu/esp32: switch from O2 to Os
...
In #12955 optimization was switched to O2 because with the '-Os'
option, the ESP32 hangs sporadically in 'tests/bench*' if
interrupts where disabled too early by benchmark tests.
Since it hasn't been reproduced since and in #13196 O2 was causing
un-explained hardfaults, since the aforementioned issue could not
be reproduced we switch back to Os by removing O2, as Os will be
used by default.
2020-05-06 18:46:43 +02:00
Benjamin Valentin
5481d8c73a
cpu/sam0_common: clean up formatting
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Make the code nicer to read.
2020-05-06 14:11:47 +02:00
Benjamin Valentin
e93c9a82f1
cpu/sam0_common: RTC INTFLAG are clear on write
...
Writing a 1 bit clears the interrupt flag, writing with |= is thus
uneccecary (and actually an error as this would clear *all* flags).
This cleanup was already done for rtt.c, but rtc.c missed out.
2020-05-06 14:05:12 +02:00
Francisco
cea0d1c532
Merge pull request #13421 from benpicco/cpu/sam0_common/i2c-deinit
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drivers/periph/i2c: add periph_i2c_reconfigure feature & implementation for sam0
2020-05-05 19:09:47 +02:00
5773db93f8
Merge pull request #14025 from fjmolinas/pr_nrf5x_rtt_conf
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boards/common/nrf5x: add configurable RTT_FREQUENCY
2020-05-05 17:46:05 +02:00
Benjamin Valentin
8c502322f4
cpu/sam0_common: i2c: implement the periph_i2c_reconfigure feature
...
This adds sam0 implementations for
- i2c_init_pins()
- i2c_deinit_pins()
- i2c_pin_sda()
- i2c_pin_scl()
2020-05-05 16:12:19 +02:00
Francisco Molina
409185c5ce
boards/common/nrf5x: add configurable RTT_FREQUENCY
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Adds: RTT_MAX_FREQUENCY, RTT_MIN_FREQUENCY & RTT_CLOCK_FREQUENCY
2020-05-05 14:52:55 +02:00
cab264a056
cpu/lm4f120: fix invalid doxygen group name
2020-05-05 14:08:32 +02:00
Semjon Kerner
cb228a44f2
Merge pull request #14002 from PeterKietzmann/pr_nrf5x_hwrng_biascorr
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cpu/nrf5x_common: enable bias correction in hwrng
2020-05-05 13:40:15 +02:00
benpicco
3c03394e1e
Merge pull request #13820 from francois-berder/pic32-gpio-irq
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cpu: mips_pic32_common: Implement GPIO IRQ
2020-05-04 18:36:48 +02:00
Marian Buschsieweke
ac246cfd10
cpu/msp430_common: Fix missing include
2020-05-04 10:58:36 +02:00
benpicco
fbae0a1117
Merge pull request #13901 from benpicco/cpu/sam0_common/timer_flex_freq
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cpu/sam0_common: timer: don't ignore frequency in timer_init()
2020-05-04 02:56:01 +02:00
benpicco
fab87d903c
Merge pull request #13991 from btcven/2020_04_30-osc
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cc26x2_cc13x2: add oscillator switching functions
2020-05-02 22:46:03 +02:00
Dylan Laduranty
57c1a49a82
Merge pull request #13957 from benpicco/cpu/samd21-pwm_flex
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cpu/samd21: PWM don't hard-code number of channels to 3
2020-05-02 20:52:56 +02:00
Martine Lenders
ad89680c40
Merge pull request #14004 from gschorcht/cpu/esp32/fix_newlib_nano_printf_float
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cpu/esp32: fix printf for float with newlib-nano
2020-05-02 20:43:00 +02:00
Dylan Laduranty
76870721fe
Merge pull request #13965 from benpicco/cpu/sam0_common/periph/dac
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cpu/sam0_common: implement periph/dac
2020-05-02 20:34:40 +02:00
Jean Pierre Dudey
4bf6a4db04
cc26x2_cc13x2: separate arrays with newline
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-02 13:25:41 -05:00
Jean Pierre Dudey
a66c693ad5
cc26x2_cc13x2: add oscillator switching functions
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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-02 13:25:41 -05:00
Jean Pierre Dudey
0aeed80eb0
cc26xx_cc13xx: add ROM Hard-API
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This is needed to switch the SCLK_HF source clock safely.
Note: these functions work on cc26x2_cc13x2 and cc26x0, but special care
needs to be taken when calling on cc26x0 some of these functions, as
ADDI_SEM needs to be taken.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-05-02 13:25:41 -05:00
Francois Berder
8db01ab9a0
cpu: mips_pic32_common: Implement GPIO IRQ
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Signed-off-by: Francois Berder <18538310+francois-berder@users.noreply.github.com>
2020-05-02 17:59:17 +01:00
Benjamin Valentin
bfb3d52a63
cpu/sam0_common: implement periph/dac
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The sam0 MCUs all have a DAC peripheral.
The DAC has a resulution of 10 or 12 bits and can have one or two
output channels.
The output pins are always hard-wired to PA2 for DAC0 and PA5 for DAC1
if it exists.
On the same54-xpro I would only get a max value of ~1V when using the
internal reference, so I configured it to use an external voltage reference.
The external reference pin is hard-wired to PA3, so you'll have to connect
that to 3.3V to get results.
2020-05-02 18:31:55 +02:00
Gunar Schorcht
5fbf74b203
cpu/esp32: fix printf for float with newlib-nano
2020-05-02 16:56:29 +02:00
PeterKietzmann
dd2d6b174e
cpu/nrf5x_common: enable bias correction in hwrng
2020-05-01 17:04:36 +02:00
Benjamin Valentin
c05984b341
cpu/sam0_common: timer: don't ignore frequency in timer_init()
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Now that we can query the GCLK frequency at run-time, there is no need
to implicitely hard-code the timer frequency in the config struct anymore.
2020-05-01 16:44:06 +02:00
benpicco
99e8b04921
Merge pull request #13812 from gschorcht/cpu/esp32/fix_newlib_nano
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cpu/esp32: use module newlib_nano
2020-05-01 14:40:02 +02:00
benpicco
4150afea00
Merge pull request #13749 from gschorcht/cpu/esp32/periph_rtt
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cpu/esp32: replace RTC implementation by RTT implementation
2020-05-01 14:14:01 +02:00
benpicco
c95e4c3b9e
Merge pull request #13816 from btcven/2020_04_02-setup-trim-device
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cc26x2_cc13x2: trim device registers on `cpu_init`.
2020-05-01 14:09:08 +02:00
Benjamin Valentin
89a145ab0c
cpu/lpc2387: clocks: minor style fix
2020-04-30 20:43:41 +02:00
Benjamin Valentin
c262c91561
cpu/lpc2387: PM: enable SLEEP & POWERDOWN mode
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We have to re-init PLL (and Flash) after wake from those modes.
2020-04-30 20:43:41 +02:00
Benjamin Valentin
3b257f9a5a
cpu/lpc2387: export functions to init PLL & MAM
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Those functions are needed after wake from lower sleep modes.
2020-04-30 20:43:41 +02:00
Jean Pierre Dudey
951a99dba3
cc26x2_cc13x2: add setup_trim_device function
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This function trims the necessary registers for the device to operate
normally.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:32:58 -05:00
Jean Pierre Dudey
dc1d2ace42
cc26xx_cc13xx: add ADI3 and masked access
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- Added ADI instruction offsets
- Added register banks and address bases for masked access (writes).
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:32:58 -05:00
Jean Pierre Dudey
92589c2129
cc26x2_cc13x2: update AON_PMCTL register bank
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- Updated documentation.
- Fixed offset of JTAGUSERCODE.
- Added necessary register values to perform startup trims.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
e2489ced97
cc26xx_cc13xx: add register values
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Add some register values needed to trim registers.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-04-29 18:16:45 -05:00
