Using `PROGRAMMER=bmp` has been proven to work reliably at least on
SAMD21, SAMD5x and SAML21.
Since using unsupported programmers is treated as a warning, this change
only reduces the noise in the shell a bit and is not a functional
change.
[1]: https://black-magic.org/supported-targets.html
For the other MCUs, we take the input register state instead of the
output register state when the pin is configured as input. Let's do
the same here, as this is a lot more useful and intuitive.
It turns out that the legacy GPIO API and GPIO LL may disagree on what
the GPIO base address is: GPIO LL will use the IOBUS as base address
no matter what, the legacy GPIO API will use the APB as base address
unless `periph_gpio_fast_read` is used.
If the APIs disagree, we need to do impedance matching.
This adds a delay between enabling the ADC and starting to sample
on the SAMD5x MCUs when the internal bandgap reference is used.
Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
This changes the API of xfa from
XFA(array_name, prio) type element_name = INITIALIZER;
to
XFA(type, array_name, prio) element_name = INITIALIZER;
this allows forcing natural alignment of the type, fixing failing tests
on `native64`.
Since https://github.com/RIOT-OS/RIOT/pull/20935 gpio_write()
uses a `bool` instead of an `int`. This does the same treatment for
`gpio_read()`.
This does indeed add an instruction to `gpio_read()` implementations.
However, users caring about an instruction more are better served with
`gpio_ll_read()` anyway. And `gpio_read() == 1` is often seen in
newcomer's code, which would now work as expected.
This formats the code to improve readability and apply the coding
convention. This is a whitespace only change that will not change
generated binaries.
The read_csr macro returns the CSR value as a `unsigned long`. However,
the format specifier presently treats it as a `uint32_t`. This causes
a -Wformat error to be emitted by Clang 18:
cpu/riscv_common/irq_arch.c:149:49: error: format specifies type 'unsigned int'
but the argument has type 'unsigned long' [-Werror,-Wformat]
149 | printf(" mepc: 0x%" PRIx32 "\n", read_csr(mepc));
In case both periph_gpio_irq and periph_gpio_ll_irq are used, the
periph_gpio_irq implementation now uses periph_gpio_ll_irq, so that
they can coexist.
clock.c: The MSP430 may need nop instructions after (and in some cases
even before) touching the global interrupt enable bit in the
status register. The assembler generates a warning when in
doubt. Those nops should not be needed in our cases, but maybe
it is better two waste flash for two instructions than having
to live with the warning.
cpu.c: drop unneeded include
The assumption that every MCU has this feature turned out wrong. Hence,
add a feature to allow testing for support of edge triggered IRQs on
both flanks.
