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Commit Graph

280 Commits

Author SHA1 Message Date
Benjamin Valentin
838a5e4bd3 netdev_drivers: make sure to signal LINK_UP at least once 2022-09-16 22:57:28 +02:00
Marian Buschsieweke
6790167a18
Merge pull request #18226 from benpicco/cpu_get_last_instruction
cpu: cpu_print_last_instruction() -> cpu_get_caller_pc()
2022-09-15 20:06:10 +02:00
Benjamin Valentin
ea917f4b07 cpu: cpu_print_last_instruction() -> cpu_get_caller_pc() 2022-09-15 10:49:56 +02:00
Gunar Schorcht
6386580b8f cpu/esp_common/freertos: lock/unlock mutex if scheduling is not active
If module `core_mutex_priority_inheritance` is enabled, the scheduling has to be active to lock/unlock the mutex/rmutex used by FreeRTOS semaphores. If scheduling is not active FreeRTOS semaphore function always succeed.
2022-09-02 08:54:31 +02:00
Gunar Schorcht
e1a613ac5c cpu/esp_common: improve thread safety for locking functions
For ESP32x, the operations on recursive locking variables have to be guarded by disabling interrupts to prevent unintended context switches. For ESP8266, interrupts must not be disabled, otherwise the intended context switch doesn't work when trying to lock a rmutex that is already locked by another thread.
2022-09-02 08:54:31 +02:00
Gunar Schorcht
1eb18c2949 cpu/esp_common: improve thread safety for locking functions
Dynamic allocation and initialization of the mutex used by a newlib locking variable must not be interrupted. Since a thread context switch can occur on exit from an ISR, the allocation and initialization of the mutex must be guarded by disabling interrupts. The same must be done for the release of such a locking variable.
2022-09-01 15:50:26 +02:00
Gunar Schorcht
270001a42e cpu/esp_common: move ESP32 specific locking variables to cpu/esp32 2022-09-01 15:09:58 +02:00
benpicco
2917c0f51e
Merge pull request #18506 from gschorcht/cpu/esp32/add_esp32s2_cpu_support
cpu/esp32: add support for ESP32-S2
2022-08-30 21:24:36 +02:00
Gunar Schorcht
d130f8cc8c cpu/esp_common: fix thread_arch.c for ESP32-S2 2022-08-30 15:08:39 +02:00
Gunar Schorcht
14edc937bf cpu/esp_common: add ESP32-S2 support in module esp_xtensa 2022-08-29 17:19:39 +02:00
Gunar Schorcht
06bb755c03 cpu/esp32: add ESP32-S2 support in peripheral drivers 2022-08-29 17:19:39 +02:00
Gunar Schorcht
b13bc776c2 cpu/esp_common/freertos: changes required for BLE 2022-08-26 21:16:09 +02:00
benpicco
5b6dff045a
Merge pull request #18510 from gschorcht/cpu/esp32/add_esp32c3_ble_support
cpu/esp32: enable BLE and NimBLE host support for ESP32-C3
2022-08-26 21:04:49 +02:00
benpicco
0fff68dc9b
Merge pull request #18504 from gschorcht/cpu/esp32/add_esp32s2_support_in_kconfig
cpu/esp32: add ESP32-S2 support in Kconfig
2022-08-24 20:30:48 +02:00
Gunar Schorcht
0574f463bb cpu/esp_common/freertos: changes required for BLE 2022-08-24 18:02:21 +02:00
Gunar Schorcht
8ee714cc9b cpu/esp*: cleanup of CPU_ARCH* and CPU_CORE* 2022-08-24 17:15:37 +02:00
Gunar Schorcht
35676ca712 cpu/esp_common: fix of blocking mechanism in FreeRTOS queus
When FreeRTOS semaphores, as required by ESP-IDF, are used together with `gnrc_netif`, RIOT may crash if `STATUS_RECEIVE_BLOCKED` is used as a blocking mechanism in the FreeRTOS adaptation layer. The reason for this is that `gnrc_netif` uses thread flags since PR #16748. If the `gnrc_netif` thread is blocked because of a FreeRTOS semaphore, and is thus in `STATUS_RECEIVE_BLOCKED` state, the `_msg_send` function will cause a crash because it then assumes that `target->wait_data` contains a pointer to a message of type `msg_t`, but by using thread flags it contains the flag mask. This situation can happen if the ESP hardware is used while another thread is sending something timer controlled to the `gnrc_netif` thread.

To solve this problem `STATUS_MUTEX_LOCKED` is used instead of `STATUS_RECEIVE_BLOCKED` and `STATUS_SEND_BLOCKED`
2022-08-24 09:05:25 +02:00
Gunar Schorcht
26956a9a2b cpu/esp_common: use BLE as netdev_default if nimble_netif is used
To reduce the required RAM in default configuration, the BLE interface is used as netdev_default instead of ESP-NOW. Further network interfaces can be enabled with the modules `esp_now`, `esp_wifi` or `esp_eth`.
2022-08-24 09:05:25 +02:00
Gunar Schorcht
cdc8a725a4 cpu/esp_common/freertos: changes required for BLE 2022-08-24 09:03:38 +02:00
benpicco
00ede8f7d2
Merge pull request #18421 from gschorcht/cpu/esp32/add_esp32s3_cpu_support
cpu/esp32: add support for ESP32-S3
2022-08-22 17:33:05 +02:00
Marian Buschsieweke
276ad5716a
sys/net/gnrc/netif: allow checking if a netdev is legacy or new API
A if `netdev_driver_t::confirm_send()` is provided, it provides the
new netdev API. However, detecting the API at runtime and handling
both API styles comes at a cost. This can be optimized in case only
new or only old style netdevs are in use.

To do so, this adds the pseudo modules `netdev_legacy_api` and
`netdev_new_api`. As right now no netdev actually implements the new
API, all netdevs pull in `netdev_legacy_api`. If `netdev_legacy_api` is
in used but `netdev_new_api` is not, we can safely assume at compile
time that only legacy netdevs are in use. Similar, if only
`netdev_new_api` is used, only support for the new API is needed. Only
when both are in use, run time checks are needed.

This provides two helper function to check for a netif if the
corresponding netdev implements the old or the new API. (With one
being the inverse of the other.) They are suitable for constant folding
when only new or only legacy devices are in use. Consequently, dead
branches should be eliminated by the optimizer.
2022-08-17 12:56:07 +02:00
Gunar Schorcht
945a960fa7 cpu/esp32: add ESP32-S3 support in peripheral drivers 2022-08-17 02:04:07 +02:00
Gunar Schorcht
d42b20d49f cpu/esp_common: changes for ESP32-S3 2022-08-17 02:04:07 +02:00
Gunar Schorcht
43d71f276d cpu/esp32: add ESP32-C3 support in peripheral drivers 2022-08-05 22:26:22 +02:00
benpicco
cf745e954e
Merge pull request #18387 from gschorcht/cpu/esp32/cleanup_spi_flash_mode
cpu/{esp8266,esp32}: cleanup of SPI Flash configuration
2022-08-05 12:24:45 +02:00
Gunar Schorcht
da83c30021 cpu/esp_common: add netdev_register for NETDEV_ESP_WIFI 2022-08-02 09:34:59 +02:00
Gunar Schorcht
b4fafef6e7 cpu/esp_common: replace FLASH_MODE_* by CONFIG_*FLASHMODE_* defines
The former FLASH_MODE_{DOUT,DIO,QOUT,QIO} defines are replaced by the corresponding CONFIG_FLASHMODE_{DOUT,DIO,QOUT,QIO} and CONFIG_ESPTOOLPY_FLASHMODE_{DOUT,DIO,QOUT,QIO} as used by the ESP-IDF. This is also needed for the migration of defining flash mode in Kconfig.
2022-08-01 15:17:33 +02:00
Gunar Schorcht
cd3c053d32 cpu/esp32: qout mode is no longer required for SPI RAM 2022-08-01 15:11:11 +02:00
benpicco
8d42808f52
Merge pull request #18341 from gschorcht/cpu/esp32/add_esp32c3_makefile_support
cpu/esp32: add ESP32-C3 support in makefiles
2022-07-21 08:04:42 +02:00
benpicco
4ef8b34b8e
Merge pull request #18335 from gschorcht/cpu/esp32/cleanup_esp_log_for_esp32x_socs
cpu/esp32: cleanup of esp_log_write
2022-07-21 05:02:51 +02:00
Gunar Schorcht
0645371400 cpu/esp_common: rename architecture to riscv_esp32 to rv32 2022-07-20 17:18:56 +02:00
Gunar Schorcht
d6ecb74f96 cpu/esp32: cleanup of esp_log_write 2022-07-20 08:54:15 +02:00
Gunar Schorcht
a24ddb8517 cpu/esp*: cleanups mainly to reduce the vera++ warnings 2022-07-20 06:29:43 +02:00
benpicco
ad1d393214
Merge pull request #18319 from gschorcht/cpu/esp_common/module_xtensa_dependency_change
cpu/esp_common: MODULE_XTENSA has to depend on HAS_ARCH_ESP_XTENSA
2022-07-18 23:43:33 +02:00
benpicco
e1bc1767af
Merge pull request #18260 from gschorcht/cpu/esp32/add_riscv_platform_code
cpu/esp32: add platform code for RISC-V based ESP32x SoCs
2022-07-18 17:43:02 +02:00
benpicco
263b918d7c
Merge pull request #18316 from gschorcht/cpu/esp32/use_cpu_fam
cpu/esp32: use CPU_FAM and CPU_ARCH for ESP32x SoC variant dependent compilation
2022-07-18 15:43:59 +02:00
Gunar Schorcht
08cb7adf62 cpu/esp_common: MODULE_XTENSA has to depend on HAS_ARCH_ESP_XTENSA
ESP32x SoC use either Xtensa cores or RISC-V cores. The Xtensa vendor code has to be compiled only for ESP32x SoCs that are Xtensa-based. Therefore, MODULE_XTENSA has to depend on HAS_ARCH_ESP_XTENSA instead of HAS_ARCH_ESP
2022-07-18 14:44:02 +02:00
Gunar Schorcht
778ff10978 cpu/esp_common: add module esp_riscv to Kconfig 2022-07-18 13:52:13 +02:00
Gunar Schorcht
4b86ae3b5e cpu/esp_common: add module esp_riscv to makefiles 2022-07-18 13:51:33 +02:00
Gunar Schorcht
c4132573f4 cpu/esp_common: platform-specific code for RISC-V based ESP32x SoCs 2022-07-18 13:51:33 +02:00
Gunar Schorcht
d0bb51aacc cpu/esp*: move CPU_* definitions to CPU-specific Makefile.features 2022-07-18 13:05:21 +02:00
Gunar Schorcht
fd67f1402f cpu/esp_common: use CPU_ARCH in Makefile for compile options
To support ESP32x families, CPU_ARCH is used instead of CPU in Makefiles to define architecture dependent compile options.
2022-07-18 13:05:21 +02:00
Gunar Schorcht
55b8c15fe0 cpu/esp_common: use CPU_FAM_* instead of MCU_*
To support ESP32x families with the existing implementation, CPU_FAM_* is used instead of MCU_* in source code.
2022-07-18 13:05:21 +02:00
Gunar Schorcht
5f0ad453b2 cpu/esp_common: move ESP specific Kconfigs to ESP submenu 2022-07-18 09:51:45 +02:00
Gunar Schorcht
06aa8f2c42 cpu/esp_common: port periph/i2c_sw with calculated delays
Fixed delay values are replaced by calculated delays measured in CPU cycles in I2C software implementation. The advantage is that for each ESP SoC only a clock calibration offset has to be specified. The delay measured in CPU cycles are then then derived from current CPU frequency for the given bus speed. The disadvantage is that the calculated delays are not as precise as the predefined fixed delays.
2022-07-17 18:48:23 +02:00
benpicco
295f4a5b04
Merge pull request #18281 from gschorcht/cpu/esp32/periph_hal_esp32_spi
cpu/esp32: use ESP-IDF spi HAL for periph/spi
2022-07-15 13:25:50 +02:00
benpicco
1e8f3871fb
Merge pull request #18274 from gschorcht/cpu/esp32/periph_hal_esp32_uart
cpu/esp32: use ESP-IDF interrupt HAL for periph/uart
2022-07-15 10:58:46 +02:00
Gunar Schorcht
8f3df0eee6 cpu/esp_common: move periph/spi to cpu/esp8266
periph/spi implementation can be used for ESP8266 only from now. An implementation using the ESP-IDF spi HAL interface is required for ESP32x SoCs.
2022-07-15 08:57:16 +02:00
Gunar Schorcht
02310b1148 cpu/esp_common: port periph/hwrng to ESP-IDF random API 2022-06-30 11:10:02 +02:00
Gunar Schorcht
4b2b0047cc cpu/esp_common: port periph/uart to ESP-IDF uart API
This commit changes periph/uart to use ESP-IDF API for ESP32x SoCs. Furthermore, the MCU_* conditionals are inverted so that they can be tested for ESP8266. In all other cases the MCU is any ESP32x SoC
2022-06-28 16:25:24 +02:00