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Commit Graph

442 Commits

Author SHA1 Message Date
Benjamin Valentin
2a255ff3e8 cpu/sam0_eth: interrupt based link detection/auto-negotiation 2023-06-14 14:21:52 +02:00
Benjamin Valentin
04b895ce8a cpu/sam0_eth: use 64 bit bus 2023-06-05 11:42:55 +02:00
Benjamin Valentin
6b70459f77 cpu/sam0_eth: report link status 2023-06-05 11:42:55 +02:00
Benjamin Valentin
385d260069 cpu/sam0_eth: disable PHY when MAC is sleeping
- idle         13.88 mA
 - MAC off      11.48 mA
 - MAC+PHY off  10.73 mA
2023-05-31 14:08:50 +02:00
bors[bot]
f10426709c
Merge #19677 #19683
19677: boards/nucleo-l432k: provide three periph_timer instances r=maribu a=maribu

### Contribution description

- `cpu/stm32/periph_timer`: Generalize to also work with timers that do not have 4 channels
- `boards/common/stm32`: Add timer config for three timers based on TIM2, TIM15, and TIM16 (the three general-purpose timers of the STM32L4)
- `boards/nucleo-l432kc`: Make use of the new timer config


19683: cpu/sam0_eth: clean up init() r=maribu a=benpicco





Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2023-05-30 20:01:21 +00:00
Marian Buschsieweke
51127f674a
drivers/periph/rtc: improve doc on rtc_set_alarm
- point out behavior on denormalized time stamps
- use errno codes to indicate errors (and adapt the few instances of
  actual error handling to use them)
2023-05-30 17:41:36 +02:00
Benjamin Valentin
faf8be39c6 cpu/sam0_eth: clean up init()
- don't enable PHY twice
 - properly set NCFGR register
 - sam0_read_phy() does not return a signed value
2023-05-30 15:41:24 +02:00
d2433454b5
cpu/stm32: cpu/sam0_common: rename internal i2c _start function 2023-05-14 21:08:26 +02:00
Dylan Laduranty
b4b41bc899 sam0/usbdev: partial revert of #17086
Reverting theses changes from #17086 because it breaks SAM0 usbdev in master

Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-03-13 13:49:42 +01:00
10578c7895
cpu/sam0_common: Add stall functions to usbdev 2023-02-28 11:00:06 +01:00
bors[bot]
0dfc05c77c
Merge #19165 #19303
19165: cpu/sam0_common: adc: implement 16 bit mode by oversampling r=dylad a=benpicco



19303: dist/tools/insufficient_memory: Minor improvements r=benpicco a=maribu

### Contribution description

`create_makefile.sh`:
- address all shellcheck warnings
- make script POSIX shell compatible
- use nproc to set the number of parallel jobs to increase throughput
- print error messages when building fails
- run `make info-boards-supported` with `EXTERNAL_BOARD_DIRS=""` to avoid adding out-of-tree boards to `Makefile.ci`.
- classify output as "not supported" also when used features are blacklisted, not only when required features are missing

`add_insufficient_memory_board.sh`:
- classify output as "not supported" also when used features are blacklisted, not only when required features are missing

### Testing procedure

Run the script; it should still work.

### Issues/PRs references

None

Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-02-23 23:58:02 +00:00
Benjamin Valentin
470bee59a7 cpu/sam0_common: implement 16 bit mode by oversampling 2023-02-23 22:17:48 +01:00
Hendrik van Essen
9b0cf96ecd cpu/sam0_common: add PERIPH_I2C_MAX_BYTES_PER_FRAME due to I2C limitations 2023-02-15 11:56:21 +01:00
Benjamin Valentin
bfe2391148 cpu/sam0_common: fix static checks in periph_cpu_common.h 2023-01-18 01:54:34 +01:00
Benjamin Valentin
9dcb3991d2 cpu/sam0_common: move adc_res_t to common code 2023-01-17 17:18:07 +01:00
Marian Buschsieweke
86fdbd7054
core/lib: Add macros/utils.h header
The macros CONCAT(), MIN(), and MAX() are defined over and over again in
RIOT's code base. This de-duplicates the code by moving the macros to a
common place.
2023-01-07 09:47:44 +01:00
Teufelchen1
2629e81b3b cpu/sam0_common/periph: Fix compilation with LLVM 2022-12-19 15:19:51 +01:00
Antonio Galea
ee76e21c33 sam0_common: use size_t len for I2C transfers, as declared (fixes #19008) 2022-12-04 16:57:00 +01:00
Juergen Fitschen
268bdfec29 sam0/rtc_rtt: don't block until set_alarm has been propagated to periph
rtc_set_alarm() / rtt_set_alarm() are heavily used by ztimer during ISR. This will reduce time spent during ISR drastically. We trust that the peripheral is able to propagate the alarm asynchronously.
2022-11-16 17:02:19 +01:00
Juergen Fitschen
9c6f07f80a sam0/rtc_rtt: optimize pm_unblock/pm_block ping-pong during set alarm 2022-11-16 16:54:29 +01:00
Jue
24461b43f8 cpu/sam0/spi: generalize pm_layered interaction
In DMA mode SPI transfers are carried out by HW. We need to block certain pm modes during transfer.
2022-11-03 14:53:44 +01:00
Jue
db9263eeca cpu/sam0/rtc_rtt: integrate pm_layered 2022-11-03 14:53:43 +01:00
Jue
cc4e880aa8 cpu/sam0/rtc: remove overflow IRQ
Due to the RIOT_EPOCH of 2020 this overflow will happen in year 2084. It would be scary if IoT devices are still around then.

We can save RAM and ROM. Furthermore, this overflow handling should block BACKUP power mode in order to keep track of the reference year.
2022-11-03 14:52:38 +01:00
Jue
5866262122 cpu/sam0/usbdev: generalize pm_layered interaction
periph_cpu.h should define the required pm modes.
Additionally, some CPUs require a certain pm mode in USB IDLE mode.
2022-11-03 14:27:47 +01:00
Jue
220be1da7e cpu/sam0/gpio: integrate pm_layered 2022-11-03 14:27:47 +01:00
Jue
ae9190da30 cpu/sam0/uart: integrate pm_layered 2022-11-03 14:27:47 +01:00
Jue
aa5ad12f37 cpu/sam0/uart: skip uart_write() if uart isn't active
Otherwise we get stuck in an endless loop ...
2022-11-03 14:27:47 +01:00
Jue
cf5e207d62 cpu/sam0/uart: enable peripheral clock before accessing regs 2022-11-03 14:27:47 +01:00
Jue
4f25c1017d cpu/sam0/timer: integrate pm_layered 2022-11-03 14:27:47 +01:00
Benjamin Valentin
5843ff4127 cpu/sam0_common: ADC keep muxpos as legacy define 2022-10-04 15:45:25 +02:00
Benjamin Valentin
a7c0bf5341 cpu/sam0_common: adc: drop pin from adc_conf_chan_t 2022-09-27 19:36:10 +02:00
benpicco
baf1687951
Merge pull request #18146 from benpicco/cpu/sam0_common/adc-diffmode
cpu/sam0_common: adc: add support for differential mode
2022-09-27 17:34:07 +02:00
Benjamin Valentin
838a5e4bd3 netdev_drivers: make sure to signal LINK_UP at least once 2022-09-16 22:57:28 +02:00
Benjamin Valentin
66153a47cf treewide: fix typos 2022-09-15 23:31:40 +02:00
Kevin "Tristate Tom" Weiss
8a340fec11
Merge pull request #18223 from benpicco/cpu/sam0_common-spi_clk
cpu/sam0_common: spi: limit clock to source clock
2022-08-30 19:30:49 +02:00
Dylan Laduranty
950a7d51e9 cpu/sam0/timer: supply all clocks before accessing any regs
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2022-08-30 09:25:46 +02:00
benpicco
28cedd52a0
Merge pull request #18201 from benpicco/slip_dose_rxqueue
drivers/{dose, slipdev, sam0_eth}: generate RX event for queued packets
2022-08-26 13:25:13 +02:00
Benjamin Valentin
74dc558972 cpu/{sam0_common, stm32}: select netdev_legacy_api in KConfig 2022-08-17 23:37:05 +02:00
Marian Buschsieweke
276ad5716a
sys/net/gnrc/netif: allow checking if a netdev is legacy or new API
A if `netdev_driver_t::confirm_send()` is provided, it provides the
new netdev API. However, detecting the API at runtime and handling
both API styles comes at a cost. This can be optimized in case only
new or only old style netdevs are in use.

To do so, this adds the pseudo modules `netdev_legacy_api` and
`netdev_new_api`. As right now no netdev actually implements the new
API, all netdevs pull in `netdev_legacy_api`. If `netdev_legacy_api` is
in used but `netdev_new_api` is not, we can safely assume at compile
time that only legacy netdevs are in use. Similar, if only
`netdev_new_api` is used, only support for the new API is needed. Only
when both are in use, run time checks are needed.

This provides two helper function to check for a netif if the
corresponding netdev implements the old or the new API. (With one
being the inverse of the other.) They are suitable for constant folding
when only new or only legacy devices are in use. Consequently, dead
branches should be eliminated by the optimizer.
2022-08-17 12:56:07 +02:00
Leandro Lanzieri
88df973783
cpu/sam0_common/sam0_eth: model in Kconfig 2022-07-25 11:08:32 +02:00
Benjamin Valentin
2583239867 cpu/sam0_eth: generate RX event for queued packets 2022-06-17 10:50:31 +02:00
Benjamin Valentin
8a30474f30 cpu/sam0_common: spi: limit clock to source clock 2022-06-16 19:15:37 +02:00
Benjamin Valentin
e8fd493f41 cpu/sam0_common: mtd_sdhc: ensure source address alignment
The source / destination address of the SDHC transfer needs to be
word-aligned.

Use the mtd buffer to fix the alignment if `mtd_write_page` is used,
otherwise return -ENOTSUP.
2022-06-16 18:58:10 +02:00
Dylan Laduranty
a6ac93d429
Merge pull request #18150 from benpicco/cpu/sam0_common-rtc_sync
cpu/sam0_common: RTC: wait for syncbusy in rtc_get_time()
2022-06-06 22:45:42 +02:00
benpicco
4b6da5c8e4
Merge pull request #17863 from benpicco/sam0_sdhc
cpu/samd5x: add SD Host Controller implementation
2022-05-31 15:33:24 +02:00
Benjamin Valentin
d77724bf04 cpu/sam0_common: RTC: wait for syncbusy in rtc_get_time()
`rtt_get_counter()` already waits for syncbusy before reading the time,
but we also have to do this in RTC mode (`rtc_get_time()`) to avoid
reading old values.

Thus, always wait for syncbusy to clear when accessing the COUNT register.
2022-05-31 15:26:22 +02:00
Benjamin Valentin
babee877ce cpu/sam0_common: add SD Host Controller implementation 2022-05-31 11:07:20 +02:00
Benjamin Valentin
24e918ca19 cpu/sam0_common: adc: default to 0 for ADC_NEG_INPUT 2022-05-30 20:41:18 +02:00
Benjamin Valentin
d6d5d935a6 cpu/sam0_common: adc: derive GPIO pin from AIN number
ADC pins are fixed on sam0
2022-05-30 20:41:18 +02:00
Benjamin Valentin
8075b69275 cpu/sam0_common: adc: handle differential mode
- store result in int16_t to ensure proper sign extension
 - double differential result to account for bit lost for sign
2022-05-30 20:41:18 +02:00