Jean Pierre Dudey 0aeed80eb0 cc26xx_cc13xx: add ROM Hard-API ... This is needed to switch the SCLK_HF source clock safely. Note: these functions work on cc26x2_cc13x2 and cc26x0, but special care needs to be taken when calling on cc26x0 some of these functions, as ADDI_SEM needs to be taken. Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>		2020-05-02 13:25:41 -05:00
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cc26xx_cc13xx_adi.h	cc26xx_cc13xx: add ADI3 and masked access	2020-04-29 18:32:58 -05:00
cc26xx_cc13xx_ccfg.h	cc26xx_cc13xx: add register values	2020-04-29 18:16:45 -05:00
cc26xx_cc13xx_gpio.h	cpu/cc26x0: Factor out code common for cc26xx/cc13xx family	2019-10-29 21:27:00 +01:00
cc26xx_cc13xx_gpt.h	cpu/cc26x0: Factor out code common for cc26xx/cc13xx family	2019-10-29 21:27:00 +01:00
cc26xx_cc13xx_hard_api.h	cc26xx_cc13xx: add ROM Hard-API	2020-05-02 13:25:41 -05:00
cc26xx_cc13xx_i2c.h	cpu/cc26x0: Factor out code common for cc26xx/cc13xx family	2019-10-29 21:27:00 +01:00
cc26xx_cc13xx_ioc.h	cc26xx_cc13xx: update AON_IOC register bank	2020-04-29 18:16:45 -05:00
cc26xx_cc13xx_power.h	cc26xx_cc13xx: add API to manage peripheral clocks	2020-03-23 09:33:53 -05:00
cc26xx_cc13xx_rfc.h	cc26xx_cc13xx: add RFC_DBELL/RFC_PWR definitions	2020-03-16 19:36:54 -05:00
cc26xx_cc13xx_uart.h	cc26xx_cc13xx: fix UART1 initialization	2020-04-08 12:24:02 -05:00
cc26xx_cc13xx_vims.h	cc26xx_cc13xx: fix FLASH->CFG offset, update VIMS	2020-04-29 18:16:45 -05:00
cc26xx_cc13xx_wdt.h	cpu/cc26x0: Fix register map for WDT	2019-10-29 21:27:00 +01:00
cc26xx_cc13xx.h	cc26xx_cc13xx: add ROM Hard-API	2020-05-02 13:25:41 -05:00
cpu_conf_cc26xx_cc13xx.h	cc26xx_cc13xx: add ROM Hard-API	2020-05-02 13:25:41 -05:00
periph_cpu_common.h	cpu/cc26xx_cc13xx: use generic hw fc module	2020-03-10 14:22:34 +01:00