The `SWJ_CFG` field of the `AFIO_MAPR` register is write only and values
read are undefined (random). Hence, using `AFIO->MAPR |= mask;` to
enable flags can corrupt the state of the `SWJ_CFG` (configure it to
an unintended value).
Two helper functions have been introduced:
- `afio_mapr_read()` reads the value, but sanitizes the `SWJ_CFG` field
to zero
- `afio_mapr_write()` writes the given value, but applies the `SWJ_CFG`
configured by the board before writing.
Finally, the `nucleo-f103rb` and `bluepill*`/`blackpill*` boards have
been updated to no longer specify `STM32F1_DISABLE_JTAG`, as this
is handled by the `SWJ_CFG` setting (which defaults to disabling JTAG).
stm32f1 periph_rtc implementation gets a 1s resolution by dividing
CLOCK_LSx by 32768. This only make sense if CLOCK_LSE is set,
otherwise CLOCK_LSI=~40000, which will lead to an imprecise rtc.
The Nucleo-F103RB comes with an internal SWD programmer/debugger. Thus, the JTAG
pins are not going to be used for debugging / programming anyway. The pins are
exposed on the headers, so allowing them to be used as GPIOs make a lot of
sense.
The Bluepill / Blackpill boards only expose the SWD pins on the debug header,
but the JTAG pins (not also used by SWD) are exposed on the GPIO pin headers.
Hence, exposing them as regular GPIOs seems to be a reasonable choice.
cpu/$(CPU)/Makefile.features and cpu/$(CPU)/Makefile.dep are
automatically included
Part of moving CPU/CPU_MODEL definition to Makefile.features to have it
available before Makefile.include.
This commit fixes configuration problems when trying to use i2c pins that need to be remapped.
All B8 and B9 pins for STM32F1 need to be remapped, so a check is done if the remappable pins are selected.
The file always exist so no need to do '-include'.
Replaced using:
sed -i 's|-\(include $(RIOTCPU)/.*/Makefile.features\)|\1|' \
$(git grep -l '$(RIOTCPU)/.*/Makefile.features' boards)