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boards/{nucleo-f103rb,b*pill}: Expose JTAG pins as GPIOs

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The Nucleo-F103RB comes with an internal SWD programmer/debugger. Thus, the JTAG
pins are not going to be used for debugging / programming anyway. The pins are
exposed on the headers, so allowing them to be used as GPIOs make a lot of
sense.

The Bluepill / Blackpill boards only expose the SWD pins on the debug header,
but the JTAG pins (not also used by SWD) are exposed on the GPIO pin headers.
Hence, exposing them as regular GPIOs seems to be a reasonable choice.
This commit is contained in:
Marian Buschsieweke 2020-03-08 12:46:07 +01:00
parent e326acfc78
commit 8fd8c8273f
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GPG Key ID: 61F64C6599B1539F
2 changed files with 15 additions and 0 deletions
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8
boards/common/blxxxpill/include/board_common.h
View File

@ -67,6 +67,14 @@ void board_init(void);
#define XTIMER_BACKOFF (19)
/** @} */
/* The boards debug header only exports SWD, so JTAG-only pins PA15, PB3(*),
* and PB4 can be remapped as regular GPIOs instead. (Note: PB3 is also used as
* SWO. The user needs to take care to not enable SWO with the debugger while
* at the same time PB3 is used as GPIO. But RIOT does not use SWO in any case,
* so if a user adds this feature in her/his own code, she/he should be well
* aware of this.)
*/
#define STM32F1_DISABLE_JTAG /**< Disable JTAG to allow pins being used as GPIOs */
#ifdef __cplusplus
}
#endif

7
boards/nucleo-f103rb/Makefile.include
View File

@ -1,2 +1,9 @@
# load the common Makefile.include for Nucleo boards
include $(RIOTBOARD)/common/nucleo64/Makefile.include
# On-board debugger uses SWD, so JTAG-only pins PA15, PB3(*), and PB4 can be
# remapped as regular GPIOs instead. (Note: PB3 is also used as SWO. The user
# needs to take care to not enable SWO with the debugger while at the same time
# PB3 is used as GPIO. But RIOT does not use SWO in any case, so if a user adds
# this feature in her/his own code, she/he should be well aware of this.)
CFLAGS += -DSTM32F1_DISABLE_JTAG