clk_conf is a useful tool to produce clock headers for new boards.
But it only supports STM32Fx families.
This commits add the definition of a new family: STM32MP1.
Only the STM32MP157 is supported for now.
First build clk_conf:
$ make -C cpu/stm32/dist/clk_conf/
Clock header can be generated with the following command once clk_conf is
built:
$ cpu/stm32/dist/clk_conf/clk_conf stm32mp157 208000000 24000000 1
This command line will produce a core clock of 208MHz with a 24MHz HSE
oscillator and will use LSE clock which corresponds to the STM32MP157C-DK2
board configuration.
The command will output the header to copy paste into the periph_conf.h of
the board:
/**
* @name Clock settings
*
* @note This is auto-generated from
* `cpu/stm32/dist/clk_conf/clk_conf.c`
* @{
*/
/* give the target core clock (HCLK) frequency [in Hz],
* maximum: 209MHz */
#define CLOCK_CORECLOCK (208000000U)
/* 0: no external high speed crystal available
* else: actual crystal frequency [in Hz] */
#define CLOCK_HSE (24000000U)
/* 0: no external low speed crystal available,
* 1: external crystal available (always 32.768kHz) */
#define CLOCK_LSE (1U)
/* peripheral clock setup */
#define CLOCK_MCU_DIV RCC_MCUDIVR_MCUDIV_1 /* max 209MHz */
#define CLOCK_MCU (CLOCK_CORECLOCK / 1)
#define CLOCK_APB1_DIV RCC_APB1DIVR_APB1DIV_2 /* max 104MHz */
#define CLOCK_APB1 (CLOCK_CORECLOCK / 2)
#define CLOCK_APB2_DIV RCC_APB2DIVR_APB2DIV_2 /* max 104MHz */
#define CLOCK_APB2 (CLOCK_CORECLOCK / 2)
#define CLOCK_APB3_DIV RCC_APB3DIVR_APB3DIV_2 /* max 104MHz */
#define CLOCK_APB3 (CLOCK_CORECLOCK / 2)
/* Main PLL factors */
#define CLOCK_PLL_M (2)
#define CLOCK_PLL_N (52)
#define CLOCK_PLL_P (3)
#define CLOCK_PLL_Q (13)
/** @} */
This result has been verified with STM32CubeMX, the official ST tool.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
APB1 bus clock is always enabled is not manageable by RCC register.
So avoid enabling it.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
* Setup i2c speed to I2C_SPEED_LOW by default
* enable i2c_write_regs() function.
* i2c frequency needs to be specified into board periph_conf.h
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
In some CMSIS headers, "typedef enum" could be preceded by white
spaces. Thus consider them when parsing the line.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
In case of muticore CPU, openocd opens one debug port by core for gdb.
Thus add a GDB_PORT_CORE_OFFSET port offset to select the right port
for debugging.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
As for debugr, boards like stm32mp157c-dk2 does not have flash memory.
The firmware could be flashed using the operating system (mainly Linux) or
the bootloader (mainly u-boot) of the dual architecture (cortex-A7 on
stm32mp157c-dk2). However in engineering mode (only cortex-M4), the
firmware has to be flashed using jtag once the board is powered up.
The flashr action do this using openocd only.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
For multi-arch SoC like STM32MP1, the right target core has
to be selected to avoid debugging the wrong default cpu.
This is done using openocd command 'targets ${OPENOCD_CORE}'.
OPENOCD_CORE has to be set in board Makefile.include file.
In case it is not set, the command just display available targets, thus it
has no effect on already existing boards using openocd.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
In case of STM32MP157c-dk2 board, there is no flash available. Thus,
the elf binary has to be flashed directly to SRAM before debugging.
To do so, the DBG_FLAGS variable has to be overrided to load the binary
using 'load' gdb command.
The START_ADDR variable is the entrypoint extracted from the elf binary
using objdump tool.
The do_debug function can now be used as usual.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
flashpage currently requires pagewise implementation with an optional
extension for per block writes (flashpage_raw). Most implementations
with flashpage_raw implement the pagewise access via the flashpage_raw
functions. This commit makes the flashpage raw the main access method
and adds an extension feature for the pagewise access.
The functions and defines are renamed to reflect this. The API is also
extended with a dedicated function for erasing a sector.
The number of channels per timer got updated incorrectly in #15368.
Only TIMER1 and higher have four channels. Without this fix, timer
initialization will halt.
