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cc2538: Adapt to flashpage/flashpage_pagewise API

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This commit is contained in:
Koen Zandberg 2020-11-09 16:43:18 +01:00
parent 5683f30b2f
commit 3c10425b4c
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GPG Key ID: 0895A893E6D2985B
4 changed files with 20 additions and 26 deletions
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2
cpu/cc2538/Kconfig
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@ -11,7 +11,7 @@ config CPU_FAM_CC2538
select HAS_CPU_CC2538
select HAS_PERIPH_CPUID
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_RAW
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_GPIO
select HAS_PERIPH_GPIO_IRQ
select HAS_PERIPH_HWRNG

2
cpu/cc2538/Makefile.features
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@ -3,7 +3,7 @@ CPU_FAM = cc2538
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_flashpage
FEATURES_PROVIDED += periph_flashpage_raw
FEATURES_PROVIDED += periph_flashpage_pagewise
FEATURES_PROVIDED += periph_gpio periph_gpio_irq
FEATURES_PROVIDED += periph_hwrng
FEATURES_PROVIDED += periph_uart_modecfg

4
cpu/cc2538/include/cpu_conf.h
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@ -65,9 +65,9 @@ extern "C" {
/* The minimum block size which can be written is 4B. However, the erase
* block is always FLASHPAGE_SIZE.
*/
#define FLASHPAGE_RAW_BLOCKSIZE (4U)
#define FLASHPAGE_WRITE_BLOCK_SIZE (4U)
/* Writing should be always 4 bytes aligned */
#define FLASHPAGE_RAW_ALIGNMENT (4U)
#define FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U)
/** @} */
#ifdef __cplusplus

38
cpu/cc2538/periph/flashpage.c
View File

@ -61,16 +61,25 @@ static inline void _erase(uint32_t *page_addr)
irq_restore(state);
}
__attribute__ ((section (".ramfunc")))
void flashpage_write_raw(void *target_addr, const void *data, size_t len)
void flashpage_erase(unsigned page)
{
/* assert multiples of FLASHPAGE_RAW_BLOCKSIZE are written and no less of
assert((unsigned) page < FLASHPAGE_NUMOF);
uint32_t *page_addr = (uint32_t *)flashpage_addr(page);
_erase(page_addr);
}
__attribute__ ((section (".ramfunc")))
void flashpage_write(void *target_addr, const void *data, size_t len)
{
/* assert multiples of FLASHPAGE_WRITE_BLOCK_SIZE are written and no less of
that length. */
assert(!(len % FLASHPAGE_RAW_BLOCKSIZE));
assert(!(len % FLASHPAGE_WRITE_BLOCK_SIZE));
/* ensure writes are aligned */
assert(!(((unsigned)target_addr % FLASHPAGE_RAW_ALIGNMENT) ||
((unsigned)data % FLASHPAGE_RAW_ALIGNMENT)));
assert(!(((unsigned)target_addr % FLASHPAGE_WRITE_BLOCK_ALIGNMENT) ||
((unsigned)data % FLASHPAGE_WRITE_BLOCK_ALIGNMENT)));
/* ensure the length doesn't exceed the actual flash size */
assert(((unsigned)target_addr + len) <=
@ -90,7 +99,7 @@ void flashpage_write_raw(void *target_addr, const void *data, size_t len)
/* starts the write-sequence state machine */
DEBUG("[flashpage_raw] write: now writing the data\n");
FLASH_CTRL_FCTL |= FLASH_CTRL_FCTL_WRITE;
for (unsigned i = 0; i < (len / FLASHPAGE_RAW_BLOCKSIZE); i++) {
for (unsigned i = 0; i < (len / FLASHPAGE_WRITE_BLOCK_SIZE); i++) {
FLASH_CTRL_FWDATA = (uint32_t) *(data_addr++);
/* wait for flash operation to complete */
while (FLASH_CTRL_FCTL & FLASH_CTRL_FCTL_FULL) {}
@ -98,18 +107,3 @@ void flashpage_write_raw(void *target_addr, const void *data, size_t len)
/* re-enable interrupts */
irq_restore(state);
}
void flashpage_write(int page, const void *data)
{
assert((unsigned) page < FLASHPAGE_NUMOF);
uint32_t *page_addr = (uint32_t *)flashpage_addr(page);
/* erase page */
_erase(page_addr);
/* write page */
if (data != NULL) {
flashpage_write_raw(page_addr, data, FLASHPAGE_SIZE);
}
}