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Commit Graph

154 Commits

Author SHA1 Message Date
Bas Stottelaar
6774f7e412
Merge pull request #14337 from benpicco/TIMER_CHANNEL_NUMOF
use TIMER_CHANNEL_NUMOF instead of TIMER_CHANNELS
2020-06-24 01:19:17 +02:00
Benjamin Valentin
c8ff026640 cpu/sam0_common: use TIMER_CHANNEL_NUMOF 2020-06-24 00:45:35 +02:00
Francisco
a73b61e30b
Merge pull request #14320 from benpicco/cpu/sam0_common-gpio_gclk
cpu/sam0_common: GPIO always default to MAIN clock for EXTI, make configurable
2020-06-23 22:48:45 +02:00
Benjamin Valentin
c0203ad35c cpu/sam0_common: GPIO default to MAIN clock for EXTI, make configurable
Currently only samd21 used the 32 kHz clock for EXTI which makes it miss fast events.
All newer members of the family use the MAIN clock.

While touching this, also make the clock source configurable to this can be overwritten,
e.g. in the board config if desired.
2020-06-19 13:27:48 +02:00
Francisco
a970163812
Merge pull request #14312 from benpicco/cpu/sam0_common/periph/uart-rxonly
cpu/sam0_common: UART: allow RX only configuration
2020-06-19 11:44:10 +02:00
benpicco
c3314e1a0c
Merge pull request #14303 from fjmolinas/pr_sam0_unified_rtt
cpu/sam0: unified rtt configuration
2020-06-19 11:30:06 +02:00
Francisco Molina
ff24aa61f3
cpu/sam0_common/periph/rtt: uncrustify 2020-06-19 09:16:24 +02:00
Francisco Molina
15bbd95b6a
cpu/sam0_common/rtt: add configurable RTT_FREQUENCY 2020-06-19 09:16:24 +02:00
Benjamin Valentin
5c3ae77df9 cpu/sam0_common: UART: allow RX only configuration 2020-06-19 00:33:50 +02:00
Dylan Laduranty
6bf0a41399
Merge pull request #13600 from benpicco/sam0-gpio
cpu/sam0_common: GPIO IRQ optimizations
2020-06-17 21:23:19 +02:00
07c78efc83
Merge pull request #14285 from fjmolinas/pr_uart_nb_race
sam0/stm32: fix possible uart_nonblocking deadlock
2020-06-17 12:14:25 +02:00
Francisco Molina
80d682becd
cpu/sam0: avoid deadlock on nonblocking write
If a write to a full tsrb is attempted with disabled interrupts
or in a interrupt then a deadlock will occure. To avoid this make
space in the ringbuffer by synchronously writing to uart.
2020-06-17 10:01:21 +02:00
Francisco Molina
0b8adb2d27
cpu/sam0-stm32/uart: rename tx buf size to UART_TXBUF_SIZE 2020-06-17 10:01:20 +02:00
Benjamin Valentin
585dc15f99 cpu/sam0_common: UART: implement inverted RX & TX
The UART TX and TX lines on SAMD5x and SAML1x can be inverted.
However, the flags don't do exactly what one would expect.

See errata 2.18.5: SERCOM-UART: TXINV and RXINV Bits Reference:

> The TXINV and RXINV bits in the CTRLA register have inverted functionality.
>
> Workaround:
> In software interpret the TXINV bit as a functionality of RXINV, and conversely,
> interpret the RXINV bit as a functionality of TXINV.
2020-06-16 22:55:37 +02:00
benpicco
1992f57765
Merge pull request #14261 from bergzand/pr/sam0_common/spi_dma
sam0_common: Make SPI peripheral DMA compatible
2020-06-14 18:25:37 +02:00
60f4502e6c
cpu/sam0_common: Make SPI peripheral DMA compatible 2020-06-14 14:56:20 +02:00
22c8788b58
sam0_common/dma: Rename len to num 2020-06-14 11:51:36 +02:00
7a8566c391
sam0_common/dma: Mark src parameter as const 2020-06-13 21:02:04 +02:00
6be1b27bbb
sam0_common: Add DMA peripheral driver 2020-06-12 20:04:05 +02:00
Leandro Lanzieri
079a7ee1e5
cpu/sam0_common: Add family specific Kconfig symbols 2020-06-02 17:42:10 +02:00
Benjamin Valentin
8486e8c6d1 cpu/sam0_common: implement timer_set_periodic() 2020-05-28 17:37:42 +02:00
Juergen Fitschen
df90176b1f cpu/sam0_common/spi: move clk pin muxing into spi_acquire / spi_release
When the SPI peripheral is disabled, the output lines will become HIGH-Z.
If the clk pin is not pulled HIGH or LOW, connected SPI slaves will start drawing current expectedly.
2020-05-23 13:54:39 +02:00
Benjamin Valentin
5481d8c73a cpu/sam0_common: clean up formatting
Make the code nicer to read.
2020-05-06 14:11:47 +02:00
Benjamin Valentin
e93c9a82f1 cpu/sam0_common: RTC INTFLAG are clear on write
Writing a 1 bit clears the interrupt flag, writing with |= is thus
uneccecary (and actually an error as this would clear *all* flags).

This cleanup was already done for rtt.c, but rtc.c missed out.
2020-05-06 14:05:12 +02:00
Francisco
cea0d1c532
Merge pull request #13421 from benpicco/cpu/sam0_common/i2c-deinit
drivers/periph/i2c: add periph_i2c_reconfigure feature & implementation for sam0
2020-05-05 19:09:47 +02:00
Benjamin Valentin
8c502322f4 cpu/sam0_common: i2c: implement the periph_i2c_reconfigure feature
This adds sam0 implementations for

 - i2c_init_pins()
 - i2c_deinit_pins()
 - i2c_pin_sda()
 - i2c_pin_scl()
2020-05-05 16:12:19 +02:00
benpicco
fbae0a1117
Merge pull request #13901 from benpicco/cpu/sam0_common/timer_flex_freq
cpu/sam0_common: timer: don't ignore frequency in timer_init()
2020-05-04 02:56:01 +02:00
Dylan Laduranty
76870721fe
Merge pull request #13965 from benpicco/cpu/sam0_common/periph/dac
cpu/sam0_common: implement periph/dac
2020-05-02 20:34:40 +02:00
Benjamin Valentin
bfb3d52a63 cpu/sam0_common: implement periph/dac
The sam0 MCUs all have a DAC peripheral.
The DAC has a resulution of 10 or 12 bits and can have one or two
output channels.

The output pins are always hard-wired to PA2 for DAC0 and PA5 for DAC1
if it exists.

On the same54-xpro I would only get a max value of ~1V when using the
internal reference, so I configured it to use an external voltage reference.

The external reference pin is hard-wired to PA3, so you'll have to connect
that to 3.3V to get results.
2020-05-02 18:31:55 +02:00
Benjamin Valentin
c05984b341 cpu/sam0_common: timer: don't ignore frequency in timer_init()
Now that we can query the GCLK frequency at run-time, there is no need
to implicitely hard-code the timer frequency in the config struct anymore.
2020-05-01 16:44:06 +02:00
fe299138aa
sam0_common: clarify memcpy in cpuid_get 2020-04-28 14:56:19 +02:00
Leandro Lanzieri
cf53a86308
cpu/sam0_common: Add CPU-specific WDT peripheral configuration 2020-03-31 13:39:39 +02:00
Leandro Lanzieri
00b71a2708
drivers/wdt: Move WDT_WARNING_PERIOD to 'CONFIG_' namespace 2020-03-31 13:39:37 +02:00
Dylan Laduranty
7a095a80d7 cpu/sam0: use generic hw fc module 2020-03-10 14:22:34 +01:00
Benjamin Valentin
eb3f515f55 cpu/sam0_common: gpio: Make use of dedicated GPIO interrupts
saml1x and samd5x have dedicated interrupts per GPIO line.
Use those instead of iterating over the GPIO status bits
to serve IRQs even faster.
2020-03-10 10:33:31 +01:00
Benjamin Valentin
5c4c45fd3f cpu/sam0_common: gpio: add gpio_disable_mux() function
Inverse to gpio_init_mux()
2020-03-09 19:23:33 +01:00
Benjamin Valentin
6540609c35 cpu/sam0_common: gpio: save a few cycles in isr_eic()
Don't iterate over all bits in the GPIO status register, instead
just loop as many times as there are set bits.
2020-03-09 18:34:06 +01:00
Juergen Fitschen
0032d35fe8 cpu/sam0_common: mitigate rounding errors of baud rate calculation
Instead of always rounding up, the driver now rounds to the nearest integer. This reduces the absolut rounding error when setting SPI baud rates.
2020-03-03 12:32:42 +01:00
Benjamin Valentin
442ddc1346 cpu/samd21: Switch EIC clock to slow speed on STANDBY mode 2020-02-24 12:02:27 +01:00
Juergen Fitschen
43ff72ad56 cpu/sam0*: Switch EIC clock to slow speed on STANDBY mode 2020-02-24 12:02:25 +01:00
Benjamin Valentin
b77afadb49 cpu/sam0_common/gpio: use explicit GCLK names
For consistency, use named GCLKs.

 - `SAM0_GCLK_32KHZ` will always be 2 for samd21
 - `SAM0_GCLK_MAIN` will always be 0

So no change in functionality, just makes the code easier to understand.
2020-02-21 14:25:43 +01:00
benpicco
9b33e1ca92
Merge pull request #13271 from kfessel/patch-shed
core/sched: sched.h: remove not needed bitarithm include to avoid conflict
2020-02-05 14:44:08 +01:00
Karl Fessel
4445faaa3a core/shed: remove not needed bitarithm include add missing
bitarithm.h is not needed for the interface of shed but may cause conflicts
due to different definitions of SETBIT and CLRBIT

common implementations are: (value, offset) xor (value, mask) bitarithm
implements the later

frac.c and nrf52/usbdev.c use bitarithm.h but where missing the include

sam0/rtt.c defined a bit using mask from bitarithm,
changed that to the soulution used in sam0/rtc.c
2020-02-05 12:45:29 +01:00
Benjamin Valentin
38b6ee56f3 cpu/sam0: use defines for GCLK IDs
Give the clocks explicit names to better identify their meaning.
2020-02-04 21:16:54 +01:00
Benjamin Valentin
df33ffd0d3 cpu/samd21: only configure one 32kHz GCLK
Use the same 32 kHz GCLK to feed the PLL and the RTT, etc.
2020-02-04 21:16:54 +01:00
Benjamin Valentin
1496149bba cpu/sam0: don't hard-code peripheral clocks
Instead of hard-coding the peripheral clocks to CLOCK_CORECLOCK
introduce helper functions to return the frequency of the individual
GCLKs and use those for baud-rate calculations.

This requires the GCLK to be part of the peripheral's config struct.
While this is already the case for most peripherals, this also adds
it for those where it wasn't used before.

As it defaults to 0 (CLOCK_CORECLOCK) no change is to be expected.
2020-02-04 21:06:21 +01:00
Benjamin Valentin
a51d167a43 cpu/sam0: use GCLK ID instead of bitmask
To simplify board definitions and for unification between samd2x and
newer models, don't use the GCLK bitmask in board definitions.
Instead use the GCLK index and generate the bitmask when needed.
2020-02-04 21:06:21 +01:00
chrysn
e65f3f372b USB VID/PID: Set whitelist define for internals that use usb.h
This list is probably incomplete as it was created experimentally.
2020-01-30 15:04:10 +01:00
Marian Buschsieweke
47cb59e6e5
cpu/sam0_common/periph: adc_sample() now returns int32_t 2020-01-10 14:13:15 +01:00
dylad
bd06772980 sam0/uart: add support for hardware flow control 2019-12-20 21:19:44 +01:00