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cpu/sam0: use GCLK ID instead of bitmask

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To simplify board definitions and for unification between samd2x and
newer models, don't use the GCLK bitmask in board definitions.
Instead use the GCLK index and generate the bitmask when needed.
This commit is contained in:
Benjamin Valentin 2019-12-16 16:09:33 +01:00 committed by Benjamin Valentin
parent d7ec96a91c
commit a51d167a43
23 changed files with 134 additions and 116 deletions
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7
boards/arduino-mkrwan1300/include/periph_conf.h
View File

@ -48,7 +48,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
{ /* LoRa module */
.dev = &SERCOM4->USART,
@ -62,7 +62,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
};
@ -87,7 +87,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_C,
.clk_mux = GPIO_MUX_C,
.miso_pad = SPI_PAD_MISO_3,
.mosi_pad = SPI_PAD_MOSI_0_SCK_1
.mosi_pad = SPI_PAD_MOSI_0_SCK_1,
.gclk_src = 0,
}
};

17
boards/arduino-zero/include/periph_conf.h
View File

@ -90,10 +90,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC3,
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT16,
@ -104,10 +104,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT32,
@ -140,7 +140,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
{
.dev = &SERCOM0->USART,
@ -154,7 +154,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
}
};
@ -237,7 +237,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_D,
.clk_mux = GPIO_MUX_D,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0
}
};
@ -256,7 +257,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 23),
.sda_pin = GPIO_PIN(PA, 22),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

8
boards/common/arduino-mkr/include/periph_conf.h
View File

@ -48,7 +48,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
}
};
@ -72,7 +72,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_C,
.clk_mux = GPIO_MUX_C,
.miso_pad = SPI_PAD_MISO_3,
.mosi_pad = SPI_PAD_MOSI_0_SCK_1
.mosi_pad = SPI_PAD_MOSI_0_SCK_1,
.gclk_src = 0
},
{
.dev = &SERCOM2->SPI,
@ -83,7 +84,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_C,
.clk_mux = GPIO_MUX_C,
.miso_pad = SPI_PAD_MISO_3,
.mosi_pad = SPI_PAD_MOSI_0_SCK_1
.mosi_pad = SPI_PAD_MOSI_0_SCK_1,
.gclk_src = 0
}
};

10
boards/common/arduino-mkr/include/periph_conf_common.h
View File

@ -90,10 +90,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC3,
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT16,
@ -104,10 +104,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT32,
@ -184,7 +184,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 9),
.sda_pin = GPIO_PIN(PA, 8),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

10
boards/common/saml1x/include/periph_conf.h
View File

@ -42,7 +42,7 @@ static const tc32_conf_t timer_config[] = {
.mclk = &MCLK->APBCMASK.reg,
.mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
.gclk_id = TC0_GCLK_ID,
.gclk_src = GCLK_PCHCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER(4),
.flags = TC_CTRLA_MODE_COUNT32,
}
@ -71,7 +71,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0
.gclk_src = 0
}
};
@ -96,8 +96,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_D,
.clk_mux = GPIO_MUX_D,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0
}
};
@ -115,7 +115,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 17),
.sda_pin = GPIO_PIN(PA, 16),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

1
boards/common/sodaq/include/cfg_spi_default.h
View File

@ -43,6 +43,7 @@ static const spi_conf_t spi_config[] = {
.clk_mux = GPIO_MUX_D,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0
},
};

8
boards/common/sodaq/include/cfg_timer_default.h
View File

@ -39,10 +39,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC3,
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT16,
@ -53,10 +53,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT32,

15
boards/feather-m0/include/periph_conf.h
View File

@ -85,10 +85,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC3,
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT16,
@ -99,10 +99,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT32,
@ -135,7 +135,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
}
};
@ -218,7 +218,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_D,
.clk_mux = GPIO_MUX_D,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0
}
};
@ -236,7 +237,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 23),
.sda_pin = GPIO_PIN(PA, 22),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

13
boards/hamilton/include/periph_conf.h
View File

@ -118,10 +118,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC3,
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT16,
@ -132,10 +132,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT32,
@ -217,7 +217,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_F,
.clk_mux = GPIO_MUX_F,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0,
}
};
@ -235,7 +236,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 17),
.sda_pin = GPIO_PIN(PA, 16),
.mux = GPIO_MUX_D,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

25
boards/samd21-xpro/include/periph_conf.h
View File

@ -96,10 +96,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC3,
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT16,
@ -110,10 +110,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT32,
@ -146,7 +146,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
{ /* EXT1 */
.dev = &SERCOM4->USART,
@ -160,7 +160,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
{ /* EXT2/3 */
.dev = &SERCOM4->USART,
@ -174,7 +174,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
}
};
@ -242,7 +242,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_D,
.clk_mux = GPIO_MUX_D,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0
},
{ /* EXT2 */
.dev = &SERCOM1->SPI,
@ -253,7 +254,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_C,
.clk_mux = GPIO_MUX_C,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0
},
{ /* EXT3 */
.dev = &SERCOM5->SPI,
@ -264,7 +266,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_D,
.clk_mux = GPIO_MUX_D,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0
}
};
@ -282,7 +285,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 9),
.sda_pin = GPIO_PIN(PA, 8),
.mux = GPIO_MUX_D,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

11
boards/same54-xpro/include/periph_conf.h
View File

@ -42,7 +42,7 @@ static const tc32_conf_t timer_config[] = {
.mclk = &MCLK->APBAMASK.reg,
.mclk_mask = MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1,
.gclk_id = TC0_GCLK_ID,
.gclk_src = GCLK_PCHCTRL_GEN(5),
.gclk_src = 5,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
.flags = TC_CTRLA_MODE_COUNT32,
},
@ -52,7 +52,7 @@ static const tc32_conf_t timer_config[] = {
.mclk = &MCLK->APBBMASK.reg,
.mclk_mask = MCLK_APBBMASK_TC2 | MCLK_APBBMASK_TC3,
.gclk_id = TC2_GCLK_ID,
.gclk_src = GCLK_PCHCTRL_GEN(5),
.gclk_src = 5,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
.flags = TC_CTRLA_MODE_COUNT32,
}
@ -86,7 +86,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0
.gclk_src = 0
}
};
@ -111,7 +111,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_C,
.clk_mux = GPIO_MUX_C,
.miso_pad = SPI_PAD_MISO_3,
.mosi_pad = SPI_PAD_MOSI_0_SCK_1
.mosi_pad = SPI_PAD_MOSI_0_SCK_1,
.gclk_src = 0
}
};
@ -130,7 +131,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PD, 9),
.sda_pin = GPIO_PIN(PD, 8),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

12
boards/saml21-xpro/include/periph_conf.h
View File

@ -45,7 +45,7 @@ static const tc32_conf_t timer_config[] = {
.mclk = &MCLK->APBCMASK.reg,
.mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
.gclk_id = TC0_GCLK_ID,
.gclk_src = GCLK_PCHCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER(4),
.flags = TC_CTRLA_MODE_COUNT32,
}
@ -74,7 +74,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0
.gclk_src = 0
},
{ /* EXT1 header */
.dev = &SERCOM4->USART,
@ -88,7 +88,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0
.gclk_src = 0
}
};
@ -113,8 +113,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_D,
.clk_mux = GPIO_MUX_D,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0
}
};
@ -132,7 +132,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 9),
.sda_pin = GPIO_PIN(PA, 8),
.mux = GPIO_MUX_D,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

20
boards/samr21-xpro/include/periph_conf.h
View File

@ -96,10 +96,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC3,
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT16,
@ -110,10 +110,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT32,
@ -146,7 +146,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
{
.dev = &SERCOM5->USART,
@ -160,7 +160,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
}
};
@ -220,7 +220,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_F,
.clk_mux = GPIO_MUX_F,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0
},
{
.dev = &SERCOM5->SPI,
@ -231,7 +232,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_D,
.clk_mux = GPIO_MUX_D,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0
}
};
@ -249,7 +251,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 17),
.sda_pin = GPIO_PIN(PA, 16),
.mux = GPIO_MUX_D,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

9
boards/samr30-xpro/include/periph_conf.h
View File

@ -41,7 +41,7 @@ static const tc32_conf_t timer_config[] = {
.mclk = &MCLK->APBCMASK.reg,
.mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
.gclk_id = TC0_GCLK_ID,
.gclk_src = GCLK_PCHCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER(4),
.flags = TC_CTRLA_MODE_COUNT32,
}
@ -70,7 +70,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0
.gclk_src = 0
}
};
@ -94,7 +94,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_F,
.clk_mux = GPIO_MUX_F,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0
}
};
@ -112,7 +113,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 17),
.sda_pin = GPIO_PIN(PA, 16),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

9
boards/samr34-xpro/include/periph_conf.h
View File

@ -42,7 +42,7 @@ static const tc32_conf_t timer_config[] = {
.mclk = &MCLK->APBCMASK.reg,
.mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
.gclk_id = TC0_GCLK_ID,
.gclk_src = GCLK_PCHCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER(4),
.flags = TC_CTRLA_MODE_COUNT32,
}
@ -72,7 +72,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0
.gclk_src = 0
}
};
@ -96,7 +96,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_F,
.clk_mux = GPIO_MUX_F,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0
}
};
@ -114,7 +115,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 17),
.sda_pin = GPIO_PIN(PA, 16),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_PCHCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

19
boards/sensebox_samd21/include/periph_conf.h
View File

@ -86,10 +86,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC3,
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT16,
@ -100,10 +100,10 @@ static const tc32_conf_t timer_config[] = {
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
.gclk_src = GCLK_CLKCTRL_GEN(1),
.gclk_src = 1,
.prescaler = TC_CTRLA_PRESCALER_DIV1,
#else
.gclk_src = GCLK_CLKCTRL_GEN(0),
.gclk_src = 0,
.prescaler = TC_CTRLA_PRESCALER_DIV8,
#endif
.flags = TC_CTRLA_MODE_COUNT32,
@ -136,7 +136,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
},
{
.dev = &SERCOM4->USART,
@ -150,7 +150,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
}
};
@ -175,7 +175,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_C,
.clk_mux = GPIO_MUX_C,
.miso_pad = SPI_PAD_MISO_3,
.mosi_pad = SPI_PAD_MOSI_0_SCK_1
.mosi_pad = SPI_PAD_MOSI_0_SCK_1,
.gclk_src = 0
}
};
@ -192,7 +193,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 8),
.sda_pin = GPIO_PIN(PA, 9),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
},
{
@ -201,7 +202,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 12),
.sda_pin = GPIO_PIN(PA, 13),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

10
boards/sodaq-autonomo/include/periph_conf.h
View File

@ -52,7 +52,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
{
.dev = &SERCOM5->USART,
@ -66,7 +66,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0_RTS_2_CTS_3,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
{
.dev = &SERCOM4->USART,
@ -80,7 +80,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
{
.dev = &SERCOM1->USART,
@ -94,7 +94,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
};
@ -189,7 +189,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 13),
.sda_pin = GPIO_PIN(PA, 12),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

10
boards/sodaq-explorer/include/periph_conf.h
View File

@ -48,7 +48,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0_RTS_2_CTS_3,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
{
.dev = &SERCOM4->USART,
@ -62,7 +62,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
{ /* Connected to RN2483 */
.dev = &SERCOM0->USART,
@ -76,7 +76,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
};
@ -128,7 +128,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 17),
.sda_pin = GPIO_PIN(PA, 16),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE,
},
{
@ -137,7 +137,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 9),
.sda_pin = GPIO_PIN(PA, 8),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

9
boards/sodaq-one/include/periph_conf.h
View File

@ -51,7 +51,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
{
.dev = &SERCOM2->USART,
@ -65,7 +65,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
};
@ -126,7 +126,8 @@ static const spi_conf_t spi_config[] = {
.mosi_mux = GPIO_MUX_C,
.clk_mux = GPIO_MUX_C,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
.gclk_src = 0,
}
};
@ -144,7 +145,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 23),
.sda_pin = GPIO_PIN(PA, 22),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

6
boards/sodaq-sara-aff/include/periph_conf.h
View File

@ -54,7 +54,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
{
.dev = &SERCOM0->USART,
@ -68,7 +68,7 @@ static const uart_conf_t uart_config[] = {
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_2,
.flags = UART_FLAG_NONE,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0
.gclk_src = 0
},
};
@ -120,7 +120,7 @@ static const i2c_conf_t i2c_config[] = {
.scl_pin = GPIO_PIN(PA, 17),
.sda_pin = GPIO_PIN(PA, 16),
.mux = GPIO_MUX_C,
.gclk_src = GCLK_CLKCTRL_GEN_GCLK0,
.gclk_src = 0,
.flags = I2C_FLAG_NONE
}
};

15
cpu/sam0_common/include/periph_cpu_common.h
View File

@ -219,7 +219,7 @@ typedef struct {
uart_rxpad_t rx_pad; /**< pad selection for RX line */
uart_txpad_t tx_pad; /**< pad selection for TX line */
uart_flag_t flags; /**< set optional SERCOM flags */
uint32_t gclk_src; /**< GCLK source which supplys SERCOM */
uint8_t gclk_src; /**< GCLK source which supplys SERCOM */
} uart_conf_t;
/**
@ -284,6 +284,7 @@ typedef struct {
gpio_mux_t clk_mux; /**< alternate function for CLK pin (mux) */
spi_misopad_t miso_pad; /**< pad to use for MISO line */
spi_mosipad_t mosi_pad; /**< pad to use for MOSI and CLK line */
uint8_t gclk_src; /**< GCLK source which supplys SERCOM */
} spi_conf_t;
/** @} */
@ -338,7 +339,7 @@ typedef struct {
uint32_t pm_mask; /**< PM_APBCMASK bits to enable Timer */
uint16_t gclk_ctrl; /**< GCLK_CLKCTRL_ID for the Timer */
#endif
uint16_t gclk_src; /**< GCLK source which supplys Timer */
uint8_t gclk_src; /**< GCLK source which supplys Timer */
uint16_t prescaler; /**< prescaler used by the Timer */
uint16_t flags; /**< flags for CTRA, e.g. TC_CTRLA_MODE_COUNT32 */
} tc32_conf_t;
@ -484,22 +485,22 @@ static inline uint8_t _sercom_gclk_id_core(uint8_t sercom_id) {
* @param[in] sercom SERCOM device
* @param[in] gclk Generator clock
*/
static inline void sercom_set_gen(void *sercom, uint32_t gclk)
static inline void sercom_set_gen(void *sercom, uint8_t gclk)
{
const uint8_t id = sercom_id(sercom);
#if defined(CPU_FAM_SAMD21)
GCLK->CLKCTRL.reg = (GCLK_CLKCTRL_CLKEN | gclk |
GCLK->CLKCTRL.reg = (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN(gclk) |
(SERCOM0_GCLK_ID_CORE + id));
while (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY) {}
#elif defined(CPU_FAM_SAMD5X)
GCLK->PCHCTRL[_sercom_gclk_id_core(id)].reg = (GCLK_PCHCTRL_CHEN | gclk);
GCLK->PCHCTRL[_sercom_gclk_id_core(id)].reg = (GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN(gclk));
#else
if (id < 5) {
GCLK->PCHCTRL[SERCOM0_GCLK_ID_CORE + id].reg = (GCLK_PCHCTRL_CHEN | gclk);
GCLK->PCHCTRL[SERCOM0_GCLK_ID_CORE + id].reg = (GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN(gclk));
}
#if defined(CPU_FAM_SAML21)
else {
GCLK->PCHCTRL[SERCOM5_GCLK_ID_CORE].reg = (GCLK_PCHCTRL_CHEN | gclk);
GCLK->PCHCTRL[SERCOM5_GCLK_ID_CORE].reg = (GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN(gclk));
}
#endif /* CPU_FAM_SAML21 */
#endif

2
cpu/sam0_common/periph/i2c.c
View File

@ -92,7 +92,7 @@ void i2c_init(i2c_t dev)
sercom_clk_en(bus(dev));
/* I2C using CLK GEN 0 */
sercom_set_gen(bus(dev),i2c_config[dev].gclk_src);
sercom_set_gen(bus(dev), i2c_config[dev].gclk_src);
/* Check if module is enabled. */
if (bus(dev)->CTRLA.reg & SERCOM_I2CM_CTRLA_ENABLE) {

4
cpu/sam0_common/periph/timer.c
View File

@ -88,10 +88,10 @@ int timer_init(tim_t tim, unsigned long freq, timer_cb_t cb, void *arg)
timer_stop(tim);
#ifdef MCLK
GCLK->PCHCTRL[cfg->gclk_id].reg = cfg->gclk_src | GCLK_PCHCTRL_CHEN;
GCLK->PCHCTRL[cfg->gclk_id].reg = GCLK_PCHCTRL_GEN(cfg->gclk_src) | GCLK_PCHCTRL_CHEN;
*cfg->mclk |= cfg->mclk_mask;
#else
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | cfg->gclk_src | cfg->gclk_ctrl;
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN(cfg->gclk_src) | cfg->gclk_ctrl;
PM->APBCMASK.reg |= cfg->pm_mask;
#endif