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Commit Graph

33 Commits

Author SHA1 Message Date
Joshua DeWeese
4ed36bf871 boards/nucleo-f767zi: increase ADC clock speed
This patch increases the board's ADC clock speed to the MCU's maximum
speed.
2024-05-10 22:07:11 -04:00
Marian Buschsieweke
4d6fb6e487
boards/nucleo-f767zi: add PWM config
This is a verbatim copy of the PWM config of `boards/nucleo-f746zg`.
However, those boards are almost identical. I successfully tested
the configuration via https://github.com/RIOT-OS/RIOT/pull/18392
2022-08-04 08:53:25 +02:00
Fabian Hüßler
9163d78910 boards: add VBAT for stm32 based boards with ADC 2022-02-21 10:49:43 +01:00
Fabian Hüßler
4e8c979e7d boards/nucleo-f767zi: fix adc_config indentation 2022-02-20 09:44:41 +01:00
Stefan Strell
ccf31eb15d boards/nucleo-f767zi: Fix adc pin config in periph_conf.h 2022-01-24 18:12:25 +01:00
796e127df9
boards/stm32: replace GPIO_UNDEF with SPI_CS_UNDEF 2022-01-06 12:34:09 +01:00
AravindKarri
e9691e61c2 boards/nucleo-f767zi: add ADC support 2021-01-24 22:31:38 +01:00
Benjamin Valentin
0ed34cdb4d cpu/stm32: periph_eth: drop addr from eth_conf_t
MAC address is now supplied by EUI provider, no need to hard-code
it for the board.
2020-11-29 23:11:14 +01:00
39e06babf5
boards/stm32: use generic clk_conf.h header 2020-10-27 08:44:56 +01:00
Marian Buschsieweke
bedddce263
boards/nucleo-{f207zg,f746zg,f767zi}: periph_eth
Use shared MII register definitions from mii.h rather than own definitions.
2020-10-12 08:46:20 +02:00
Marian Buschsieweke
a30872bec1
boards/nucleo-{f207zg,f746zg,f767zi}: periph_conf
Fix PHY address in eth_config. It should be 0 for these boards, not 1. This is
why previously the link status read out worked with an hard code PHY address
0 before.

Some dubious references for 0 being the correct PHY address and not 1 (in
absence of proper references):

https://www.carminenoviello.com/2016/01/22/getting-started-stm32-nucleo-f746zg/
https://community.st.com/s/question/0D50X00009XkgfISAR/stm32f767-nucleo-ethernet-not-working
2020-10-09 20:20:54 +02:00
e1ee49ebe2
boards/stm32f7*: use new clock configuration scheme 2020-10-06 16:10:05 +02:00
Marian Buschsieweke
fdeb5d7eda
boards/nucleo-{f207zg,f756zg,f767zi}: Update periph_conf.h
Rename `mac` --> `addr` (as done in header)
2020-10-05 16:04:25 +02:00
2fad084504
nucleo-f767zi: remove obsolete spi_divtable include 2020-08-18 16:55:07 +02:00
Marian Buschsieweke
51fe77afa4
cpu/stm32/periph_eth: configurable buffer size
1. Move buffer configuration from boards to cpu/stm32
2. Allow overwriting buffer configuration
    - If the default configuration ever needs touching, this will be due to a
      use case and should be done by the application rather than the board
3. Reduce default RX buffer size
    - Now that handling of frames split up into multiple DMA descriptors works,
      we can make use of this

Note: With the significantly smaller RX buffers the driver will now perform
much worse when receiving data at maximum throughput. But as long as frames
are small (which is to be expected for IoT or boarder gateway scenarios) the
performance should not be affected.
2020-08-17 20:29:29 +02:00
97f98dcace
boards/stm32: remove useless ifdef around DMA config 2020-05-25 13:23:20 +02:00
Marian Buschsieweke
f56a0a5128
boards/nucleo-f767zi: Remap MOSI of SPI1 when used with stm32_eth
PA7 is the default MOSI pin, as it is required for compatibility with
Arduino(ish) shields. Sadly, it is also connected to the RMII_DV of
Ethernet PHY. This commit works around this by remapping the MOSI to PB5 when
the on-board Ethernet PHY is used.
2020-05-19 20:30:24 +02:00
8198c52d17
nucleo-f767zi: add usbdev feature 2020-02-11 15:50:20 +01:00
Yannick Gicquel
d37adee32d boards/stm32-based: allow SPI signals routed on multiple alternate functions
There is no hardware limitation for custom boards based on STM32 to uses
SPI bus with signals coming from different PORT and alternate functions.

This patch allow alternate's function definition per pin basis, thus enable
the support of SPI bus signals routed on differents PORT.

Signed-off-by: Yannick Gicquel <ygicquel@gmail.com>
2019-10-25 06:27:41 +02:00
Benjamin Valentin
8af04cd939 boards: make use of ARRAY_SIZE macro 2019-08-06 19:43:54 +02:00
Francisco
b8cd3c0724
Merge pull request #11809 from aabadie/pr/boards/stm32_timer_conf_common
boards/stm32: introduce common timer configurations and use them where possible
2019-08-06 17:07:22 +02:00
e7e3f15d5d
boards/nucleo-f0/3/7: use common timer configuration 2019-08-05 15:00:11 +02:00
1e7409a4f0
boards/nucleo*: cleanup board doxygen group definition
These boards were providing an empty doc.txt and the group definition was still in the periph_conf.h file
2019-07-07 17:56:54 +02:00
9e6d558596
stm32_eth: Code cleanup and some fixes
cpu/stm32_common: cleanup periph eth
boards/nucleo-f767zi: cleanup dependencies
boards/nucleo-f767zi: fix dma configuration attribute for eth
examples/default: add nucleo-767zi in boards with netif
drivers/stm_32_eth: Add header guard for eth_config

Co-authored-By: Robin <robin@chilio.net>
2019-07-04 15:27:50 +02:00
Robin
4729bea46e
stm32_eth: Multiple Improvements of the original codebase
stm32eth: Move to stm32_common periph
cpu/stm32_periph_eth: Rebase to current master branch

- Update DMA to use new vendor headers
- Update send to use iolist. It looks like the packet headers are now transfered as seperate iolist entries which results in the eth periph sending each header as own packet. To fix this a rather ugly workaround is used where the whole iolist content is first copied to a static buffer. This will be fixed soon in another commit
- If MAC is set to zero use luid to generate one
- Small code style fixes

cpu/stm312f7: Add periph config for on-board ethernet
boards/nucleo-f767zi: Add config for on board ethernet
tests/stm32_eth_lwip: Remove board restriction
boards/common/nucleo: Add luid module if stm32 ethernet is used
tests/stm32_eth_gnrc: Add Testcase for gnrc using the stm32 eth periph
stm32_eth: Rework netdev driver layour
tests/stm32_eth_*: Use netdev driver header file for prototypes
stm32_eth: Add auto init for stm32 eth netdev driver
boards/stm32: Enable ethernet conf for nucleo boards
stm32_eth_auto_init: Add dont be pendantic flag
stm32_eth: Remove dma specific stuff from periph_cpu.h

Looks like this was implemented in PR #9171 and 021697ae94 with the same interface.

stm32_eth: Remove eth feature from stm32f4discovery boards
stm32_eth: Migrate to stm32 DMA API
stm32_eth: Add iolist to module deps
stm32_eth: Rework send function to use iolist
stm32_eth: Fix ci build warnings
stm32_eth: Fix bug introduced with iolist usage
stm32_eth: Remove redundant static buffer
stm32_eth: Fix feature dependencies
stm32_eth: Fix wrong header guard name
stm32_eth: Implement correct l2 netstats interface
stm32_eth: Rename public functions to stm32_eth_*
stm32_eth: Fix doccheck
stm32_eth: Move register DEFINE to appropriate header file
stm32_eth: remove untested configuration for f446ze boards
stm32_eth: Move periph configuration struct to stm32_common
stm32_eth: Fix naming of eth_phy_read and eth_phy_write
stm32_eth: Remove obsolete test applications
2019-07-04 15:27:26 +02:00
f153429f69
boards/stm32: add rtt features to stm32f7 based boards 2019-05-23 14:49:39 +02:00
Felix B
d185767070 boards/nucleo-f767zi: add spi config 2019-05-21 17:39:03 +02:00
Marian Buschsieweke
61e1068eba
boards/nucleo-f767zi: Add SPI settings 2019-05-21 13:19:42 +02:00
Marian Buschsieweke
d00becbc4b
boards/nucleo-f767zi: Use shared clock settings
Use boards/common/stm32/include/f7/cfg_clock_216_8_1.h for core clock settings
2019-03-25 15:51:30 +01:00
294711d9ba boards/nucleo-f767zi: configure and use DMA 2019-01-08 09:32:18 +01:00
402f02d471 boards/nucleo-f767zi: use STM32 common i2c config 2019-01-02 16:06:34 +01:00
973a6a4c93 boards/stm32: remove unnecessary ADC defines in board config 2019-01-02 09:15:22 +01:00
31fba044e5 boards/nucleo-f767zi: rename to standard st name 2018-05-23 12:09:28 +02:00