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stm32_eth: Code cleanup and some fixes

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cpu/stm32_common: cleanup periph eth
boards/nucleo-f767zi: cleanup dependencies
boards/nucleo-f767zi: fix dma configuration attribute for eth
examples/default: add nucleo-767zi in boards with netif
drivers/stm_32_eth: Add header guard for eth_config

Co-authored-By: Robin <robin@chilio.net>
This commit is contained in:
Alexandre Abadie 2019-05-21 15:47:17 +02:00
parent 4729bea46e
commit 9e6d558596
No known key found for this signature in database
GPG Key ID: 1C919A403CAE1405
6 changed files with 68 additions and 59 deletions
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1
boards/nucleo-f767zi/Makefile.features
View File

@ -7,7 +7,6 @@ FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
FEATURES_PROVIDED += periph_eth
FEATURES_PROVIDED += periph_stm32_eth
# load the common Makefile.features for Nucleo boards
include $(RIOTBOARD)/common/nucleo144/Makefile.features

25
boards/nucleo-f767zi/include/periph_conf.h
View File

@ -40,7 +40,7 @@ static const dma_conf_t dma_config[] = {
{ .stream = 4 }, /* DMA1 Stream 4 - USART3_TX */
{ .stream = 14 }, /* DMA2 Stream 6 - USART6_TX */
{ .stream = 6 }, /* DMA1 Stream 6 - USART2_TX */
{ .stream = 8 }, /* DMA2 Stream 8 - ETH_TX */
{ .stream = 8 }, /* DMA2 Stream 0 - ETH_TX */
};
#define DMA_0_ISR isr_dma1_stream4
@ -160,26 +160,16 @@ static const spi_conf_t spi_config[] = {
#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
/** @} */
/**
* @name ETH configuration
* @{
*/
#define ETH_NUMOF (1)
#define ETH_RX_BUFFER_COUNT (4)
#define ETH_TX_BUFFER_COUNT (4)
#define ETH_RX_BUFFER_SIZE (1524)
#define ETH_TX_BUFFER_SIZE (1524)
#define ETH_DMA_ISR isr_dma2_stream0
static const eth_conf_t eth_config = {
.mode = RMII,
.mac = { 0 },
.speed = ETH_SPEED_100TX_FD,
.dma_chan = 0,
.dma_stream = 8,
.dma = 3,
.dma_chan = 8,
.phy_addr = 0x01,
.pins = {
GPIO_PIN(PORT_G, 13),
@ -193,6 +183,15 @@ static const eth_conf_t eth_config = {
GPIO_PIN(PORT_A, 1),
}
};
#define ETH_RX_BUFFER_COUNT (4)
#define ETH_TX_BUFFER_COUNT (4)
#define ETH_RX_BUFFER_SIZE (1524)
#define ETH_TX_BUFFER_SIZE (1524)
#define ETH_DMA_ISR isr_dma2_stream0
/** @} */
#ifdef __cplusplus

47
cpu/stm32_common/include/periph_cpu_common.h
View File

@ -708,30 +708,38 @@ int dma_configure(dma_t dma, int chan, const volatile void *src, volatile void *
#include "candev_stm32.h"
#endif
#ifdef MODULE_STM32_ETH
/**
* @brief STM32 Ethernet configuration mode
*/
typedef enum {
MII = 18, /**< Configuration for MII */
RMII = 9, /**< Configuration for RMII */
SMI = 2, /**< Configuration for SMI */
} eth_mode_t;
/**
* @brief STM32 Ethernet speed options
*/
typedef enum {
ETH_SPEED_10T_HD = 0x0000,
ETH_SPEED_10T_FD = 0x0100,
ETH_SPEED_100TX_HD = 0x2000,
ETH_SPEED_100TX_FD = 0x2100,
} eth_speed_t;
/**
* @brief Ethernet Peripheral configuration
*/
typedef struct {
enum {
MII = 18, /**< Configuration for MII */
RMII = 9, /**< Configuration for RMII */
SMI = 2, /**< Configuration for SMI */
} mode; /**< Select configuration mode */
enum {
ETH_SPEED_10T_HD = 0x0000,
ETH_SPEED_10T_FD = 0x0100,
ETH_SPEED_100TX_HD = 0x2000,
ETH_SPEED_100TX_FD = 0x2100,
} speed; /**< Speed selection */
uint8_t dma; /**< Locical CMA Descriptor used for TX */
uint8_t dma_chan; /**< DMA channel used for TX */
char mac[6]; /**< Et hernet MAC address */
char phy_addr; /**< PHY address */
gpio_t pins[]; /**< Pins to use. MII requires 18 pins,
RMII 9 and SMI 9. Not all speeds are
supported by all modes. */
eth_mode_t mode; /**< Select configuration mode */
char mac[6]; /**< Ethernet MAC address */
eth_speed_t speed; /**< Speed selection */
uint8_t dma; /**< Locical CMA Descriptor used for TX */
uint8_t dma_chan; /**< DMA channel used for TX */
char phy_addr; /**< PHY address */
gpio_t pins[]; /**< Pins to use. MII requires 18 pins,
RMII 9 and SMI 9. Not all speeds are
supported by all modes. */
} eth_conf_t;
/**
@ -848,6 +856,7 @@ typedef struct {
#define ANER_LP_AN_ABLE (0x0001)
/** @} */
#ifdef MODULE_STM32_ETH
/**
* @brief Read a PHY register
*

50
cpu/stm32_common/periph/eth.c
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup cpu_stm32f4
* @ingroup cpu_stm32_common
* @{
*
* @file
@ -17,16 +17,20 @@
*
* @}
*/
#include <string.h>
#include "mutex.h"
#include "periph/gpio.h"
#include "luid.h"
#include "net/ethernet.h"
#include "iolist.h"
#include "net/ethernet.h"
#include "periph/gpio.h"
#define ENABLE_DEBUG (0)
#include "debug.h"
#include <string.h>
#if ETH_NUMOF
/* Set the value of the divider with the clock configured */
#if !defined(CLOCK_CORECLOCK) || CLOCK_CORECLOCK < (20000000U)
#error This peripheral requires a CORECLOCK of at least 20MHz
@ -83,7 +87,7 @@ static unsigned _rw_phy(unsigned addr, unsigned reg, unsigned value)
{
unsigned tmp;
while (ETH->MACMIIAR & ETH_MACMIIAR_MB) ;
while (ETH->MACMIIAR & ETH_MACMIIAR_MB) {}
DEBUG("stm32_eth: rw_phy %x (%x): %x\n", addr, reg, value);
tmp = (ETH->MACMIIAR & ETH_MACMIIAR_CR) | ETH_MACMIIAR_MB;
@ -92,7 +96,7 @@ static unsigned _rw_phy(unsigned addr, unsigned reg, unsigned value)
ETH->MACMIIDR = (value & 0xffff);
ETH->MACMIIAR = tmp;
while (ETH->MACMIIAR & ETH_MACMIIAR_MB) ;
while (ETH->MACMIIAR & ETH_MACMIIAR_MB) {}
DEBUG("stm32_eth: %lx\n", ETH->MACMIIDR);
return (ETH->MACMIIDR & 0x0000ffff);
@ -150,10 +154,11 @@ static void _init_buffer(void)
for (i = 0; i < ETH_TX_BUFFER_COUNT; i++) {
tx_desc[i].status = TX_DESC_TCH | TX_DESC_CIC;
tx_desc[i].buffer_addr = &tx_buffer[i][0];
if((i+1) < ETH_RX_BUFFER_COUNT) {
if ((i + 1) < ETH_RX_BUFFER_COUNT) {
tx_desc[i].desc_next = &tx_desc[i + 1];
}
}
tx_desc[i - 1].desc_next = &tx_desc[0];
rx_curr = &rx_desc[0];
@ -181,8 +186,8 @@ int stm32_eth_init(void)
}
/* enable all clocks */
RCC->AHB1ENR |= (RCC_AHB1ENR_ETHMACEN | RCC_AHB1ENR_ETHMACTXEN
| RCC_AHB1ENR_ETHMACRXEN | RCC_AHB1ENR_ETHMACPTPEN);
RCC->AHB1ENR |= (RCC_AHB1ENR_ETHMACEN | RCC_AHB1ENR_ETHMACTXEN |
RCC_AHB1ENR_ETHMACRXEN | RCC_AHB1ENR_ETHMACPTPEN);
/* reset the peripheral */
RCC->AHB1RSTR |= RCC_AHB1RSTR_ETHMACRST;
@ -190,10 +195,10 @@ int stm32_eth_init(void)
/* software reset */
ETH->DMABMR |= ETH_DMABMR_SR;
while (ETH->DMABMR & ETH_DMABMR_SR) ;
while (ETH->DMABMR & ETH_DMABMR_SR) {}
/* set the clock divider */
while (ETH->MACMIIAR & ETH_MACMIIAR_MB) ;
while (ETH->MACMIIAR & ETH_MACMIIAR_MB) {}
ETH->MACMIIAR = CLOCK_RANGE;
/* configure the PHY (standard for all PHY's) */
@ -208,18 +213,19 @@ int stm32_eth_init(void)
/* pass all */
//ETH->MACFFR |= ETH_MACFFR_RA;
/* perfect filter on address */
ETH->MACFFR |= ETH_MACFFR_PAM | ETH_MACFFR_DAIF;
ETH->MACFFR |= (ETH_MACFFR_PAM | ETH_MACFFR_DAIF);
/* store forward */
ETH->DMAOMR |= ETH_DMAOMR_RSF | ETH_DMAOMR_TSF | ETH_DMAOMR_OSF;
ETH->DMAOMR |= (ETH_DMAOMR_RSF | ETH_DMAOMR_TSF | ETH_DMAOMR_OSF);
/* configure DMA */
ETH->DMABMR = ETH_DMABMR_DA | ETH_DMABMR_AAB | ETH_DMABMR_FB |
ETH_DMABMR_RDP_32Beat | ETH_DMABMR_PBL_32Beat | ETH_DMABMR_EDE;
ETH->DMABMR = (ETH_DMABMR_DA | ETH_DMABMR_AAB | ETH_DMABMR_FB |
ETH_DMABMR_RDP_32Beat | ETH_DMABMR_PBL_32Beat | ETH_DMABMR_EDE);
if(eth_config.mac[0] != 0) {
stm32_eth_set_mac(eth_config.mac);
} else {
}
else {
luid_get(hwaddr, ETHERNET_ADDR_LEN);
stm32_eth_set_mac(hwaddr);
}
@ -264,8 +270,7 @@ int stm32_eth_send(const struct iolist *iolist)
tx_curr->status &= 0x0fffffff;
dma_acquire(eth_config.dma);
for (; iolist; iolist = iolist->iol_next)
{
for (; iolist; iolist = iolist->iol_next) {
ret += dma_transfer(eth_config.dma, eth_config.dma_chan, iolist->iol_base,
tx_curr->buffer_addr+ret, iolist->iol_len, DMA_MEM_TO_MEM, DMA_INC_BOTH_ADDR);
}
@ -295,14 +300,13 @@ static int _try_receive(char *data, int max_len, int block)
int copy, len = 0;
int copied = 0;
int drop = (data || max_len > 0);
edma_desc_t *p = rx_curr;
for (int i = 0; i < ETH_RX_BUFFER_COUNT && len == 0; i++) {
/* try receiving, if the block is set, simply wait for the rest of
* the packet to complete, otherwise just break */
while (p->status & DESC_OWN) {
if (block) {
}
else {
if (!block) {
break;
}
}
@ -354,5 +358,3 @@ void stm32_eth_isr_eth_wkup(void)
{
cortexm_isr_end();
}
#endif

2
drivers/stm32_eth/stm32_eth.c
View File

@ -154,4 +154,4 @@ void stm32_eth_netdev_setup(netdev_t *netdev)
{
_netdev = netdev;
netdev->driver = &netdev_driver_stm32f4eth;
}
}

2
examples/default/Makefile
View File

@ -39,7 +39,7 @@ USEMODULE += saul_default
BOARD_PROVIDES_NETIF := acd52832 airfy-beacon b-l072z-lrwan1 cc2538dk fox \
iotlab-m3 iotlab-a8-m3 lobaro-lorabox lsn50 mulle microbit native nrf51dk \
nrf51dongle nrf52dk nrf52840dk nrf52840-mdk nrf6310 \
nrf51dongle nrf52dk nrf52840dk nrf52840-mdk nrf6310 nucleo-f767zi \
openmote-cc2538 pba-d-01-kw2x remote-pa remote-reva samr21-xpro \
spark-core telosb yunjia-nrf51822 z1