This patch implements the real time clock module for the QN908X cpus.
This module is very straightforward with only the one notable drawback
that it doesn't have a match register like the CTIMER block to implement
the alarm function. Instead, this driver can only use the interrupt
generated ever 1 second to implement the alarm match comparison in
software.
The IRQ for each GPIO port needs to be enabled in the NVIC on top of
enabling the corresponding bit in the GPIO port.
This was not caught in tests before because I was testing with a larger
stack of commits (including UART and timers) which also had this fix.
Manually poking the GPIOs while using tests/periph_gpio now properly
fires the interrupts.
The QN908x CPU has several timer modules: one RTC (Real-Time Clock) that
can count from the 32kHz internal clock or 32.768 kHz external clock,
four CTIMER that use the APB clock and have four channels each and one
SCT timer with up to 10 channels running on the AHB clock.
This patch implements a timer driver for the CTIMER blocks only, which
is enough to make the xtimer module work. Future patches should improve
on this module to support using the RTC CNT2 32-bit free-running
counter unit and/or the SCT timer.
GPIO_BOTH gpio_flank_t; UART_PARTY_MARK and UART_PARTY_SPACE in
uart_parity_t; and UART_DATA_BITS_5 and UART_DATA_BITS_6
uart_data_bits_t enum values where missing from the periph_cpu.h header
since they are not supported by the CPU. This was causing some tests to
fail to compile, but only after adding the periph_timer module.
This patch adds those missing macros and makes the corresponding
functions fail when trying to use them.
A minor fix to the NWDT_TIME_LOWER_LIMIT value setting it to 1U to avoid
a -Werror=type-limits error in the tests/periph_wdt test. In theory 0
is a totally valid value although a bit useless since it will trigger
the WDT right away.
The QN908x has four FLEXCOMM interfaces that support a subset of UART,
SPI or I2C each one. This patch adds generic support for dealing with
the FLEXCOMM initialization and interrupts and adds a driver for
RX/TX support in UART.
With this patch is now possible to use a shell on the device over UART.
QN908X CPUs require the image to have a valid checksum. The checksum is
a simple addition of the first 7 uint32_t values stored in the 8th
position of the image header. This position is a reseved entry of the
Cortex-M Vector Table and its value depends on other fields that are
computed at link time. Performing this checksum at link time seems
hard to do, so instead this patch uses a python script to patch the
checksum from the ELF file. This redefines the value of FLASHFILE
to the new .elf file with the checksum fixed.
With this patch, OpenOCD can program and verify QN908X images since
now they have a valid checksum value.
Allow using `event_loop_multi()` to handle event queues of multiple priorities
in an single thread. In the extreme case, all three event queues are handled
by a single thread (thus saving two stacks). This comes for the price of
increased worst case latency, as already running event handlers will no longer
be preempted by higher priority events.
With this, all three event queue priorities are always provided. Using modules,
the old behavior of one thread per event queue can be restored for better worst
case latency at the expense of additional thread size.
