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Commit Graph

55 Commits

Author SHA1 Message Date
Vincent Dupont
74ddf56171 tests/conn_can: build stm32 CAN drivers
Build can_stm32 module on boards which have a stm32 CAN controller.
2019-04-03 11:12:46 +02:00
Vincent Dupont
ae95137f95 can stm32: add a driver for STM32 bxCAN peripheral
This driver is compliant with the candev interface. It has been tested
with STM32F0 and STM32F2 and STM32F413 ONLY at this time but should be
compliant with other STM32Fx devices
2019-03-29 12:03:43 +01:00
2e0a818502
cpu/stm32: all stm32 families now provide pm support 2019-03-21 19:39:16 +01:00
84f9f63ab8
cpu/stm32_common: implement low-power modes for F7 2019-03-21 19:39:16 +01:00
679fee7f9c
cpu/stm32_common: implement low-power modes for L4 2019-03-21 19:39:15 +01:00
Vincent Dupont
7590d528b8 cpu/stm32f0: add pm_layered support 2019-03-19 17:53:12 +01:00
Vincent Dupont
e83f27140a cpu/stm32_common: refactor pm implementation 2019-03-19 17:51:19 +01:00
francisco
4dda8abecb cpu/stm32l1: add support for STOP & STAND_BY mode 2019-03-13 09:57:17 +01:00
Yegor Yefremov
97d0851de1 cpu/stm32_common: fix UART documentation
Don't include overridden typedefs into doxygen as otherwise,
they'll appear twice.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2019-02-06 12:46:27 +01:00
Yegor Yefremov
60f745a033 cpu/stm32_common: add support for uart_mode routine
Add support for specifying data bits, stop bits and parity at
runtime.

Introduce feature periph_uart_modecfg for uart_mode() till all
other CPUs implement it.

STM32 L1, F1, F2, F4 supports following modes:

* 7E1, 7E2
* 7O1, 7O2
* 8N1, 8N2
* 8E1, 8E2
* 8O1, 8O2

STM32 L0, L4, F0, F3, F7 supports following modes:

* 6E1, 6E2
* 6O1, 6O2
* 7E1, 7E2
* 7O1, 7O2
* 7N1, 7N2
* 8N1, 8N2
* 8E1, 8E2
* 8O1, 8O2

Use USART_CR1_M1 macro to detect 7-bit support because
even inside one family there could be devices that don't
support 7-bit mode. So just using a family macro is not
enough.

As stated in the datasheets for L0, L4, F0, F3, F7 devices,
data bits can only be changed when UART is disabled (UE=0).
Introduce uart_stop() routine to satisfy this requirement.

STM32 UART adds parity to the MSB of a byte to send. The same
also applies to the received bytes. As a result this bit must
be masked in order to get the pure data.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2019-01-31 14:15:20 +01:00
86c102e85b cpu/stm32_common: move dma attribute at end of config 2019-01-08 09:32:18 +01:00
Vincent Dupont
021697ae94 cpu/stm32_common: adapt DMA driver for f0/1/3/l0/1/4 2019-01-08 09:32:18 +01:00
MrKevinWeiss
f3b2a62c67 cpu/stm_common: Refactor and cleanup i2c_1
Refactor to use common read_regs.
Add error reporting and handling for unsupported low level commands.
Document hardware constraints.
2018-12-20 18:05:11 +01:00
ab061c4ae2
Merge pull request #10608 from MrKevinWeiss/pr/fix/stmi2c2
cpu/stm_common: Refactor and fix implementation for i2c_2
2018-12-20 13:51:39 +01:00
MrKevinWeiss
a2e059d18a cpu/stm_common: Refactor and fix implementation for i2c_2
Refactors i2c_2 to match the structure of i2c_1 better.
Corrects functionality issues.
Allows the common implementation of read_regs and write_regs.
Documents constraints of hardware.
Matches error messages with API.
2018-12-20 12:01:06 +01:00
133968ce8a cpu/stm32_common: add support for lpuart 2018-12-13 12:39:00 +01:00
dylad
69297a0939 cpu/stm32_common: remove scl_af/sda_af attribut for STM32F1 2018-07-25 15:17:43 +02:00
9166fb27fa cpu/stm32_common: split common i2c periph in 2
- i2c_1 is built for f0, f3, f7, l0 and l4
- i2c_2 is built for f4
2018-07-25 12:01:36 +02:00
ebc17acb59 cpu/stm32{f0,f3,f7,l0,l4}: unify i2c driver and use new API 2018-07-25 12:01:35 +02:00
Vincent Dupont
d399518ac6 cpu/stm32_common: add DMA implementation for F2/F4/F7 2018-05-23 11:09:46 +02:00
Aurelien Fillau
0368239a63 cpu/stm32l0: power management updated
Now, MCU is able to go in stop mode if necessary when
periph_pm feature is activated.
Regarding LPSDSR bit that deactivates or not regulator in stop
mode, it is up to the user to set/clear this bit. In order
to save power, voltage regulator can be set in low power state
during stop mode but it increases wakeup time.

Signed-off-by: Aurelien Fillau <aurelien.fillau@gmail.com>
2018-03-11 11:01:25 +01:00
Vincent Dupont
c01e8629ec cpu/stm32_common: add PM modes 2018-03-06 15:12:58 +01:00
Gilles DOFFE
bee493ac71 cpu/stm32_common: add qdec implementation
* Add support for the STM32 encoder interface
* The STM32 only supports X2 and X4 modes.
* Enable interrupt handler on counter overflow
* Add simple test code for QDEC based on nucleo-f401 board

Signed-off-by: Gilles DOFFE <g.doffe@gmail.com>
2018-02-23 23:17:26 +01:00
George Hopkins
ebd525306a cpu/stm32_common: consider timer multiplier for PWM 2017-11-10 17:25:13 +01:00
Hauke Petersen
5920d99752 pm: fix weak-based default implementations
Instead of using `weak` function definitions, this PR handles
default implementations using `PROVIDES_x` defines, allowing
for cpus/pm realted modules to use their own implementations.
2017-10-16 14:27:35 +02:00
Hauke Petersen
5a35517787 cpu/stm32: optimized definition of CPUID_ADDR 2017-10-13 16:03:32 +02:00
Vincent Dupont
be588c2f0e cpu/stm32_common: use pseudomodule for UART HW FC 2017-10-10 14:09:05 +02:00
Hauke Petersen
265173806e cpu/stm32: added model specific LSI clock speeds 2017-08-23 15:39:16 +02:00
Hauke Petersen
5422f0da72 stm32: unified parts of stmclk implementations
- unified dbp, hsi, and lfclk functions
- all of them now work for all STM32 CPUs
- renamed from bdp to dbp as this is the expression used
  in the reference manuals (old naming was a typo...)
2017-08-21 17:40:22 +02:00
Hauke Petersen
73ede74cd8 cpu/stm32: unified and cleaned up DAC driver
- removed neccessity to define empty `DAC_NUMOF 0` for each STM
  base board
- adapted all board configs to this
- joined stm32f2 to use common DAC driver
- improved code of DAC driver
2017-06-29 13:03:12 +02:00
Hauke Petersen
7079d481c7 cpu/stm32: added support for STM32F7 2017-05-08 09:16:12 +02:00
Hauke Petersen
4b9935b4f2 cpu/stm32_common: added common clk interface 2017-04-26 12:50:43 +02:00
Joakim Nohlgård
6cda6a6560 periph/cpuid: Unify implementations to a common driver for several platforms 2017-04-05 09:03:49 +02:00
Hauke Petersen
964deefc39 cpu: added support for stm32l4 2017-03-30 16:58:34 +02:00
Vincent Dupont
b34611273c Merge pull request #6336 from OTAkeys/pr/stm32_uart
cpu/stm32_common: add UART HW flow control
2017-03-29 12:47:49 +02:00
Vincent Dupont
a8da073f51 cpu/stm32_common: add UART HW flow control 2017-03-29 09:35:29 +02:00
Vincent Dupont
7b686b3015 cpu/stm32_common: unify gpio driver 2017-03-13 15:09:12 +01:00
5bd4ba6da0 cpu/stm32l0: add support for stm32l0 cpu family 2017-02-24 16:12:00 +01:00
Hauke Petersen
0edef2a0e1 cpu/stm32*+boards: adapted to new SPI API
- adapted the SPI driver
- adapted all boards using the CPU
2017-01-25 16:46:45 +01:00
245f60edfa cpu: fix typo in author email 2017-01-19 21:45:23 +01:00
Hauke Petersen
346b51d9fa cpu/stm32/pwm: made channel config more flexible 2017-01-17 14:08:13 +01:00
9d1c5f02d7 cpu: stm32_common: periph_cpu_common.h doxygen fix 2017-01-12 16:26:03 +01:00
5798beca64 cpu: stm32f1/2/4: unify periph/pm support 2017-01-12 16:26:02 +01:00
Hauke Petersen
625d804fcb cpu/stm32_common: unified UART driver 2017-01-05 11:00:18 +01:00
Hauke Petersen
5afb191027 cpu/stm32x: unified gpio_init_af() function 2017-01-05 10:58:54 +01:00
Pieter Willemsen
2b37d369a0 stm32_common: add delay when turn on peripheral clock
Implements workaround 1 (use __DSB()) proposed in the stm32 errata
It was possible to lose data when you configure a peripheral
right after enabling its clock
2016-12-16 14:51:35 +01:00
Hauke Petersen
4d09d09ee4 cpu/stm32x: unified PWM driver 2016-12-15 12:18:39 +01:00
Hauke Petersen
47b379e45d cpu/stm32x: unified timer driver 2016-12-09 12:20:03 +01:00
Hauke Petersen
7979c3ac5c cpu/stm32_common: added periph_apb_clk() function 2016-12-09 12:20:02 +01:00
DipSwitch
bd9b3a269c cpu/stm32/perip/dac: Move DAC implementation to stm32_common/periph since all STM32 DAC's have the same basics 2016-03-29 22:25:50 +02:00