19717: boards/rpi-pico: update openocd.cfg file r=aabadie a=dylad
### Contribution description
This PR fixes the use of openOCD to flash a rpi-pico board.
Currently on master, trying to flash this board with openOCD (v12) and a CMSIS-DAP probe fails.
with this PR, it now works as expected (even debugging)
Moreover, the configuration file used by RIOT is now deprecated on openOCD v12 so changes it while we're at it.
master:
```
### Flashing Target ###
Open On-Chip Debugger 0.12.0
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
swd
Warn : rp2040-core0.cfg configuration file is deprecated and will be
removed in the next release. Use following parameters instead:
-c 'set USE_CORE 0' -f target/rp2040.cfg
Warn : Transport "swd" was already selected
adapter speed: 4000 kHz
Info : Using CMSIS-DAPv2 interface with VID:PID=0x2e8a:0x000c, serial=E46170D59B552B2C
Info : CMSIS-DAP: SWD supported
Info : CMSIS-DAP: Atomic commands supported
Info : CMSIS-DAP: Test domain timer supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 0 SWDIO/TMS = 0 TDI = 0 TDO = 0 nTRST = 0 nRESET = 0
Info : CMSIS-DAP: Interface ready
Info : clock speed 4000 kHz
Info : SWD DPIDR 0x0bc12477
Error: [rp2040.cpu] Could not find MEM-AP to control the core
Warn : target rp2040.cpu examination failed
Info : starting gdb server for rp2040.cpu on 0
Info : Listening on port 37347 for gdb connections
TargetName Type Endian TapName State
-- ------------------ ---------- ------ ------------------ ------------
0* rp2040.cpu cortex_m little rp2040.cpu unknown
Error: [rp2040.cpu] Could not find MEM-AP to control the core
Error: [rp2040.cpu] Debug AP not available, reset NOT asserted!
make: *** [/home/dylan/work/RIOT/examples/blinky/../../Makefile.include:855: flash] Error 1
make: Leaving directory '/home/dylan/work/RIOT/examples/blinky'
```
with this PR:
```
### Flashing Target ###
Open On-Chip Debugger 0.12.0
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
swd
Warn : Transport "swd" was already selected
adapter speed: 4000 kHz
Info : Using CMSIS-DAPv2 interface with VID:PID=0x2e8a:0x000c, serial=E46170D59B552B2C
Info : CMSIS-DAP: SWD supported
Info : CMSIS-DAP: Atomic commands supported
Info : CMSIS-DAP: Test domain timer supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 0 SWDIO/TMS = 0 TDI = 0 TDO = 0 nTRST = 0 nRESET = 0
Info : CMSIS-DAP: Interface ready
Info : clock speed 4000 kHz
Info : SWD DPIDR 0x0bc12477, DLPIDR 0x00000001
Info : SWD DPIDR 0x0bc12477, DLPIDR 0x10000001
Info : [rp2040.core0] Cortex-M0+ r0p1 processor detected
Info : [rp2040.core0] target has 4 breakpoints, 2 watchpoints
Info : [rp2040.core1] Cortex-M0+ r0p1 processor detected
Info : [rp2040.core1] target has 4 breakpoints, 2 watchpoints
Info : starting gdb server for rp2040.core0 on 0
Info : Listening on port 40985 for gdb connections
Info : starting gdb server for rp2040.core1 on 0
Info : Listening on port 39901 for gdb connections
TargetName Type Endian TapName State
-- ------------------ ---------- ------ ------------------ ------------
0* rp2040.core0 cortex_m little rp2040.cpu running
1 rp2040.core1 cortex_m little rp2040.cpu running
[rp2040.core0] halted due to debug-request, current mode: Thread
xPSR: 0xf1000000 pc: 0x000000ee msp: 0x20041f00
[rp2040.core1] halted due to debug-request, current mode: Thread
xPSR: 0xf1000000 pc: 0x000000ee msp: 0x20041f00
Info : Found flash device 'win w25q16jv' (ID 0x001540ef)
Info : RP2040 B0 Flash Probe: 2097152 bytes `@0x10000000,` in 32 sectors
Info : Padding image section 2 at 0x10003190 with 112 bytes (bank write end alignment)
Warn : Adding extra erase range, 0x10003200 .. 0x1000ffff
auto erase enabled
wrote 12800 bytes from file /home/dylan/work/RIOT/tests/leds/bin/rpi-pico/tests_leds.elf in 1.516848s (8.241 KiB/s)
verified 12688 bytes in 0.089461s (138.503 KiB/s)
shutdown command invoked
Done flashing
```
### Testing procedure
Flash a `rpi-pico` board using openOCD.
### Issues/PRs references
None.
Co-authored-by: dylad <dylan.laduranty@mesotic.com>
19705: boards/z1: fix broken clock configuration r=maribu a=maribu
### Contribution description
The MSP430F2xx family has on RSEL bit more than the MSP430x1xxx family. The first commit updates the clock calibration accordingly.
df5c319978 from https://github.com/RIOT-OS/RIOT/pull/19558 broke the clock configuration of the Z1 by relying on the incorrect documentation of what clock is actually used. Closely reading the convoluted clock initialization code revealed that no XT2 crystal is present (as also indicated by some comments in `board.c`), contradicting the `#define MSP430_HAS_EXTERNAL_CRYSTAL 1` in the `board.h`.
The second commit should restore behavior (but with calibrated DCO than hard coded magic numbers).
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@posteo.net>
df5c319978 from
https://github.com/RIOT-OS/RIOT/pull/19558 broke the clock
configuration of the Z1 by relying on the incorrect documentation of
what clock is actually used. Closely reading the convoluted clock
initialization code revealed that no XT2 crystal is present (as also
indicated by some comments in `board.c`), contradicting the
`#define MSP430_HAS_EXTERNAL_CRYSTAL 1` in the `board.h`.
This now should restore behavior (but with calibrated DCO than
hard coded magic numbers).
The statement about the missing pin 1 marking on the JTAG header is
not correct. It's just a bit hidden between the JTAG header and the
power selector jumper.
This adds the three general purpose timers on STM32L4 boards in a
central place so that STM32L4 boards can just include it.
Some other families may also have TIM15 and TIM16 and could use this,
but likely some generalization is needed to use this for other
families as well. This can be added later on.
19593: boards/msb-430: add documentation r=maribu a=maribu
### Contribution description
This adds basic documentation, schematics, pinouts, and info how to get started with the `msb-430` board.
19597: sys/shell: Add coreclk command to shell_cmd_sys r=maribu a=maribu
### Contribution description
The coreclk shell command now prints the CPU frequency in Hz, which can be useful for boards with RC generated CPU frequency (e.g. RP2040, FE310, or MPS430Fx1xx MCUs allow this) which may quite a bit off the target frequency.
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Provide a common clock initialization driver rather than leaving
clock initialization to the boards code. A declarative description of
the board's clock configuration using a struct does still allow to
fine-tune settings. In addition, a board is still allowed to just
provide a custom `void clock_init(void)` if there really is the need
to do crazy things.
19552: tests: move all periph applications to their own periphs/ folder r=gschorcht a=aabadie
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
19548: boards/telosb: minor clean ups r=maribu a=maribu
### Contribution description
This cleans up the documentation and the header files of the TelosB board. It is supposed to not changed the generated firmware (except for debug symbols).
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
19523: boards/iotlab-m3: enable l3g4200d_ng r=benpicco a=benpicco
19527: drivers/sdcard_spi: small cleanup r=benpicco a=gschorcht
### Contribution description
This PR provides a small cleanup:
- the copy of `sdcard_spi_params_t` is removed (commit bfc2a51f70)
- the documentation was changed to fit the 100 characters per line. (commit 36f0162b34)
It is not necessary to hold a complete copy `sdcard_spi_params_t` in the device descriptor. Constant parameters can be used directly from ROM instead. This saves 24 bytes of RAM.
### Testing procedure
Use any board with SD Card SPI interface. The driver test should still work, for example:
```
BOARD=esp32-wrover-kit make -j8 -C tests/driver_sdcard_spi flash term
```
```
main(): This is RIOT! (Version: 2023.07-devel-176-g7213c-drivers/sdcard_spi_cleanup)
SD-card spi driver test application
insert SD-card and use 'init' command to set card to spi mode
WARNING: using 'write' or 'copy' commands WILL overwrite data on your sd-card and
almost for sure corrupt existing filesystems, partitions and contained data!
> init
Initializing SD-card at SPI_0...
[OK]
>
```
### Issues/PRs references
19530: sys/xtimer: add missing "modules.h" include to `xtimer.h` r=benpicco a=kaspar030
19532: tests/unittests: tests-core-mbox: add missing `container.h` include r=benpicco a=kaspar030
19533: core: move macros/math.h to core/lib/include/macros r=benpicco a=kaspar030
19535: nanocoap_sock: defuse nanocoap_sock_get() API footgun r=benpicco a=benpicco
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Kaspar Schleiser <kaspar@schleiser.de>
19526: boards/arduino-mkrwan1300: update board name to correct one r=aabadie a=FlapKap
Co-authored-by: Kasper Hjort Berthelsen <kasper.berthelsen@hotmail.com>
19516: cpu/rpx0xx: add initial ADC support r=dylad a=dylad
### Contribution description
This PR adds initial support for RP2040 ADC peripheral.
It is rather minimalist, and only use oneshot trigger to perform a single acquisition.
I've tested this PR using a potentiometer connected between GND and 3V3.
GP26, GP27, GP28 has been tested.
### Testing procedure
Select `ADC_RES_12BIT` and flash `tests/periph_adc`
`make BOARD=rpi-pico -C tests/periph_adc`
### Issues/PRs references
None.
Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
19447: boards/nucleo-f429zi: Provide 2nd timer r=benpicco a=maribu
### Contribution description
- Add a common timer config with two (instead of only one) timer using TIM2 + TIM5
- Mostly copy-pasting the cfg_timer_tim2.h and cfg_timer_tim5.h together
- Make use of that for the `nucleo-f429zi`
### Testing procedure
E.g. `tests/periph_timer`, but also grepping for TIM2 and TIM5 in `boards/nucleo-f429zi/include/periph_conf.h` to detect any conflict e.g. between PWM and timer config.
### Issues/PRs references
None
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
