39e06babf5
boards/stm32: use generic clk_conf.h header
2020-10-27 08:44:56 +01:00
9dd20c0ccb
cpu: boards: stm32l4/wb: use IS_USED for clock where possible
2020-09-08 18:42:42 +02:00
79e6d9df85
boards/stm32l4*: adapt to new clock configuration
2020-09-08 18:42:42 +02:00
95057a8aef
boards/stm32l4: rename common clock config header
2020-09-08 18:42:41 +02:00
2f3f1e0da2
p-l496g-cell02: remove obsolete spi_divtable include
2020-08-18 16:55:12 +02:00
7b9f435f70
boards/stm32l4: use common spi_divtable where possible
2020-08-07 12:25:18 +02:00
847af73500
boards/p-l496g-cell02: model features in Kconfig
2020-07-16 11:34:04 +02:00
facb626b02
boards/stm32*: adapt for new stm32 cpu organization
2020-05-20 13:39:10 +02:00
9cc338d29e
boards/nucleo-l4*: use shared clock configuration
2020-04-07 17:42:56 +02:00
Dylan Laduranty
a33e61e997
boards/stm32: update to use generic uart_hw_fc module
2020-03-10 14:34:11 +01:00
ef3b8b15e0
boards/p-l496g-cell02: fix typos
2019-11-23 22:39:35 +01:00
Yannick Gicquel
d37adee32d
boards/stm32-based: allow SPI signals routed on multiple alternate functions
...
There is no hardware limitation for custom boards based on STM32 to uses
SPI bus with signals coming from different PORT and alternate functions.
This patch allow alternate's function definition per pin basis, thus enable
the support of SPI bus signals routed on differents PORT.
Signed-off-by: Yannick Gicquel <ygicquel@gmail.com>
2019-10-25 06:27:41 +02:00
5dfe80d24c
boards/stm32: initialize board gpios after cpu
2019-10-04 17:05:40 +02:00
Gaëtan Harter
fc9f2a0f65
boards: remove duplicate include 'RIOTCPU/cpu/Makefile.features'
...
When 'CPU' is defined, the CPU Makefile.features is included by the
build system in the main Makefile.features.
No need to do it manually anymore.
2019-09-30 12:38:01 +02:00
f83e9788a6
boards/p-l496g-cell02: don't export CPU/CPU_MODEL variables
2019-09-29 15:54:11 +02:00
b77dd00142
boards/p-l496zg-cell02: move cpu define to Makefile.features
2019-09-20 13:46:58 +02:00
d1fef4803e
boards: add basic support for b-l496g-cell02
2019-08-09 08:26:17 +02:00
