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60f745a033
Add support for specifying data bits, stop bits and parity at runtime. Introduce feature periph_uart_modecfg for uart_mode() till all other CPUs implement it. STM32 L1, F1, F2, F4 supports following modes: * 7E1, 7E2 * 7O1, 7O2 * 8N1, 8N2 * 8E1, 8E2 * 8O1, 8O2 STM32 L0, L4, F0, F3, F7 supports following modes: * 6E1, 6E2 * 6O1, 6O2 * 7E1, 7E2 * 7O1, 7O2 * 7N1, 7N2 * 8N1, 8N2 * 8E1, 8E2 * 8O1, 8O2 Use USART_CR1_M1 macro to detect 7-bit support because even inside one family there could be devices that don't support 7-bit mode. So just using a family macro is not enough. As stated in the datasheets for L0, L4, F0, F3, F7 devices, data bits can only be changed when UART is disabled (UE=0). Introduce uart_stop() routine to satisfy this requirement. STM32 UART adds parity to the MSB of a byte to send. The same also applies to the received bytes. As a result this bit must be masked in order to get the pure data. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> |
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| .. | ||
| dac.c | ||
| dma.c | ||
| eeprom.c | ||
| flash_common.c | ||
| flashpage.c | ||
| gpio.c | ||
| hwrng.c | ||
| i2c_1.c | ||
| i2c_2.c | ||
| Makefile | ||
| pm.c | ||
| pwm.c | ||
| qdec.c | ||
| rtc.c | ||
| rtt.c | ||
| spi.c | ||
| timer.c | ||
| uart.c | ||