mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
631 lines
22 KiB
Plaintext
631 lines
22 KiB
Plaintext
/* Automatically generated file; DO NOT EDIT */
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/* Espressif IoT Development Framework Linker Script */
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/* Generated from: esp-idf/components/esp_system/ld/esp32c3/sections.ld.in */
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Default entry point */
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ENTRY(call_start_cpu0);
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SECTIONS
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{
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/**
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* RTC fast memory holds RTC wake stub code,
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* including from any source file named rtc_wake_stub*.c
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*/
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.rtc.text :
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{
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. = ALIGN(4);
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_rtc_fast_start = ABSOLUTE(.);
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*(.rtc.literal .rtc.text .rtc.text.*)
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*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
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*(.rtc_text_end_test)
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/* 16B padding for possible CPU prefetch and 4B alignment for PMS split lines */
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. += _esp_memprot_prefetch_pad_size;
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. = ALIGN(4);
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_rtc_text_end = ABSOLUTE(.);
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} > rtc_iram_seg
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/**
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* This section located in RTC FAST Memory area.
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* It holds data marked with RTC_FAST_ATTR attribute.
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* See the file "esp_attr.h" for more information.
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*/
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.rtc.force_fast :
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{
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. = ALIGN(4);
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_rtc_force_fast_start = ABSOLUTE(.);
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_coredump_rtc_fast_start = ABSOLUTE(.);
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*(.rtc.fast.coredump .rtc.fast.coredump.*)
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_coredump_rtc_fast_end = ABSOLUTE(.);
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*(.rtc.force_fast .rtc.force_fast.*)
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. = ALIGN(4) ;
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_rtc_force_fast_end = ABSOLUTE(.);
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} > rtc_data_seg
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/**
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* RTC data section holds RTC wake stub
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* data/rodata, including from any source file
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* named rtc_wake_stub*.c and the data marked with
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* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
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*/
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.rtc.data :
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{
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_rtc_data_start = ABSOLUTE(.);
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_coredump_rtc_start = ABSOLUTE(.);
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*(.rtc.coredump .rtc.coredump.*)
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_coredump_rtc_end = ABSOLUTE(.);
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*(.rtc.data .rtc.data.*)
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*(.rtc.rodata .rtc.rodata.*)
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*rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
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_rtc_data_end = ABSOLUTE(.);
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} > rtc_data_location
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/* RTC bss, from any source file named rtc_wake_stub*.c */
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.rtc.bss (NOLOAD) :
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{
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/* part that is initialized if not waking up from deep sleep */
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_rtc_bss_start = ABSOLUTE(.);
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*rtc_wake_stub*.*(.bss .bss.*)
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*rtc_wake_stub*.*(COMMON)
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_rtc_bss_end = ABSOLUTE(.);
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/* part that saves some data for rtc periph module, this part is
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only initialized at power on reset */
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_rtc_bss_rtc_start = ABSOLUTE(.);
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*(.rtc.bss .rtc.bss.*)
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_rtc_bss_rtc_end = ABSOLUTE(.);
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} > rtc_data_location
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/**
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* This section holds data that should not be initialized at power up
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* and will be retained during deep sleep.
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* User data marked with RTC_NOINIT_ATTR will be placed
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* into this section. See the file "esp_attr.h" for more information.
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*/
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.rtc_noinit (NOLOAD):
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{
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. = ALIGN(4);
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_rtc_noinit_start = ABSOLUTE(.);
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*(.rtc_noinit .rtc_noinit.*)
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. = ALIGN(4) ;
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_rtc_noinit_end = ABSOLUTE(.);
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} > rtc_data_location
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/**
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* This section located in RTC SLOW Memory area.
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* It holds data marked with RTC_SLOW_ATTR attribute.
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* See the file "esp_attr.h" for more information.
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*/
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.rtc.force_slow :
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{
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. = ALIGN(4);
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_rtc_force_slow_start = ABSOLUTE(.);
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*(.rtc.force_slow .rtc.force_slow.*)
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. = ALIGN(4) ;
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_rtc_force_slow_end = ABSOLUTE(.);
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} > rtc_slow_seg
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/* Get size of rtc slow data based on rtc_data_location alias */
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_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
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? (_rtc_force_slow_end - _rtc_data_start)
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: (_rtc_force_slow_end - _rtc_force_slow_start);
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_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
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? (_rtc_force_fast_end - _rtc_fast_start)
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: (_rtc_noinit_end - _rtc_fast_start);
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ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
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"RTC_SLOW segment data does not fit.")
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ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
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"RTC_FAST segment data does not fit.")
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.iram0.text :
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{
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_iram_start = ABSOLUTE(.);
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/* Vectors go to start of IRAM */
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ASSERT(ABSOLUTE(.) % 0x100 == 0, "vector address must be 256 byte aligned");
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KEEP(*(.exception_vectors.text));
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. = ALIGN(4);
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_invalid_pc_placeholder = ABSOLUTE(.);
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/* Code marked as running out of IRAM */
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_iram_text_start = ABSOLUTE(.);
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*(.iram1 .iram1.*)
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/* parts of RIOT that should run in IRAM */
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*core/*(.literal .text .literal.* .text.*)
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*esp_common_periph/flash.*(.literal .text .literal.* .text.*)
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*esp_common/thread_arch.*(.literal .text .literal.* .text.*)
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*esp_freertos_common/*(.literal .text .literal.* .text.*)
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/* parts of ESP-IDF that should run in IRAM */
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/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
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/* find components/ -type f -name linker.lf -exec grep "(noflash_text)" {} \; -print */
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*components/app_trace/app_trace.*(.literal .literal.* .text .text.*)
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*components/app_trace/app_trace_util.*(.literal .literal.* .text .text.*)
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*components/esp_event/default_event_loop.*(.literal.esp_event_isr_post .text.esp_event_isr_post)
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*components/esp_event/esp_event.*(.literal.esp_event_isr_post_to .text.esp_event_isr_post_to)
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*components/esp_hw_support/cpu_util.*(.literal .literal.* .text .text.*)
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*components/esp_hw_support/*/rtc_clk.*(.literal .literal.* .text .text.*)
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*components/esp_hw_support/*/rtc_init.*(.literal.rtc_vddsdio_set_config .text.rtc_vddsdio_set_config)
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*components/esp_hw_support/*/rtc_pm.*(.literal .literal.* .text .text.*)
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*components/esp_hw_support/*/rtc_sleep.*(.literal .literal.* .text .text.*)
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*components/esp_hw_support/*/rtc_time.*(.literal .literal.* .text .text.*)
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*components/esp_hw_support/*/rtc_wdt.*(.literal .literal.* .text .text.*)
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*components/esp_ringbuf/*(.literal .literal.* .text .text.*)
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*components/esp_rom/esp_rom_spiflash.*(.literal .literal.* .text .text.*)
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*components/esp_system/esp_err.*(.literal .literal.* .text .text.*)
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*components/esp_system/esp_system.*(.literal.esp_system_abort .text.esp_system_abort)
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*components/esp_system/ubsan.*(.literal .literal.* .text .text.*)
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*libgcc.a:_divsf3.*(.literal .literal.* .text .text.*)
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*libgcc.a:lib2funcs.*(.literal .literal.* .text .text.*)
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*libgcc.a:save-restore.*(.literal .literal.* .text .text.*)
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*libgcov.a:(.literal .literal.* .text .text.*)
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*components/hal/cpu_hal.*(.literal .literal.* .text .text.*)
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*components/hal/i2c_hal_iram.*(.literal .literal.* .text .text.*)
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*components/hal/ledc_hal_iram.*(.literal .literal.* .text .text.*)
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*components/hal/soc_hal.*(.literal .literal.* .text .text.*)
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*components/hal/spi_flash_encrypt_hal_iram.*(.literal .literal.* .text .text.*)
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*components/hal/spi_flash_hal_gpspi.*(.literal .literal.* .text .text.*)
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*components/hal/spi_flash_hal_iram.*(.literal .literal.* .text .text.*)
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*components/hal/spi_hal_iram.*(.literal .literal.* .text .text.*)
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*components/hal/spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
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*components/hal/systimer_hal.*(.literal .literal.* .text .text.*)
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*components/hal/twai_hal.*(.literal .literal.* .text .text.*)
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*components/hal/uart_hal.*(.literal .literal.* .text .text.*)
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*components/hal/wdt_hal_iram.*(.literal .literal.* .text .text.*)
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*components/heap/heap_tlsf.*(.literal .literal.* .text .text.*)
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*components/heap/multi_heap.*(.literal .literal.* .text .text.*)
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*esp-idf/esp_idf_support.*(.literal.esp_log_write .text.esp_log_write)
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*libnet80211.a:(.wifi0iram .wifi0iram.*)
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*libnet80211.a:(.wifirxiram .wifirxiram.*)
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*libnet80211.a:(.wifislprxiram .wifislprxiram.*)
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*components/newlib/abort.*(.literal .literal.* .text .text.*)
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*components/newlib/assert.*(.literal .literal.* .text .text.*)
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*components/newlib/heap.*(.literal .literal.* .text .text.*)
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*components/newlib/stdatomic.*(.literal .literal.* .text .text.*)
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*libpp.a:(.wifi0iram .wifi0iram.*)
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*libpp.a:(.wifiorslpiram .wifiorslpiram.*)
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*libpp.a:(.wifirxiram .wifirxiram.*)
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*libpp.a:(.wifislprxiram .wifislprxiram.*)
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*librtc.a:(.literal .literal.* .text .text.*)
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*components/soc/lldesc.*(.literal .literal.* .text .text.*)
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*components/spi_flash/memspi_host_driver.*(.literal .literal.* .text .text.*)
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*components/spi_flash/spi_flash_chip_boya.*(.literal .literal.* .text .text.*)
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*components/spi_flash/spi_flash_chip_gd.*(.literal .literal.* .text .text.*)
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*components/spi_flash/spi_flash_chip_generic.*(.literal .literal.* .text .text.*)
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*components/spi_flash/spi_flash_chip_issi.*(.literal .literal.* .text .text.*)
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*components/spi_flash/spi_flash_chip_mxic.*(.literal .literal.* .text .text.*)
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*components/spi_flash/spi_flash_chip_mxic_opi.*(.literal .literal.* .text .text.*)
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*components/spi_flash/spi_flash_chip_th.*(.literal .literal.* .text .text.*)
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*components/spi_flash/spi_flash_chip_winbond.*(.literal .literal.* .text .text.*)
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*components/spi_flash/*/spi_flash_rom_patch.*(.literal .literal.* .text .text.*)
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*components/spi_flash/spi_flash_timing_tuning.*(.literal .literal.* .text .text.*)
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*components/spi_flash/*/spi_timing_config.*(.literal .literal.* .text .text.*)
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*components/riscv/interrupt.*(.literal .literal.* .text .text.*)
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*components/riscv/vectors.*(.literal .literal.* .text .text.*)
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} > iram0_0_seg
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/**
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* This section is required to skip .iram0.text area because iram0_0_seg and
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* dram0_0_seg reflect the same address space on different buses.
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*/
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.dram0.dummy (NOLOAD):
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{
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. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
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} > dram0_0_seg
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.dram0.data :
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{
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_data_start = ABSOLUTE(.);
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*(.gnu.linkonce.d.*)
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*(.data1)
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__global_pointer$ = . + 0x800;
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*(.sdata)
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*(.sdata.*)
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KEEP (*(SORT(.xfa.*)))
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*(.jcr)
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_esp_system_init_fn_array_start = ABSOLUTE(.);
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KEEP (*(SORT(.esp_system_init_fn) SORT(.esp_system_init_fn.*)))
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_esp_system_init_fn_array_end = ABSOLUTE(.);
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*(EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data EXCLUDE_FILE(*components/bt/* *libbtdm_app.a) .data.*)
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*(.dram1 .dram1.*)
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_coredump_dram_start = ABSOLUTE(.);
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*(.dram1.coredump .dram1.coredump.*)
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_coredump_dram_end = ABSOLUTE(.);
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*components/app_trace/app_trace.*(.rodata .rodata.*)
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*components/app_trace/app_trace_util.*(.rodata .rodata.*)
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_bt_data_start = ABSOLUTE(.);
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*components/bt/*(.data .data.*)
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. = ALIGN(4);
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_bt_data_end = ABSOLUTE(.);
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_btdm_data_start = ABSOLUTE(.);
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*libbtdm_app.a:(.data .data.*)
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. = ALIGN(4);
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_btdm_data_end = ABSOLUTE(.);
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/* find components/ -type f -name linker.lf -exec grep "(noflash)" {} \; -print */
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*components/esp_hw_support/port/*/rtc_clk.*(.rodata .rodata.*)
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*components/esp_rom/esp_rom_spiflash.*(.rodata .rodata.*)
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*components/esp_system/esp_err.*(.rodata .rodata.*)
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*components/esp_system/ubsan.*(.rodata .rodata.*)
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*libgcc.a:_divsf3.*(.rodata .rodata.*)
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*libgcc.a:save-restore.*(.rodata .rodata.*)
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*libgcov.a:(.rodata .rodata.*)
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*components/hal/cpu_hal.*(.rodata .rodata.*)
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*components/hal/i2c_hal_iram.*(.rodata .rodata.*)
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*components/hal/ledc_hal_iram.*(.rodata .rodata.*)
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*components/hal/soc_hal.*(.rodata .rodata.*)
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*components/hal/spi_flash_encrypt_hal_iram.*(.rodata .rodata.*)
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*components/hal/spi_flash_hal_gpspi.*(.rodata .rodata.*)
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*components/hal/spi_flash_hal_iram.*(.rodata .rodata.*)
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*components/hal/spi_hal_iram.*(.rodata .rodata.*)
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*components/hal/spi_slave_hal_iram.*(.rodata .rodata.*)
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*components/hal/systimer_hal.*(.rodata .rodata.*)
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*components/hal/twai_hal.*(.rodata .rodata.*)
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*components/hal/uart_hal.*(.rodata .rodata.*)
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*components/hal/wdt_hal_iram.*(.rodata .rodata.*)
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*components/heap/heap_tlsf.*(.rodata .rodata.*)
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*components/heap/multi_heap.*(.rodata .rodata.*)
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*components/newlib/abort.*(.rodata .rodata.*)
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*components/newlib/assert.*(.rodata .rodata.*)
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|
*components/newlib/heap.*(.rodata .rodata.*)
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*components/newlib/stdatomic.*(.rodata .rodata.*)
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_nimble_data_start = ABSOLUTE(.);
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*libnimble.a:(.data .data.*)
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. = ALIGN(4);
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_nimble_data_end = ABSOLUTE(.);
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*libphy.a:(.rodata .rodata.*)
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*components/soc/lldesc.*(.rodata .rodata.*)
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*components/spi_flash/memspi_host_driver.*(.rodata .rodata.*)
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*components/spi_flash/spi_flash_chip_boya.*(.rodata .rodata.*)
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*components/spi_flash/spi_flash_chip_gd.*(.rodata .rodata.*)
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|
*components/spi_flash/spi_flash_chip_generic.*(.rodata .rodata.*)
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|
*components/spi_flash/spi_flash_chip_issi.*(.rodata .rodata.*)
|
|
*components/spi_flash/spi_flash_chip_mxic.*(.rodata .rodata.*)
|
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*components/spi_flash/spi_flash_chip_mxic_opi.*(.rodata .rodata.*)
|
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*components/spi_flash/spi_flash_chip_th.*(.rodata .rodata.*)
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|
*components/spi_flash/spi_flash_chip_winbond.*(.rodata .rodata.*)
|
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*components/spi_flash/*/spi_flash_rom_patch.*(.rodata .rodata.*)
|
|
*components/spi_flash/spi_flash_timing_tuning.*(.rodata .rodata.*)
|
|
*components/spi_flash/*/spi_timing_config.*(.rodata .rodata.*)
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|
|
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_data_end = ABSOLUTE(.);
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. = ALIGN(4);
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} > dram0_0_seg
|
|
|
|
/**
|
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* This section holds data that should not be initialized at power up.
|
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* The section located in Internal SRAM memory region. The macro _NOINIT
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* can be used as attribute to place data into this section.
|
|
* See the "esp_attr.h" file for more information.
|
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*/
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.noinit (NOLOAD):
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{
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. = ALIGN(4);
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_noinit_start = ABSOLUTE(.);
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|
*(.noinit .noinit.*)
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. = ALIGN(4) ;
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_noinit_end = ABSOLUTE(.);
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|
} > dram0_0_seg
|
|
|
|
/* Shared RAM */
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|
.dram0.bss (NOLOAD) :
|
|
{
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|
. = ALIGN (8);
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|
_bss_start = ABSOLUTE(.);
|
|
|
|
*(.bss .bss.*)
|
|
*(.ext_ram.bss .ext_ram.bss.*)
|
|
*(.dynbss .dynsbss .gnu.linkonce.b .gnu.linkonce.b.* .gnu.linkonce.sb .gnu.linkonce.sb.* .gnu.linkonce.sb2 .gnu.linkonce.sb2.* .sbss .sbss.* .sbss2 .sbss2.* .scommon .share.mem)
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|
*(COMMON)
|
|
_bt_bss_start = ABSOLUTE(.);
|
|
*components/bt/*(.bss .bss.* COMMON)
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|
. = ALIGN(4);
|
|
_bt_bss_end = ABSOLUTE(.);
|
|
_btdm_bss_start = ABSOLUTE(.);
|
|
*libbtdm_app.a:(.bss .bss.* COMMON)
|
|
. = ALIGN(4);
|
|
_btdm_bss_end = ABSOLUTE(.);
|
|
_nimble_bss_start = ABSOLUTE(.);
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|
*libnimble.a:(.bss .bss.* COMMON)
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|
. = ALIGN(4);
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|
_nimble_bss_end = ABSOLUTE(.);
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|
|
|
*(.dynsbss)
|
|
*(.sbss)
|
|
*(.sbss.*)
|
|
*(.gnu.linkonce.sb.*)
|
|
*(.scommon)
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|
*(.sbss2)
|
|
*(.sbss2.*)
|
|
*(.gnu.linkonce.sb2.*)
|
|
*(.dynbss)
|
|
*(.share.mem)
|
|
*(.gnu.linkonce.b.*)
|
|
|
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. = ALIGN (8);
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|
_bss_end = ABSOLUTE(.);
|
|
} > dram0_0_seg
|
|
|
|
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.")
|
|
|
|
.flash.text :
|
|
{
|
|
_stext = .;
|
|
_instruction_reserved_start = ABSOLUTE(.);
|
|
_text_start = ABSOLUTE(.);
|
|
|
|
*(.literal .literal.* .text .text.*)
|
|
|
|
*(.wifi0iram .wifi0iram.*)
|
|
*(.wifiorslpiram .wifiorslpiram.*)
|
|
*(.wifirxiram .wifirxiram.*)
|
|
*(.wifislpiram .wifislpiram.*)
|
|
*(.wifislprxiram .wifislprxiram.*)
|
|
|
|
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
|
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
|
*(.fini.literal)
|
|
*(.fini)
|
|
*(.gnu.version)
|
|
|
|
/** CPU will try to prefetch up to 16 bytes of
|
|
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
|
|
* safe access to up to 16 bytes after the last real instruction, add
|
|
* dummy bytes to ensure this
|
|
*/
|
|
. += _esp_flash_mmap_prefetch_pad_size;
|
|
|
|
_text_end = ABSOLUTE(.);
|
|
_instruction_reserved_end = ABSOLUTE(.);
|
|
_etext = .;
|
|
|
|
/**
|
|
* Similar to _iram_start, this symbol goes here so it is
|
|
* resolved by addr2line in preference to the first symbol in
|
|
* the flash.text segment.
|
|
*/
|
|
_flash_cache_start = ABSOLUTE(0);
|
|
} > default_code_seg
|
|
|
|
/**
|
|
* This dummy section represents the .flash.text section but in default_rodata_seg.
|
|
* Thus, it must have its alignement and (at least) its size.
|
|
*/
|
|
.flash_rodata_dummy (NOLOAD):
|
|
{
|
|
_flash_rodata_dummy_start = .;
|
|
/* Start at the same alignement constraint than .flash.text */
|
|
. = ALIGN(ALIGNOF(.flash.text));
|
|
/* Create an empty gap as big as .flash.text section */
|
|
. = . + SIZEOF(.flash.text);
|
|
/* Prepare the alignement of the section above. Few bytes (0x20) must be
|
|
* added for the mapping header. */
|
|
. = ALIGN(0x10000) + 0x20;
|
|
_rodata_reserved_start = .;
|
|
} > default_rodata_seg
|
|
|
|
.flash.appdesc : ALIGN(0x10)
|
|
{
|
|
_rodata_start = ABSOLUTE(.);
|
|
|
|
*(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */
|
|
*(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
|
|
|
|
/* Create an empty gap within this section. Thanks to this, the end of this
|
|
* section will match .flash.rodata's begin address. Thus, both sections
|
|
* will be merged when creating the final bin image. */
|
|
. = ALIGN(ALIGNOF(.flash.rodata));
|
|
} >default_rodata_seg
|
|
|
|
.flash.rodata : ALIGN(0x10)
|
|
{
|
|
_flash_rodata_start = ABSOLUTE(.);
|
|
|
|
*(.rodata .rodata.*)
|
|
|
|
*(.rodata_wlog_error .rodata_wlog_error.*)
|
|
*(.rodata_wlog_info .rodata_wlog_info.*)
|
|
*(.rodata_wlog_warning .rodata_wlog_warning.*)
|
|
|
|
KEEP (*(SORT(.roxfa.*)))
|
|
|
|
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
|
*(.gnu.linkonce.r.*)
|
|
*(.rodata1)
|
|
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
|
|
*(.xt_except_table)
|
|
*(.gcc_except_table .gcc_except_table.*)
|
|
*(.gnu.linkonce.e.*)
|
|
*(.gnu.version_r)
|
|
. = (. + 7) & ~ 3;
|
|
/*
|
|
* C++ constructor and destructor tables
|
|
* Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt.
|
|
*
|
|
* RISC-V gcc is configured with --enable-initfini-array so it emits an .init_array section instead.
|
|
* But the init_priority sections will be sorted for iteration in ascending order during startup.
|
|
* The rest of the init_array sections is sorted for iteration in descending order during startup, however.
|
|
* Hence a different section is generated for the init_priority functions which is iterated in
|
|
* ascending order during startup. The corresponding code can be found in startup.c.
|
|
*/
|
|
__init_priority_array_start = ABSOLUTE(.);
|
|
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
|
|
__init_priority_array_end = ABSOLUTE(.);
|
|
__init_array_start = ABSOLUTE(.);
|
|
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
|
|
__init_array_end = ABSOLUTE(.);
|
|
KEEP (*crtbegin.*(.dtors))
|
|
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
|
|
KEEP (*(SORT(.dtors.*)))
|
|
KEEP (*(.dtors))
|
|
/* C++ exception handlers table: */
|
|
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
|
|
*(.xt_except_desc)
|
|
*(.gnu.linkonce.h.*)
|
|
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
|
*(.xt_except_desc_end)
|
|
*(.dynamic)
|
|
*(.gnu.version_d)
|
|
/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
|
|
soc_reserved_memory_region_start = ABSOLUTE(.);
|
|
KEEP (*(.reserved_memory_address))
|
|
soc_reserved_memory_region_end = ABSOLUTE(.);
|
|
_rodata_end = ABSOLUTE(.);
|
|
/* Literals are also RO data. */
|
|
_lit4_start = ABSOLUTE(.);
|
|
*(*.lit4)
|
|
*(.lit4.*)
|
|
*(.gnu.linkonce.lit4.*)
|
|
_lit4_end = ABSOLUTE(.);
|
|
. = ALIGN(4);
|
|
_thread_local_start = ABSOLUTE(.);
|
|
*(.tdata)
|
|
*(.tdata.*)
|
|
*(.tbss)
|
|
*(.tbss.*)
|
|
*(.srodata)
|
|
*(.srodata.*)
|
|
_thread_local_end = ABSOLUTE(.);
|
|
_rodata_reserved_end = ABSOLUTE(.);
|
|
. = ALIGN(ALIGNOF(.eh_frame));
|
|
} > default_rodata_seg
|
|
|
|
/* Keep this section shall be at least aligned on 4 */
|
|
.eh_frame : ALIGN(8)
|
|
{
|
|
__eh_frame = ABSOLUTE(.);
|
|
KEEP (*(.eh_frame))
|
|
__eh_frame_end = ABSOLUTE(.);
|
|
/* Guarantee that this section and the next one will be merged by making
|
|
* them adjacent. */
|
|
. = ALIGN(ALIGNOF(.eh_frame_hdr));
|
|
} > default_rodata_seg
|
|
|
|
/* To avoid any exception in C++ exception frame unwinding code, this section
|
|
* shall be aligned on 8. */
|
|
.eh_frame_hdr : ALIGN(8)
|
|
{
|
|
__eh_frame_hdr = ABSOLUTE(.);
|
|
KEEP (*(.eh_frame_hdr))
|
|
__eh_frame_hdr_end = ABSOLUTE(.);
|
|
} > default_rodata_seg
|
|
|
|
.flash.rodata_noload (NOLOAD) :
|
|
{
|
|
. = ALIGN (4);
|
|
*(.rodata_wlog_debug .rodata_wlog_debug.*)
|
|
*(.rodata_wlog_verbose .rodata_wlog_verbose.*)
|
|
} > default_rodata_seg
|
|
|
|
/* Marks the end of IRAM code segment */
|
|
.iram0.text_end (NOLOAD) :
|
|
{
|
|
/* iram_end_test section exists for use by Memprot unit tests only */
|
|
*(.iram_end_test)
|
|
/* ESP32-C3 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */
|
|
. += _esp_memprot_prefetch_pad_size;
|
|
. = ALIGN(_esp_memprot_align_size);
|
|
_iram_text_end = ABSOLUTE(.);
|
|
} > iram0_0_seg
|
|
|
|
.iram0.data :
|
|
{
|
|
. = ALIGN(16);
|
|
_iram_data_start = ABSOLUTE(.);
|
|
|
|
*(.iram.data .iram.data.*)
|
|
_coredump_iram_start = ABSOLUTE(.);
|
|
*(.iram.data.coredump .iram.data.coredump.*)
|
|
_coredump_iram_end = ABSOLUTE(.);
|
|
|
|
_iram_data_end = ABSOLUTE(.);
|
|
} > iram0_0_seg
|
|
|
|
.iram0.bss (NOLOAD) :
|
|
{
|
|
. = ALIGN(16);
|
|
_iram_bss_start = ABSOLUTE(.);
|
|
|
|
*(.iram.bss .iram.bss.*)
|
|
|
|
_iram_bss_end = ABSOLUTE(.);
|
|
. = ALIGN(16);
|
|
_iram_end = ABSOLUTE(.);
|
|
} > iram0_0_seg
|
|
|
|
/* Marks the end of data, bss and possibly rodata */
|
|
.dram0.heap_start (NOLOAD) :
|
|
{
|
|
. = ALIGN (16);
|
|
_heap_start = ABSOLUTE(.);
|
|
_sheap = ABSOLUTE(.);
|
|
} > dram0_0_seg
|
|
_eheap = phy_param_rom;
|
|
|
|
#ifdef MODULE_PERIPH_FLASHPAGE
|
|
.flash_writable (NOLOAD) : ALIGN(65536)
|
|
{
|
|
_fp_mem_start = . ;
|
|
KEEP(*(SORT(.flash_writable.*)))
|
|
_fp_mem_end = . ;
|
|
. = ALIGN(4096);
|
|
_end_fw = . ;
|
|
} > drom0_1_seg
|
|
#endif
|
|
}
|
|
|
|
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
|
|
"IRAM0 segment data does not fit.")
|
|
|
|
ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
|
|
"DRAM segment data does not fit.")
|
|
|
|
. = ORIGIN(dram0_0_seg);
|
|
_cpu_ram_start = ABSOLUTE(.);
|
|
. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
|
|
_cpu_ram_end = ABSOLUTE(.);
|
|
|
|
/* ensure that RAM_START_ADDR and RAM_LEN as defined in RIOT's makefile
|
|
* match the parameters used in linker script */
|
|
ASSERT((ORIGIN(dram0_0_seg) == CPU_RAM_BASE),
|
|
"RAM_START_ADDR does not match DRAM start address")
|
|
ASSERT((LENGTH(dram0_0_seg) == CPU_RAM_SIZE),
|
|
"RAM_LEN does not match DRAM size")
|