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cpu/esp32: ensure correct RAM_START_ADDR and RAM_LEN

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This commit is contained in:
Gunar Schorcht 2023-06-25 18:12:49 +02:00
parent b707235592
commit 87a9d635c8
5 changed files with 49 additions and 1 deletions
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2
cpu/esp32/Makefile.include
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@ -54,7 +54,7 @@ else ifeq (esp32c3,$(CPU_FAM))
# Therefore, a part at the beginning of the RAM is not usable since it is
# used as instruction cache via the instruction bus.
RAM_LEN = 320K
RAM_START_ADDR = 0x3FC88000
RAM_START_ADDR = 0x3FC80000
else
$(error Unkwnown ESP32x SoC variant (family))
endif

12
cpu/esp32/ld/esp32/sections.ld.in
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@ -634,3 +634,15 @@ ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
"DRAM segment data does not fit.")
. = ORIGIN(dram0_0_seg);
_cpu_ram_start = ABSOLUTE(.);
. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
_cpu_ram_end = ABSOLUTE(.);
/* ensure that RAM_START_ADDR and RAM_LEN as defined in RIOT's makefile
* match the parameters used in linker script */
ASSERT((ORIGIN(dram0_0_seg) == CPU_RAM_BASE),
"RAM_START_ADDR does not match DRAM start address")
ASSERT(((LENGTH(dram0_0_seg) - 0x200) == CPU_RAM_SIZE),
"RAM_LEN does not match DRAM size")

12
cpu/esp32/ld/esp32c3/sections.ld.in
View File

@ -616,3 +616,15 @@ ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
"DRAM segment data does not fit.")
. = ORIGIN(dram0_0_seg);
_cpu_ram_start = ABSOLUTE(.);
. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
_cpu_ram_end = ABSOLUTE(.);
/* ensure that RAM_START_ADDR and RAM_LEN as defined in RIOT's makefile
* match the parameters used in linker script */
ASSERT((ORIGIN(dram0_0_seg) == CPU_RAM_BASE),
"RAM_START_ADDR does not match DRAM start address")
ASSERT((LENGTH(dram0_0_seg) == CPU_RAM_SIZE),
"RAM_LEN does not match DRAM size")

12
cpu/esp32/ld/esp32s2/sections.ld.in
View File

@ -610,3 +610,15 @@ ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
ASSERT(((_heap_start - _data_start) <= LENGTH(dram0_0_seg)),
"DRAM segment data does not fit.")
. = ORIGIN(dram0_0_seg);
_cpu_ram_start = ABSOLUTE(.);
. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
_cpu_ram_end = ABSOLUTE(.);
/* ensure that RAM_START_ADDR and RAM_LEN as defined in RIOT's makefile
* match the parameters used in linker script */
ASSERT((ORIGIN(dram0_0_seg) == CPU_RAM_BASE),
"RAM_START_ADDR does not match DRAM start address")
ASSERT((LENGTH(dram0_0_seg) == CPU_RAM_SIZE),
"RAM_LEN does not match DRAM size")

12
cpu/esp32/ld/esp32s3/sections.ld.in
View File

@ -637,3 +637,15 @@ ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
"DRAM segment data does not fit.")
. = ORIGIN(dram0_0_seg);
_cpu_ram_start = ABSOLUTE(.);
. = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
_cpu_ram_end = ABSOLUTE(.);
/* ensure that RAM_START_ADDR and RAM_LEN as defined in RIOT's makefile
* match the parameters used in linker script */
ASSERT((ORIGIN(dram0_0_seg) == CPU_RAM_BASE),
"RAM_START_ADDR does not match DRAM start address")
ASSERT((LENGTH(dram0_0_seg) == CPU_RAM_SIZE),
"RAM_LEN does not match DRAM size")