After changing IN EPs also to use XFRC (Transfer Complete) interrupts in non-DMA mode, the TXFE (TX FIFO Empty) interrupt is no longer needed to signal the completion of an IN transfer.
XFRC (Transfer Complete) interrupts are now also used for OUT EPs in non-DMA mode. RXFLVL (RX FIFO Level) interrupts are no longer used to signal completed transfers, but only to copy data from FIFO to memory and to set a flag indicating that a SETUP stage is in progress. STUP (SETUP phase done) interrupts are then used to signal a completed SETUP stage and to reset the flags that indicates the SETUP stage. The flag that indicates the SETUP stage in progress is used to ignore additional XFRC interrupts for EP0 during the SETUP stage.
XFRC (Transfer Complete) interrupts are now also used for IN EPs in non-DMA mode. TXFE (TX FIFO Empty) interrupts are not necessarily needed but are still enabled.
Since the USB OTG FIFO sizes are partly defined in 32-bit words and partly in bytes, the documentation of the of the USB OTG FIFO size definitions is extended by the respective unit.
Since the USB OTG FIFO sizes are partly defined in 32-bit words and partly in bytes, the documentation of the of the USB OTG FIFO size definitions is extended by the respective unit.
Since the USB OTG FIFO sizes are partly defined in 32-bit words and partly in bytes, the documentation of the of the USB OTG FIFO size definitions is extended by the respective unit.
The USB device driver ISR sets a thread flag of the waiting USBUS thread to indicate that it has to handle a USB device driver event. However, setting a thread flag only sets `sched_context_switch_request` to indicate that a thread context switch would be required, but it is not executed. Therefore, for STM32 MCUs, `cortexm_isr_end` was called to execute the context switch. Since the driver is also used by other platforms, this call is replaced by a direct call of `thread_yield_higher` if required. NOTE: For ESP32x SoC, such a thread context switch is implicitly executed at the end of each ISR if necessary.
If the MCU/board has only an USB OTG FS peripheral or only an USB OTG HS peripheral, it should only need to specify the USB OTG FS definitions such as the number of EPs or the FIFO sizes or only the USB OTG HS definitions. This commit cleans up the code so that it is translatable without the respective definitions.
19471: drivers/periph_usbdev: fix set device address r=bergzand a=gschorcht
### Contribution description
This PR allows to define when the device address is set on receipt of a SETUP with `SET ADDRESS Request`. It fixes the problem with enumeration of the Synopsys DWC2 USB OTG Core due to the wrong time of setting the device address.
Especially, it fixes the problem that the enumeration fails completely for the `stm32f723e-disco` board with CDC ECM if CDC ACM is not used and the additional reset cycles during the enumeration for a couple of platforms such as ESP32-S2 and ESP32-S3.
**Background**
The address in the USB device can be set either directly after the SETUP stage on receipt of the `SET ADDRESS Request` or after the associated STATUS stage. When the USB device address has to be set depends on the hardware implementation.
**Solution**
To control the time of setting the device address, a new define `USBDEV_SET_ADDR_AFTER_STATUS` is introduced.
If `USBDEV_SET_ADDR_AFTER_STATUS` has the value 1 (default), the address is set in the USB device after the STATUS stage. Since this is the default, existing `periph_usbdev` drivers shouldn't be affected. Overwriting `USBDEV_SET_ADDR_AFTER_STATUS` with 0 in `periph_cpu.h` or in driver header file let the address set directly after the SETUP stage.
### Testing procedure
Use `tests/usbus_cdc_ecm`:
For `stm32f723e-disco` the enumeration doesn't work at all without this PR and works reliable with this PR.
```
USEMODULE='periph_usbdev_hs_utmi' BOARD=stm32f723e-disco make -C tests/usbus_cdc_ecm flash
```
For any ESP32-S2 or ESP32-S3 board, the enumeration requires an addition reset cycle in every third or fourth enumeration without this PR and doesn't require any reset cycle with this PR.
```
BOARD=esp32s2-devkit make -C tests/usbus_cdc_ecm flash
```
Other platforms should still work with this PR, for example ATSAM platform:
```
BOARD=arduino-mkr1000 make -C tests/usbus_cdc_ecm flash
```
### Issues/PRs references
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Use symbol `USBDEV_SET_ADDR_AFTER_STATUS` to determine whether the device address has to be set directly after SETUP stage or after the associated STATUS stage.
The address in the USB device can be set either directly after the SETUP stage on receipt of the `SET ADDRESS Request` or after the associated status stage. When the USB device address has to be set depends on the hardware. If `USBDEV_SET_ADDR_AFTER_STATUS` has the value 1 (default), the address is only set in the USB device after the status stage. Overwrite it with 0 in `periph_cpu.h` to set the address already directly after the SETUP stage.
19432: boards/esp32: deduplication in common ESP32x board definitions r=benpicco a=gschorcht
### Contribution description
The PR reduced code duplication in `boards/common/esp32*`.
The PR moves the header files from `boards/common/esp32s3/include` that can be used for all types of ESP32x SoCs to a new common ESP32x board definition which is then included by all common ESP32x board definitions.
### Testing procedure
Green CI.
### Issues/PRs references
19461: drivers/enc28j60: fix ISR routine and bth r=benpicco a=peteut
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Alain Péteut <alain.peteut@yahoo.com>
19443: drivers: add support for MTDs emulated in RAM r=dylad a=gschorcht
### Contribution description
This PR adds a driver to provide MTDs that are emulated in RAM. It allows to test MTD-based applications on boards that do not provide MTDs by hardware.
It includes also some small documentation fixes for `mtd.h` that were found while writing the driver.
### Testing procedure
The following tests should work on any board:
`tests/pkg_littlefs`
`tests/pkg_littlefs2`
`tests/pkg_spiffs`
### Issues/PRs references
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
19459: drivers/usbus_synopsys_dwc2: fix interrupt handling in DMA mode r=dylad a=gschorcht
### Contribution description
This PR fixes the interrupt handling for IN endpoints in DMA mode.
In DMA mode, both the `XFRC` (Transfer Complete) interrupt and the `TXFE` (TX FIFO Empty) interrupt for IN EP1 ... EPn were used to generate the `USBDEV_EVENT_TR_COMPLETE`. This led to problems with USBUS MSC. With this fix, the `TXFE` interrupt is used only in non-DMA mode or only for IN EP0 in DMA mode while the `XFRC` (Transfer Complete) is used only in DMA mode for IN EP1 ... EPn.
### Testing procedure
This PR should work together with PR #19458 for SD Card interface for a board with USB HS port, for example:
```
USEMODULE='sdcard_spi mtd_sdcard_default periph_usbdev_hs_ulpi' \
CFLAGS='-DSDCARD_SPI_PARAM_CLK=GPIO_PIN\(PORT_I,1\) -DSDCARD_SPI_PARAM_MISO=GPIO_PIN\(PORT_B,14\) -DSDCARD_SPI_PARAM_MOSI=GPIO_PIN\(PORT_B,15\) -DSDCARD_SPI_PARAM_CS=GPIO_PIN\(PORT_A,8\)' \
BOARD=stm32f746g-disco make -j8 -C tests/usbus_msc flash
```
It should still work for CDC ECM for such a board:
```
USEMODULE='periph_usbdev_hs_ulpi stdio_cdc_acm' BOARD=stm32f746g-disco make -j8 -C tests/usbus_cdc_ecm flash
```
### Issues/PRs references
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
This extends support for the GET STATUS requests to support endpoints
and interfaces as recipient. It also adds the SET and CLEAR FEATURE
requests for the endpoints with support to set and clear the halt
condition on an endpoint.
Instead of directly stalling an endpoint, handlers should enable the
halt condition on an usbus endpoint to signal error condition.
This can then be cleared via a CLEAR FEATURE request from the host.
19460: cpu/stm32/usbdev_fs: fix ep registration and EP_REG assignments r=gschorcht a=dylad
### Contribution description
This PR provides two fixes for the `usbdev_fs` driver:
- Fix endpoints registration
- Fix assignment of toggleable bits in EP_REG(x) registers
These bugs were encountered with the USBUS MSC implementation.
Regarding the endpoints registration:
For the `usbdev_fs` peripheral, IN and OUT endpoints of the same index must have the same type.
For instance, if EP1 OUT is a bulk endpoint, EP1 IN must either be unused or used as bulk too but it cannot be used as interrupt or isochronous.
With the previous check, the following registration pattern (EP OUT Bulk -> EP IN Interrupt -> EP IN Bulk) would assign both EP OUT Bulk and EP IN Interrupt to same endpoint index. So the configuration would be broken.
Applying the same registration pattern with this patch would now produce EP OUT Bulk -> 1 / EP IN Interrupt -> 2 / EP IN Bulk 1. Which is a working configuration for this IP.
and for the second fix:
EP_REG(x) registers have a total of 6 toggleable bits. Those bits can only be toggled if we write a one to it, otherwise writing a zero has no effect
This commit fixes all the access to these registers to prevent from modifying these bits when not needed.
Without this patch, the endpoint status (VALID / NACK / STALL) can be erroneously modify because bits are not cleared when assigning the new content to the register and thus make the bits toggle and change values.
### Testing procedure
This can be tested with tests/usbus_msc on any board using this `usbdev_fs` driver.
It is easier to test this PR with #19443 alongside. Then the following would be enough:
`CFLAGS='-DSECTOR_COUNT=64' USEMODULE='mtd_emulated' make -j8 BOARD=p-nucleo-wb55 -C tests/usbus_msc flash`
Otherwise this can also be tested by attaching a SPI<->SDCARD adapter.
### Issues/PRs references
None.
Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
19454: cpu/stm32/periph_gpio_ll: Fix misleading comments r=gschorcht a=maribu
### Contribution description
The comments still claim STM32F1 support is missing, but this was recently added.
Also, drop an empty line to fix `too many consecutive empty lines` nitpick of the CI.
### Testing procedure
This since only changes comments, this won't effect the binaries. Technically, those comments would be Doxygen compatible comments. But as only Doxygen comments in headers are parsed, these are in practice regular plain comments.
### Issues/PRs references
https://github.com/RIOT-OS/RIOT/pull/19407 added basic GPIO LL support for STM32F1, https://github.com/RIOT-OS/RIOT/pull/19412 added the IRQ support on top of that.
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
